From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: <wenzhuol@shecgisg004.sh.intel.com> Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 6E9EEC76C for <dev@dpdk.org>; Wed, 24 Jun 2015 05:27:08 +0200 (CEST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP; 23 Jun 2015 20:27:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,669,1427785200"; d="scan'208";a="752154321" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga002.jf.intel.com with ESMTP; 23 Jun 2015 20:27:07 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t5O3R5Kb020368; Wed, 24 Jun 2015 11:27:05 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t5O3R2rW012152; Wed, 24 Jun 2015 11:27:04 +0800 Received: (from wenzhuol@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t5O3R2Ug012148; Wed, 24 Jun 2015 11:27:02 +0800 From: Wenzhuo Lu <wenzhuo.lu@intel.com> To: dev@dpdk.org Date: Wed, 24 Jun 2015 11:26:04 +0800 Message-Id: <1435116386-12010-16-git-send-email-wenzhuo.lu@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1435116386-12010-1-git-send-email-wenzhuo.lu@intel.com> References: <1435116386-12010-1-git-send-email-wenzhuo.lu@intel.com> Subject: [dpdk-dev] [PATCH 15/37] ixgbe/base: release semaphores in proper order X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK <dev.dpdk.org> List-Unsubscribe: <http://dpdk.org/ml/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://dpdk.org/ml/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <http://dpdk.org/ml/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> X-List-Received-Date: Wed, 24 Jun 2015 03:27:09 -0000 Because we acquire two semaphore bits before setting the SWFW_SYNC register, we should release them in the reverse order that they were acquired. Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> --- drivers/net/ixgbe/base/ixgbe_x540.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/ixgbe/base/ixgbe_x540.c b/drivers/net/ixgbe/base/ixgbe_x540.c index af29b13..4891702 100644 --- a/drivers/net/ixgbe/base/ixgbe_x540.c +++ b/drivers/net/ixgbe/base/ixgbe_x540.c @@ -931,14 +931,14 @@ STATIC void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw) /* Release both semaphores by writing 0 to the bits REGSMP and SMBI */ - swsm = IXGBE_READ_REG(hw, IXGBE_SWSM); - swsm &= ~IXGBE_SWSM_SMBI; - IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm); - swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC); swsm &= ~IXGBE_SWFW_REGSMP; IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swsm); + swsm = IXGBE_READ_REG(hw, IXGBE_SWSM); + swsm &= ~IXGBE_SWSM_SMBI; + IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm); + IXGBE_WRITE_FLUSH(hw); } -- 1.9.3