[dpdk-dev] [PATCH 00/37] update ixgbe base driver

[dpdk-dev] [PATCH 00/37] update ixgbe base driver

[Wenzhuo Lu]

Short summary:
*update Low Power Link Up to use MAC ops link
*fix 1G and 10G link stability for x550em SFP+
*update x550em SFP link setup
*add shift define for EEE_SU.TEEE_DLY
*add x550em identify SFP module support
*return err when SFP module is not present
*power down the x550em PHY on overtemp events
*restore advertised autoneg after setting LPLU
*fix UniPHY link configuration
*add macro for x550em bus speed fuse
*add a new 82599 device ID
*enable FEC when EEE is disabled
*release semaphores in proper order
*add wait helper for IOSF accesses
*use a semaphore to serialize IOSF accesses
*check for functional ucode
*add KR/iXFI internal link mode support
*check link again after getting speed
*config MDIO clock for x550em
*add support for led_on and led_off for X557 PHY LEDs
*update EEE/FEC support for device X550EM_X_KR
*introduce array of mac-type-dependent values
*use mvals array for I2C_*_BY_MAC values
*use mvals array for *_GPI*_BY_MAC values
*use mvals array for CIA*_BY_MAC values
*add new mac-dependent values for x540, x550
*disable SW LPLU implementation for x557 V2
*remove FEC disablement for x550em
*modify register definition code style
*specific process for X550 and X550em when disabling PCIe master
*fix flow control to be KR only
*force cs4227 LINE side to 10G SR mode
*add support for new x550 PHY IDs

Wenzhuo Lu (37):
  ixgbe/base: update readme
  ixgbe/base: update Low Power Link Up to use MAC ops link
  ixgbe/base: fix 1G and 10G link stability for x550em SFP+
  ixgbe/base: update x550em SFP link setup
  ixgbe/base: add shift define for EEE_SU.TEEE_DLY
  ixgbe/base: add x550em identify SFP module support
  ixgbe/base: fix potential warning
  ixgbe/base: return err when SFP module is not present
  ixgbe/base: power down the x550em PHY on overtemp events
  ixgbe/base: restore advertised autoneg after setting LPLU
  ixgbe/base: fix UniPHY link configuration
  ixgbe/base: add macro for x550em bus speed fuse
  ixgbe/base: add a new 82599 device ID
  ixgbe/base: enable FEC when EEE is disabled
  ixgbe/base: release semaphores in proper order
  ixgbe/base: add wait helper for IOSF accesses
  ixgbe/base: use a semaphore to serialize IOSF accesses
  ixgbe/base: check for functional ucode
  ixgbe/base: add KR/iXFI internal link mode support
  ixgbe/base: check link again after getting speed
  ixgbe/base: config MDIO clock for x550em
  ixgbe/base: add support for led_on and led_off for X557 PHY LEDs
  ixgbe/base: update EEE/FEC support for device X550EM_X_KR
  ixgbe/base: introduce array of mac-type-dependent values
  ixgbe/base: use mvals array for I2C_*_BY_MAC values
  ixgbe/base: use mvals array for *_GPI*_BY_MAC values
  ixgbe/base: use mvals array for CIA*_BY_MAC values
  ixgbe/base: add new mac-dependent values for x540, x550
  ixgbe/base: disable SW LPLU implementation for x557 V2
  ixgbe/base: remove FEC disablement for x550em
  ixgbe/base: modify register definition code style
  ixgbe/base: specific process for X550 and X550em when disabling PCIe
    master
  ixgbe/base: fix flow control to be KR only
  ixgbe/base: fix 5G and 2.5G speed description
  ixgbe/base: force cs4227 LINE side to 10G SR mode
  ixgbe/base: a minor optimization for max link up time
  ixgbe/base: add support for new x550 PHY IDs

 drivers/net/ixgbe/base/README         |   2 +-
 drivers/net/ixgbe/base/ixgbe_82598.c  |   4 +-
 drivers/net/ixgbe/base/ixgbe_api.c    |  27 ++
 drivers/net/ixgbe/base/ixgbe_common.c |   5 +-
 drivers/net/ixgbe/base/ixgbe_phy.c    |   8 +-
 drivers/net/ixgbe/base/ixgbe_phy.h    |   7 +-
 drivers/net/ixgbe/base/ixgbe_type.h   | 251 +++++++++---
 drivers/net/ixgbe/base/ixgbe_x540.c   |   8 +-
 drivers/net/ixgbe/base/ixgbe_x550.c   | 699 ++++++++++++++++++++++++----------
 drivers/net/ixgbe/base/ixgbe_x550.h   |   3 +
 10 files changed, 739 insertions(+), 275 deletions(-)

-- 
1.9.3

[dpdk-dev] [PATCH 01/37] ixgbe/base: update readme

[Wenzhuo Lu]

Update readme file to show the version of the base code.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/README | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ixgbe/base/README b/drivers/net/ixgbe/base/README
index fa71d85..ac38708 100644
--- a/drivers/net/ixgbe/base/README
+++ b/drivers/net/ixgbe/base/README
@@ -34,7 +34,7 @@ Intel® IXGBE driver
 ===================
 
 This directory contains source code of FreeBSD ixgbe driver of version
-cid-10g-shared-code.2015.03.06 released by ND. The sub-directory of base/
+cid-10g-shared-code.2015.06.05 released by ND. The sub-directory of base/
 contains the original source package.
 This driver is valid for the product(s) listed below
 
-- 
1.9.3

[dpdk-dev] [PATCH 02/37] ixgbe/base: update Low Power Link Up to use MAC ops link

[Wenzhuo Lu]

This patch updates x550em LPLU to use the MAC ops setup_link
function pointer. This removes redundant code and provides iXFI
and KR support between internal and external PHY.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 44 ++-----------------------------------
 1 file changed, 2 insertions(+), 42 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index da312ba..fd46699 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -2556,48 +2556,8 @@ s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
 	if (status != IXGBE_SUCCESS)
 		return status;
 
-	/* Set AN advertizement to only include LCD  */
-	if (lcd_speed == IXGBE_LINK_SPEED_1GB_FULL) {
-		an_10g_cntl_reg &= ~IXGBE_MII_10GBASE_T_ADVERTISE;
-		autoneg_reg |= IXGBE_MII_1GBASE_T_ADVERTISE;
-	}
-
-	if (lcd_speed == IXGBE_LINK_SPEED_10GB_FULL) {
-		an_10g_cntl_reg |= IXGBE_MII_10GBASE_T_ADVERTISE;
-		autoneg_reg &= ~IXGBE_MII_1GBASE_T_ADVERTISE;
-	}
-
-	status = hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,
-			      IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
-			      an_10g_cntl_reg);
-
-	if (status != IXGBE_SUCCESS)
-		return status;
-
-	status = hw->phy.ops.write_reg(hw,
-			      IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,
-			      IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
-			      autoneg_reg);
-
-	if (status != IXGBE_SUCCESS)
-		return status;
-
-	/* Restart PHY auto-negotiation. */
-	status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,
-			     IXGBE_MDIO_AUTO_NEG_DEV_TYPE, &autoneg_reg);
-
-	if (status != IXGBE_SUCCESS)
-		return status;
-
-	autoneg_reg |= IXGBE_MII_RESTART;
-
-	status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,
-			      IXGBE_MDIO_AUTO_NEG_DEV_TYPE, autoneg_reg);
-
-	if (status != IXGBE_SUCCESS)
-		return status;
-
-	status = ixgbe_setup_ixfi_x550em(hw, &lcd_speed);
+	/* Setup link at least common link speed */
+	status = hw->mac.ops.setup_link(hw, lcd_speed, false);
 
 	return status;
 }
-- 
1.9.3

[dpdk-dev] [PATCH 03/37] ixgbe/base: fix 1G and 10G link stability for x550em SFP+

[Wenzhuo Lu]

Configure the CS4227 correctly for both 1G and 10G operation,
by moving the code to ixgbe_setup_mac_link_sfp_x550em(). It
needs to be in this function because we need both the module
type and the speed, and this is the only function in the init
flow that knows the speed. In contrast,
ixgbe_setup_sfp_modules_X550em() does not know the speed, so we
can't do anything useful here. This is a fundamental difference
from the 82599 flow.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_phy.h  |   5 +-
 drivers/net/ixgbe/base/ixgbe_x550.c | 123 +++++++++++++++++-------------------
 2 files changed, 63 insertions(+), 65 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_phy.h b/drivers/net/ixgbe/base/ixgbe_phy.h
index ffab02e..e3cf7ff 100644
--- a/drivers/net/ixgbe/base/ixgbe_phy.h
+++ b/drivers/net/ixgbe/base/ixgbe_phy.h
@@ -93,7 +93,10 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_CS4227_GLOBAL_ID_VALUE	0x03E5
 #define IXGBE_CS4227_SCRATCH_VALUE	0x5aa5
 #define IXGBE_CS4227_RETRIES		5
-#define IXGBE_CS4227_SPARE24_LSB	0x12B0	/* Reg to program EDC */
+#define IXGBE_CS4227_LINE_SPARE22_MSB	0x12AD	/* Reg to program speed */
+#define IXGBE_CS4227_LINE_SPARE24_LSB	0x12B0	/* Reg to program EDC */
+#define IXGBE_CS4227_HOST_SPARE22_MSB	0x1AAD	/* Reg to program speed */
+#define IXGBE_CS4227_HOST_SPARE24_LSB	0x1AB0	/* Reg to program EDC */
 #define IXGBE_CS4227_EDC_MODE_CX1	0x0002
 #define IXGBE_CS4227_EDC_MODE_SR	0x0004
 #define IXGBE_CS4227_RESET_HOLD		500	/* microseconds */
diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index fd46699..181264d 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -995,57 +995,12 @@ enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw)
  */
 s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw)
 {
-	bool setup_linear;
-	u16 reg_slice, edc_mode;
-	s32 ret_val;
-
 	DEBUGFUNC("ixgbe_setup_sfp_modules_X550em");
 
-	switch (hw->phy.sfp_type) {
-	case ixgbe_sfp_type_unknown:
-		return IXGBE_SUCCESS;
-	case ixgbe_sfp_type_not_present:
-		return IXGBE_ERR_SFP_NOT_PRESENT;
-	case ixgbe_sfp_type_da_cu_core0:
-	case ixgbe_sfp_type_da_cu_core1:
-		setup_linear = true;
-		break;
-	case ixgbe_sfp_type_srlr_core0:
-	case ixgbe_sfp_type_srlr_core1:
-	case ixgbe_sfp_type_da_act_lmt_core0:
-	case ixgbe_sfp_type_da_act_lmt_core1:
-	case ixgbe_sfp_type_1g_sx_core0:
-	case ixgbe_sfp_type_1g_sx_core1:
-	case ixgbe_sfp_type_1g_lx_core0:
-	case ixgbe_sfp_type_1g_lx_core1:
-		setup_linear = false;
-		break;
-	default:
-		return IXGBE_ERR_SFP_NOT_SUPPORTED;
-	}
-
 	ixgbe_init_mac_link_ops_X550em(hw);
 	hw->phy.ops.reset = NULL;
 
-	/* The CS4227 slice address is the base address + the port-pair reg
-	 * offset. I.e. Slice 0 = 0x12B0 and slice 1 = 0x22B0.
-	 */
-	reg_slice = IXGBE_CS4227_SPARE24_LSB + (hw->bus.lan_id << 12);
-
-	if (setup_linear)
-		edc_mode = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1;
-	else
-		edc_mode = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
-
-	/* Configure CS4227 for connection type. */
-	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
-					   edc_mode);
-
-	if (ret_val != IXGBE_SUCCESS)
-		ret_val = ixgbe_write_i2c_combined(hw, 0x80, reg_slice,
-						   edc_mode);
-
-	return ret_val;
+	return IXGBE_SUCCESS;
 }
 
 /**
@@ -1346,7 +1301,6 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
  */
 s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
 {
-	struct ixgbe_hic_hdr fw_cmd;
 	ixgbe_link_speed link_speed;
 	s32 status;
 	u32 ctrl = 0;
@@ -1355,22 +1309,6 @@ s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
 
 	DEBUGFUNC("ixgbe_reset_hw_X550em");
 
-	fw_cmd.cmd = FW_PHY_MGMT_REQ_CMD;
-	fw_cmd.buf_len = 0;
-	fw_cmd.cmd_or_resp.cmd_resv = 0;
-	fw_cmd.checksum = FW_DEFAULT_CHECKSUM;
-	status = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
-					      sizeof(fw_cmd),
-					      IXGBE_HI_PHY_MGMT_REQ_TIMEOUT,
-					      true);
-	if (status)
-		ERROR_REPORT2(IXGBE_ERROR_CAUTION,
-			      "PHY mgmt command failed with %d\n", status);
-	else if (fw_cmd.cmd_or_resp.ret_status != FW_CEM_RESP_STATUS_SUCCESS)
-		ERROR_REPORT2(IXGBE_ERROR_CAUTION,
-			      "PHY mgmt command returned %d\n",
-			      fw_cmd.cmd_or_resp.ret_status);
-
 	/* Call adapter stop to disable Tx/Rx and clear interrupts */
 	status = hw->mac.ops.stop_adapter(hw);
 	if (status != IXGBE_SUCCESS)
@@ -1708,9 +1646,66 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
 				    ixgbe_link_speed speed,
 				    bool autoneg_wait_to_complete)
 {
+	s32 ret_val;
+	u16 reg_slice, reg_val;
+	bool setup_linear;
 	UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
 
-	return ixgbe_setup_ixfi_x550em(hw, &speed);
+	/* Configure the external PHY. */
+	switch (hw->phy.sfp_type) {
+	case ixgbe_sfp_type_da_cu_core0:
+	case ixgbe_sfp_type_da_cu_core1:
+		setup_linear = true;
+		break;
+	case ixgbe_sfp_type_srlr_core0:
+	case ixgbe_sfp_type_srlr_core1:
+	case ixgbe_sfp_type_da_act_lmt_core0:
+	case ixgbe_sfp_type_da_act_lmt_core1:
+	case ixgbe_sfp_type_1g_sx_core0:
+	case ixgbe_sfp_type_1g_sx_core1:
+#ifdef SUPPORT_1000BASE_LX
+	case ixgbe_sfp_type_1g_lx_core0:
+	case ixgbe_sfp_type_1g_lx_core1:
+#endif /* SUPPORT_1000BASE_LX */
+		setup_linear = false;
+		break;
+	default:
+		return IXGBE_ERR_SFP_NOT_SUPPORTED;
+	}
+
+	/* Configure CS4227 for connection rate. */
+	reg_slice = IXGBE_CS4227_LINE_SPARE22_MSB + (hw->bus.lan_id << 12);
+	reg_val = (speed & IXGBE_LINK_SPEED_10GB_FULL) ? 0 : 0x8000;
+	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
+					   reg_val);
+
+	/* Configure CS4227 for connection type. */
+	reg_slice = IXGBE_CS4227_LINE_SPARE24_LSB + (hw->bus.lan_id << 12);
+	if (setup_linear)
+		reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1;
+	else
+		reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
+	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
+					   reg_val);
+
+	reg_slice = IXGBE_CS4227_HOST_SPARE22_MSB + (hw->bus.lan_id << 12);
+	reg_val = (speed & IXGBE_LINK_SPEED_10GB_FULL) ? 0 : 0x8000;
+	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
+					   reg_val);
+
+	/* Configure CS4227 for connection type. */
+	reg_slice = IXGBE_CS4227_HOST_SPARE24_LSB + (hw->bus.lan_id << 12);
+	if (setup_linear)
+		reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1;
+	else
+		reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
+	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
+					   reg_val);
+
+	/* Configure the internal PHY. */
+	ret_val = ixgbe_setup_ixfi_x550em(hw, &speed);
+
+	return ret_val;
 }
 
 /**
-- 
1.9.3

[dpdk-dev] [PATCH 04/37] ixgbe/base: update x550em SFP link setup

[Wenzhuo Lu]

This patch updates the x550em SFP link setup by adding
ixgbe_sfp_type_unknown and ixgbe_sfp_type_not_present case expression
to the ixgbe_setup_mac_link_sfp_x550em SFP type switch statement. This
handles the case when no module is present.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 181264d..82414dc 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -990,7 +990,7 @@ enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw)
 }
 
 /**
- *  ixgbe_setup_sfp_modules_X550em - Setup SFP module
+ *  ixgbe_setup_sfp_modules_X550em - Setup MAC link ops
  *  @hw: pointer to hardware structure
  */
 s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw)
@@ -1637,10 +1637,10 @@ STATIC s32 ixgbe_setup_ixfi_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed)
 }
 
 /**
- *  ixgbe_setup_mac_link_sfp_x550em - Configure the KR PHY for SFP.
+ *  ixgbe_setup_mac_link_sfp_x550em - Configure the CS4227 & KR PHY for SFP
  *  @hw: pointer to hardware structure
  *
- *  Configures the integrated KR PHY for SFP support.
+ *  Configure the external CS4227 PHY and the integrated KR PHY for SFP support.
  **/
 s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
 				    ixgbe_link_speed speed,
@@ -1653,6 +1653,10 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
 
 	/* Configure the external PHY. */
 	switch (hw->phy.sfp_type) {
+	case ixgbe_sfp_type_unknown:
+		return IXGBE_ERR_SFP_NOT_SUPPORTED;
+	case ixgbe_sfp_type_not_present:
+		return IXGBE_SUCCESS;
 	case ixgbe_sfp_type_da_cu_core0:
 	case ixgbe_sfp_type_da_cu_core1:
 		setup_linear = true;
-- 
1.9.3

[dpdk-dev] [PATCH 05/37] ixgbe/base: add shift define for EEE_SU.TEEE_DLY

[Wenzhuo Lu]

Adds define for the number of bits needed to shift the EEE_SU register
in order to get the value of TEEE_DLY.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index eaaba44..576bb24 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -625,6 +625,7 @@ struct ixgbe_dmac_config {
 #define IXGBE_EEER			0x043A0 /* EEE register */
 #define IXGBE_EEE_STAT			0x04398 /* EEE Status */
 #define IXGBE_EEE_SU			0x04380 /* EEE Set up */
+#define IXGBE_EEE_SU_TEEE_DLY_SHIFT	26
 #define IXGBE_TLPIC			0x041F4 /* EEE Tx LPI count */
 #define IXGBE_RLPIC			0x041F8 /* EEE Rx LPI count */
 
-- 
1.9.3

[dpdk-dev] [PATCH 06/37] ixgbe/base: add x550em identify SFP module support

[Wenzhuo Lu]

This patch adds identify SFP module support for x550em. x550em
support returns an error for SFP module types not supported by
x550em design.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 101 +++++++++++++++++++++++++++---------
 drivers/net/ixgbe/base/ixgbe_x550.h |   1 +
 2 files changed, 77 insertions(+), 25 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 82414dc..e34778f 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -990,13 +990,82 @@ enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw)
 }
 
 /**
+ *  ixgbe_supported_sfp_modules_X550em - Check if SFP module type is supported
+ *  @hw: pointer to hardware structure
+ *  @linear: true if SFP module is linear
+ */
+STATIC s32 ixgbe_supported_sfp_modules_X550em(struct ixgbe_hw *hw, bool *linear)
+{
+	DEBUGFUNC("ixgbe_supported_sfp_modules_X550em");
+
+	switch (hw->phy.sfp_type) {
+	case ixgbe_sfp_type_not_present:
+		return IXGBE_SUCCESS;
+	case ixgbe_sfp_type_da_cu_core0:
+	case ixgbe_sfp_type_da_cu_core1:
+		*linear = true;
+		break;
+	case ixgbe_sfp_type_srlr_core0:
+	case ixgbe_sfp_type_srlr_core1:
+	case ixgbe_sfp_type_da_act_lmt_core0:
+	case ixgbe_sfp_type_da_act_lmt_core1:
+	case ixgbe_sfp_type_1g_sx_core0:
+	case ixgbe_sfp_type_1g_sx_core1:
+	case ixgbe_sfp_type_1g_lx_core0:
+	case ixgbe_sfp_type_1g_lx_core1:
+		*linear = false;
+		break;
+	case ixgbe_sfp_type_unknown:
+	case ixgbe_sfp_type_1g_cu_core0:
+	case ixgbe_sfp_type_1g_cu_core1:
+	default:
+		return IXGBE_ERR_SFP_NOT_SUPPORTED;
+	}
+
+	return IXGBE_SUCCESS;
+}
+
+/**
+ *  ixgbe_identify_sfp_module_X550em - Identifies SFP modules
+ *  @hw: pointer to hardware structure
+ *
+ *  Searches for and identifies the SFP module and assigns appropriate PHY type.
+ **/
+s32 ixgbe_identify_sfp_module_X550em(struct ixgbe_hw *hw)
+{
+	s32 status;
+	bool linear;
+
+	DEBUGFUNC("ixgbe_identify_sfp_module_X550em");
+
+	status = ixgbe_identify_module_generic(hw);
+
+	if (status != IXGBE_SUCCESS)
+		return status;
+
+	/* Check if SFP module is supported */
+	status = ixgbe_supported_sfp_modules_X550em(hw, &linear);
+
+	return status;
+}
+
+/**
  *  ixgbe_setup_sfp_modules_X550em - Setup MAC link ops
  *  @hw: pointer to hardware structure
  */
 s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw)
 {
+	s32 status;
+	bool linear;
+
 	DEBUGFUNC("ixgbe_setup_sfp_modules_X550em");
 
+	/* Check if SFP module is supported */
+	status = ixgbe_supported_sfp_modules_X550em(hw, &linear);
+
+	if (status != IXGBE_SUCCESS)
+		return status;
+
 	ixgbe_init_mac_link_ops_X550em(hw);
 	hw->phy.ops.reset = NULL;
 
@@ -1254,6 +1323,8 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
 	if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) {
 		phy->phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM;
 		ixgbe_setup_mux_ctl(hw);
+
+		phy->ops.identify_sfp = ixgbe_identify_sfp_module_X550em;
 	}
 
 	/* Identify the PHY or SFP module */
@@ -1651,31 +1722,11 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
 	bool setup_linear;
 	UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
 
-	/* Configure the external PHY. */
-	switch (hw->phy.sfp_type) {
-	case ixgbe_sfp_type_unknown:
-		return IXGBE_ERR_SFP_NOT_SUPPORTED;
-	case ixgbe_sfp_type_not_present:
-		return IXGBE_SUCCESS;
-	case ixgbe_sfp_type_da_cu_core0:
-	case ixgbe_sfp_type_da_cu_core1:
-		setup_linear = true;
-		break;
-	case ixgbe_sfp_type_srlr_core0:
-	case ixgbe_sfp_type_srlr_core1:
-	case ixgbe_sfp_type_da_act_lmt_core0:
-	case ixgbe_sfp_type_da_act_lmt_core1:
-	case ixgbe_sfp_type_1g_sx_core0:
-	case ixgbe_sfp_type_1g_sx_core1:
-#ifdef SUPPORT_1000BASE_LX
-	case ixgbe_sfp_type_1g_lx_core0:
-	case ixgbe_sfp_type_1g_lx_core1:
-#endif /* SUPPORT_1000BASE_LX */
-		setup_linear = false;
-		break;
-	default:
-		return IXGBE_ERR_SFP_NOT_SUPPORTED;
-	}
+	/* Check if SFP module is supported and linear */
+	ret_val = ixgbe_supported_sfp_modules_X550em(hw, &setup_linear);
+
+	if (ret_val != IXGBE_SUCCESS)
+		return ret_val;
 
 	/* Configure CS4227 for connection rate. */
 	reg_slice = IXGBE_CS4227_LINE_SPARE22_MSB + (hw->bus.lan_id << 12);
diff --git a/drivers/net/ixgbe/base/ixgbe_x550.h b/drivers/net/ixgbe/base/ixgbe_x550.h
index 4cfd49c..230b44f 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.h
+++ b/drivers/net/ixgbe/base/ixgbe_x550.h
@@ -102,4 +102,5 @@ s32 ixgbe_setup_mac_link_t_X550em(struct ixgbe_hw *hw,
 s32 ixgbe_check_link_t_X550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
 			      bool *link_up, bool link_up_wait_to_complete);
 s32 ixgbe_reset_phy_t_X550em(struct ixgbe_hw *hw);
+s32 ixgbe_identify_sfp_module_X550em(struct ixgbe_hw *hw);
 #endif /* _IXGBE_X550_H_ */
-- 
1.9.3

[dpdk-dev] [PATCH 07/37] ixgbe/base: fix potential warning

[Wenzhuo Lu]

Fix the warning caused by an uninitialized variable which might have
been used.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index e34778f..2aa1fc7 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -1719,7 +1719,7 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
 {
 	s32 ret_val;
 	u16 reg_slice, reg_val;
-	bool setup_linear;
+	bool setup_linear = false;
 	UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
 
 	/* Check if SFP module is supported and linear */
-- 
1.9.3

[dpdk-dev] [PATCH 08/37] ixgbe/base: return err when SFP module is not present

[Wenzhuo Lu]

This patch updates ixgbe_supported_sfp_modules_X550em to return
IXGBE_ERR_SFP_NOT_PRESENT when SFP module is not present and updates
ixgbe_setup_mac_link_sfp_x550em to handle this return value.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 2aa1fc7..1ae79d1 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -1000,7 +1000,7 @@ STATIC s32 ixgbe_supported_sfp_modules_X550em(struct ixgbe_hw *hw, bool *linear)
 
 	switch (hw->phy.sfp_type) {
 	case ixgbe_sfp_type_not_present:
-		return IXGBE_SUCCESS;
+		return IXGBE_ERR_SFP_NOT_PRESENT;
 	case ixgbe_sfp_type_da_cu_core0:
 	case ixgbe_sfp_type_da_cu_core1:
 		*linear = true;
@@ -1725,6 +1725,13 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
 	/* Check if SFP module is supported and linear */
 	ret_val = ixgbe_supported_sfp_modules_X550em(hw, &setup_linear);
 
+	/* If no SFP module present, then return success. Return success since
+	 * there is no reason to configure CS4227 and SFP not present error is
+	 * not excepted in the setup MAC link flow.
+	 */
+	if (ret_val == IXGBE_ERR_SFP_NOT_PRESENT)
+		return IXGBE_SUCCESS;
+
 	if (ret_val != IXGBE_SUCCESS)
 		return ret_val;
 
-- 
1.9.3

[dpdk-dev] [PATCH 09/37] ixgbe/base: power down the x550em PHY on overtemp events

[Wenzhuo Lu]

This patch powers down the x550em PHY on over-temp events. The
PHY firmware is supposed to do this autonomously but that isn't
implemented. The short-term stop-gap solution is for SW to power
down the PHY when it reports an overtemp event.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 1ae79d1..57ecaac 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -1193,8 +1193,11 @@ STATIC s32 ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc)
 		return status;
 
 	/* If high temperature failure, then return over temp error and exit */
-	if (reg & IXGBE_MDIO_GLOBAL_ALM_1_HI_TMP_FAIL)
+	if (reg & IXGBE_MDIO_GLOBAL_ALM_1_HI_TMP_FAIL) {
+		/* power down the PHY in case the PHY FW didn't already */
+		ixgbe_set_copper_phy_power(hw, false);
 		return IXGBE_ERR_OVERTEMP;
+	}
 
 	/* Vendor alarm 2 triggered */
 	status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,
-- 
1.9.3

[dpdk-dev] [PATCH 10/37] ixgbe/base: restore advertised autoneg after setting LPLU

[Wenzhuo Lu]

On systems that support LPLU in the firmware, the driver wouldn't be
aware of the LPLU speed change, and it wouldn't cache the new value when
the driver resumes. This patch emulates the same behavior by restoring
the previous autoneg settings to autoneg_advertised.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 57ecaac..3a4d725 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -2541,6 +2541,7 @@ s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
 	u16 autoneg_status, an_10g_cntl_reg, autoneg_reg, speed;
 	s32 status;
 	ixgbe_link_speed lcd_speed;
+	u32 save_autoneg;
 
 	/* If blocked by MNG FW, then don't restart AN */
 	if (ixgbe_check_reset_blocked(hw))
@@ -2616,9 +2617,14 @@ s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
 	if (status != IXGBE_SUCCESS)
 		return status;
 
+	save_autoneg = hw->phy.autoneg_advertised;
+
 	/* Setup link at least common link speed */
 	status = hw->mac.ops.setup_link(hw, lcd_speed, false);
 
+	/* restore autoneg from before setting lplu speed */
+	hw->phy.autoneg_advertised = save_autoneg;
+
 	return status;
 }
 
-- 
1.9.3

[dpdk-dev] [PATCH 11/37] ixgbe/base: fix UniPHY link configuration

[Wenzhuo Lu]

In UniPHY we have 2 IOSF targets that are UniPHY related. We can
write to PHY and PCS. In earlier times I've been told that there
were 2 separate PCS targets for IOSF commands and that's why I
implemented it with 2 defines and adding hw->bus.lan_id, but lately
I confirmed with HW that FW takes care of which PCS "slice" we are
talking to and is directing writes to correct one, so KX4_PCS1
target is dead now and we cannot use it.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h | 5 ++---
 drivers/net/ixgbe/base/ixgbe_x550.c | 4 ++--
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index 576bb24..de73172 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -3900,8 +3900,7 @@ struct ixgbe_hw {
 #define IXGBE_SB_IOSF_CTRL_BUSY_SHIFT		31
 #define IXGBE_SB_IOSF_CTRL_BUSY		(1 << IXGBE_SB_IOSF_CTRL_BUSY_SHIFT)
 #define IXGBE_SB_IOSF_TARGET_KR_PHY	0
-#define IXGBE_SB_IOSF_TARGET_KX4_UNIPHY	1
-#define IXGBE_SB_IOSF_TARGET_KX4_PCS0	2
-#define IXGBE_SB_IOSF_TARGET_KX4_PCS1	3
+#define IXGBE_SB_IOSF_TARGET_KX4_PHY	1
+#define IXGBE_SB_IOSF_TARGET_KX4_PCS	2
 
 #endif /* _IXGBE_TYPE_H_ */
diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 3a4d725..5eb0218 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -1572,7 +1572,7 @@ s32 ixgbe_setup_kx4_x550em(struct ixgbe_hw *hw)
 	u32 reg_val;
 
 	status = ixgbe_read_iosf_sb_reg_x550(hw, IXGBE_KX4_LINK_CNTL_1,
-		IXGBE_SB_IOSF_TARGET_KX4_PCS0 + hw->bus.lan_id, &reg_val);
+		IXGBE_SB_IOSF_TARGET_KX4_PCS, &reg_val);
 	if (status)
 		return status;
 
@@ -1592,7 +1592,7 @@ s32 ixgbe_setup_kx4_x550em(struct ixgbe_hw *hw)
 	/* Restart auto-negotiation. */
 	reg_val |= IXGBE_KX4_LINK_CNTL_1_TETH_AN_RESTART;
 	status = ixgbe_write_iosf_sb_reg_x550(hw, IXGBE_KX4_LINK_CNTL_1,
-		IXGBE_SB_IOSF_TARGET_KX4_PCS0 + hw->bus.lan_id, reg_val);
+		IXGBE_SB_IOSF_TARGET_KX4_PCS, reg_val);
 
 	return status;
 }
-- 
1.9.3

[dpdk-dev] [PATCH 12/37] ixgbe/base: add macro for x550em bus speed fuse

[Wenzhuo Lu]

x550em has two different bus speeds, 300 MHz and 400 MHz.
A bit in a fuse register tells which it is, with a 1 meaning
the bus is running at 300 MHz.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index de73172..c87b6a0 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -3832,6 +3832,8 @@ struct ixgbe_hw {
 
 #define IXGBE_NOT_IMPLEMENTED			0x7FFFFFFF
 
+#define IXGBE_FUSES0_GROUP(_i)         (0x11158 + ((_i) * 4))
+#define IXGBE_FUSES0_300MHZ            (1 << 5)
 
 #define IXGBE_KRM_PORT_CAR_GEN_CTRL(P)	((P == 0) ? (0x4010) : (0x8010))
 #define IXGBE_KRM_LINK_CTRL_1(P)	((P == 0) ? (0x420C) : (0x820C))
-- 
1.9.3

[dpdk-dev] [PATCH 13/37] ixgbe/base: add a new 82599 device ID

[Wenzhuo Lu]

Since this 82599 device supports WoL(Wake on LAN), driver needs
a define for the sub device ID.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index c87b6a0..5ee40a3 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -109,6 +109,7 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_SUBDEV_ID_82599_LOM_SNAP6		0x2159
 #define IXGBE_SUBDEV_ID_82599_SFP_1OCP		0x000D
 #define IXGBE_SUBDEV_ID_82599_SFP_2OCP		0x0008
+#define IXGBE_SUBDEV_ID_82599_SFP_LOM		0x06EE
 #define IXGBE_DEV_ID_82599_BACKPLANE_FCOE	0x152A
 #define IXGBE_DEV_ID_82599_SFP_FCOE		0x1529
 #define IXGBE_DEV_ID_82599_SFP_EM		0x1507
-- 
1.9.3

[dpdk-dev] [PATCH 14/37] ixgbe/base: enable FEC when EEE is disabled

[Wenzhuo Lu]

The FEC(Forward Error Correction) feature had been disabled
because it increases power consumption. However, some customers
want to use it. This patch enables FEC when EEE(Energy Efficient
Ethernet) is disabled; FEC was already being disabled when EEE
was enabled, but now both are done in the same function. The two
features are not allowed to be enabled at the same time. The two
features cannot both be disabled. If this ability is ever
determined to be needed, we will need to define a new user parameter
to control FEC independently of EEE.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 5eb0218..4d36ea7 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -620,6 +620,10 @@ s32 ixgbe_setup_eee_X550(struct ixgbe_hw *hw, bool enable_eee)
 			link_reg |= IXGBE_KRM_LINK_CTRL_1_TETH_EEE_CAP_KR |
 				    IXGBE_KRM_LINK_CTRL_1_TETH_EEE_CAP_KX;
 
+			/* Must disable FEC when EEE is enabled. */
+			link_reg &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_FEC_REQ |
+				IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_FEC);
+
 			status = ixgbe_write_iosf_sb_reg_x550(hw,
 				IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
 				IXGBE_SB_IOSF_TARGET_KR_PHY, link_reg);
@@ -650,6 +654,10 @@ s32 ixgbe_setup_eee_X550(struct ixgbe_hw *hw, bool enable_eee)
 			link_reg &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_EEE_CAP_KR |
 				IXGBE_KRM_LINK_CTRL_1_TETH_EEE_CAP_KX);
 
+			/* Enable FEC when EEE is disabled. */
+			link_reg |= (IXGBE_KRM_LINK_CTRL_1_TETH_AN_FEC_REQ |
+				IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_FEC);
+
 			status = ixgbe_write_iosf_sb_reg_x550(hw,
 				IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
 				IXGBE_SB_IOSF_TARGET_KR_PHY, link_reg);
@@ -1538,8 +1546,6 @@ s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw)
 		return status;
 
 	reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE;
-	reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_FEC_REQ |
-		     IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_FEC);
 	reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR |
 		     IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX);
 
-- 
1.9.3

[dpdk-dev] [PATCH 15/37] ixgbe/base: release semaphores in proper order

[Wenzhuo Lu]

Because we acquire two semaphore bits before setting the SWFW_SYNC
register, we should release them in the reverse order that they
were acquired.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x540.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x540.c b/drivers/net/ixgbe/base/ixgbe_x540.c
index af29b13..4891702 100644
--- a/drivers/net/ixgbe/base/ixgbe_x540.c
+++ b/drivers/net/ixgbe/base/ixgbe_x540.c
@@ -931,14 +931,14 @@ STATIC void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw)
 
 	/* Release both semaphores by writing 0 to the bits REGSMP and SMBI */
 
-	swsm = IXGBE_READ_REG(hw, IXGBE_SWSM);
-	swsm &= ~IXGBE_SWSM_SMBI;
-	IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);
-
 	swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC);
 	swsm &= ~IXGBE_SWFW_REGSMP;
 	IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swsm);
 
+	swsm = IXGBE_READ_REG(hw, IXGBE_SWSM);
+	swsm &= ~IXGBE_SWSM_SMBI;
+	IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);
+
 	IXGBE_WRITE_FLUSH(hw);
 }
 
-- 
1.9.3

[dpdk-dev] [PATCH 16/37] ixgbe/base: add wait helper for IOSF accesses

[Wenzhuo Lu]

Add a helper function to wait for IOSF accesses to complete. Also
perform this wait before each access, as specified in the datasheet.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 85 ++++++++++++++++++++++---------------
 1 file changed, 50 insertions(+), 35 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 4d36ea7..0109938 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -723,6 +723,39 @@ void ixgbe_set_ethertype_anti_spoofing_X550(struct ixgbe_hw *hw,
 }
 
 /**
+ * ixgbe_iosf_wait - Wait for IOSF command completion
+ * @hw: pointer to hardware structure
+ * @ctrl: pointer to location to receive final IOSF control value
+ *
+ * Returns failing status on timeout
+ *
+ * Note: ctrl can be NULL if the IOSF control register value is not needed
+ **/
+STATIC s32 ixgbe_iosf_wait(struct ixgbe_hw *hw, u32 *ctrl)
+{
+	u32 i, command = 0;
+
+	/* Check every 10 usec to see if the address cycle completed.
+	 * The SB IOSF BUSY bit will clear when the operation is
+	 * complete
+	 */
+	for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
+		command = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL);
+		if ((command & IXGBE_SB_IOSF_CTRL_BUSY) == 0)
+			break;
+		usec_delay(10);
+	}
+	if (ctrl)
+		*ctrl = command;
+	if (i == IXGBE_MDIO_COMMAND_TIMEOUT) {
+		ERROR_REPORT1(IXGBE_ERROR_POLLING, "Wait timed out\n");
+		return IXGBE_ERR_PHY;
+	}
+
+	return IXGBE_SUCCESS;
+}
+
+/**
  *  ixgbe_write_iosf_sb_reg_x550 - Writes a value to specified register of the IOSF
  *  device
  *  @hw: pointer to hardware structure
@@ -733,7 +766,12 @@ void ixgbe_set_ethertype_anti_spoofing_X550(struct ixgbe_hw *hw,
 s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
 			    u32 device_type, u32 data)
 {
-	u32 i, command, error;
+	u32 command, error;
+	s32 ret;
+
+	ret = ixgbe_iosf_wait(hw, NULL);
+	if (ret != IXGBE_SUCCESS)
+		return ret;
 
 	command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) |
 		   (device_type << IXGBE_SB_IOSF_CTRL_TARGET_SELECT_SHIFT));
@@ -743,18 +781,8 @@ s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
 
 	/* Write IOSF data register */
 	IXGBE_WRITE_REG(hw, IXGBE_SB_IOSF_INDIRECT_DATA, data);
-	/*
-	 * Check every 10 usec to see if the address cycle completed.
-	 * The SB IOSF BUSY bit will clear when the operation is
-	 * complete
-	 */
-	for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
-		usec_delay(10);
 
-		command = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL);
-		if ((command & IXGBE_SB_IOSF_CTRL_BUSY) == 0)
-			break;
-	}
+	ret = ixgbe_iosf_wait(hw, &command);
 
 	if ((command & IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK) != 0) {
 		error = (command & IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK) >>
@@ -764,12 +792,7 @@ s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
 		return IXGBE_ERR_PHY;
 	}
 
-	if (i == IXGBE_MDIO_COMMAND_TIMEOUT) {
-		ERROR_REPORT1(IXGBE_ERROR_POLLING, "Write timed out\n");
-		return IXGBE_ERR_PHY;
-	}
-
-	return IXGBE_SUCCESS;
+	return ret;
 }
 
 /**
@@ -783,7 +806,12 @@ s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
 s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
 			   u32 device_type, u32 *data)
 {
-	u32 i, command, error;
+	u32 command, error;
+	s32 ret;
+
+	ret = ixgbe_iosf_wait(hw, NULL);
+	if (ret != IXGBE_SUCCESS)
+		return ret;
 
 	command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) |
 		   (device_type << IXGBE_SB_IOSF_CTRL_TARGET_SELECT_SHIFT));
@@ -791,18 +819,7 @@ s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
 	/* Write IOSF control register */
 	IXGBE_WRITE_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL, command);
 
-	/*
-	 * Check every 10 usec to see if the address cycle completed.
-	 * The SB IOSF BUSY bit will clear when the operation is
-	 * complete
-	 */
-	for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
-		usec_delay(10);
-
-		command = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL);
-		if ((command & IXGBE_SB_IOSF_CTRL_BUSY) == 0)
-			break;
-	}
+	ret = ixgbe_iosf_wait(hw, &command);
 
 	if ((command & IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK) != 0) {
 		error = (command & IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK) >>
@@ -812,10 +829,8 @@ s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
 		return IXGBE_ERR_PHY;
 	}
 
-	if (i == IXGBE_MDIO_COMMAND_TIMEOUT) {
-		ERROR_REPORT1(IXGBE_ERROR_POLLING, "Read timed out\n");
-		return IXGBE_ERR_PHY;
-	}
+	if (ret != IXGBE_SUCCESS)
+		return ret;
 
 	*data = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_DATA);
 
-- 
1.9.3

[dpdk-dev] [PATCH 17/37] ixgbe/base: use a semaphore to serialize IOSF accesses

[Wenzhuo Lu]

Because each IOSF access requires the use of multiple registers,
use a semaphore to serialize those accesses.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 30 +++++++++++++++++++++---------
 1 file changed, 21 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 0109938..3e8ea74 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -766,13 +766,18 @@ STATIC s32 ixgbe_iosf_wait(struct ixgbe_hw *hw, u32 *ctrl)
 s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
 			    u32 device_type, u32 data)
 {
+	u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM;
 	u32 command, error;
 	s32 ret;
 
-	ret = ixgbe_iosf_wait(hw, NULL);
+	ret = ixgbe_acquire_swfw_semaphore(hw, gssr);
 	if (ret != IXGBE_SUCCESS)
 		return ret;
 
+	ret = ixgbe_iosf_wait(hw, NULL);
+	if (ret != IXGBE_SUCCESS)
+		goto out;
+
 	command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) |
 		   (device_type << IXGBE_SB_IOSF_CTRL_TARGET_SELECT_SHIFT));
 
@@ -789,9 +794,11 @@ s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
 			 IXGBE_SB_IOSF_CTRL_CMPL_ERR_SHIFT;
 		ERROR_REPORT2(IXGBE_ERROR_POLLING,
 			      "Failed to write, error %x\n", error);
-		return IXGBE_ERR_PHY;
+		ret = IXGBE_ERR_PHY;
 	}
 
+out:
+	ixgbe_release_swfw_semaphore(hw, gssr);
 	return ret;
 }
 
@@ -806,13 +813,18 @@ s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
 s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
 			   u32 device_type, u32 *data)
 {
+	u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM;
 	u32 command, error;
 	s32 ret;
 
-	ret = ixgbe_iosf_wait(hw, NULL);
+	ret = ixgbe_acquire_swfw_semaphore(hw, gssr);
 	if (ret != IXGBE_SUCCESS)
 		return ret;
 
+	ret = ixgbe_iosf_wait(hw, NULL);
+	if (ret != IXGBE_SUCCESS)
+		goto out;
+
 	command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) |
 		   (device_type << IXGBE_SB_IOSF_CTRL_TARGET_SELECT_SHIFT));
 
@@ -826,15 +838,15 @@ s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
 			 IXGBE_SB_IOSF_CTRL_CMPL_ERR_SHIFT;
 		ERROR_REPORT2(IXGBE_ERROR_POLLING,
 				"Failed to read, error %x\n", error);
-		return IXGBE_ERR_PHY;
+		ret = IXGBE_ERR_PHY;
 	}
 
-	if (ret != IXGBE_SUCCESS)
-		return ret;
+	if (ret == IXGBE_SUCCESS)
+		*data = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_DATA);
 
-	*data = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_DATA);
-
-	return IXGBE_SUCCESS;
+out:
+	ixgbe_release_swfw_semaphore(hw, gssr);
+	return ret;
 }
 
 /**
-- 
1.9.3

[dpdk-dev] [PATCH 18/37] ixgbe/base: check for functional ucode

[Wenzhuo Lu]

During init, check the ucode running in the CS4227. If
it is not responding correctly, reset the part. This is
a global reset so it must only be done the first time a
driver loads after power-on.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 78 +++++++++++++++++++++++++++++++++++--
 1 file changed, 75 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 3e8ea74..e4e8cff 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -118,6 +118,7 @@ STATIC s32 ixgbe_get_cs4227_status(struct ixgbe_hw *hw)
 {
 	s32 status;
 	u16 value = 0;
+	u16 reg_slice, reg_val;
 	u8 retry;
 
 	for (retry = 0; retry < IXGBE_CS4227_RETRIES; ++retry) {
@@ -132,6 +133,77 @@ STATIC s32 ixgbe_get_cs4227_status(struct ixgbe_hw *hw)
 	if (value != IXGBE_CS4227_GLOBAL_ID_VALUE)
 		return IXGBE_ERR_PHY;
 
+	status = ixgbe_read_cs4227(hw, IXGBE_CS4227_SCRATCH, &value);
+	if (status != IXGBE_SUCCESS)
+		return status;
+
+	/* If this is the first time after power-on, check the ucode.
+	 * Otherwise, this will disrupt link on all ports. Because we
+	 * can only do this the first time, we must check all ports,
+	 * not just our own.
+	 */
+	if (value != IXGBE_CS4227_SCRATCH_VALUE) {
+		reg_slice = IXGBE_CS4227_LINE_SPARE24_LSB;
+		reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
+		status = ixgbe_write_cs4227(hw, reg_slice, reg_val);
+		if (status != IXGBE_SUCCESS)
+			return status;
+
+		reg_slice = IXGBE_CS4227_HOST_SPARE24_LSB;
+		reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1;
+		status = ixgbe_write_cs4227(hw, reg_slice, reg_val);
+		if (status != IXGBE_SUCCESS)
+			return status;
+
+		reg_slice = IXGBE_CS4227_LINE_SPARE24_LSB + (1 << 12);
+		reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
+		status = ixgbe_write_cs4227(hw, reg_slice, reg_val);
+		if (status != IXGBE_SUCCESS)
+			return status;
+
+		reg_slice = IXGBE_CS4227_HOST_SPARE24_LSB + (1 << 12);
+		reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1;
+		status = ixgbe_write_cs4227(hw, reg_slice, reg_val);
+		if (status != IXGBE_SUCCESS)
+			return status;
+
+		msec_delay(10);
+	}
+
+	/* Verify that the ucode is operational on all ports. */
+	reg_slice = IXGBE_CS4227_LINE_SPARE24_LSB;
+	reg_val = 0xFFFF;
+	status = ixgbe_read_cs4227(hw, reg_slice, &reg_val);
+	if (status != IXGBE_SUCCESS)
+		return status;
+	if (reg_val != 0)
+		return IXGBE_ERR_PHY;
+
+	reg_slice = IXGBE_CS4227_HOST_SPARE24_LSB;
+	reg_val = 0xFFFF;
+	status = ixgbe_read_cs4227(hw, reg_slice, &reg_val);
+	if (status != IXGBE_SUCCESS)
+		return status;
+	if (reg_val != 0)
+		return IXGBE_ERR_PHY;
+
+	reg_slice = IXGBE_CS4227_LINE_SPARE24_LSB + (1 << 12);
+	reg_val = 0xFFFF;
+	status = ixgbe_read_cs4227(hw, reg_slice, &reg_val);
+	if (status != IXGBE_SUCCESS)
+		return status;
+	if (reg_val != 0)
+		return IXGBE_ERR_PHY;
+
+	reg_slice = IXGBE_CS4227_HOST_SPARE24_LSB + (1 << 12);
+	reg_val = 0xFFFF;
+	status = ixgbe_read_cs4227(hw, reg_slice, &reg_val);
+	if (status != IXGBE_SUCCESS)
+		return status;
+	if (reg_val != 0)
+		return IXGBE_ERR_PHY;
+
+	/* Set scratch indicating that the diagnostic was successful. */
 	status = ixgbe_write_cs4227(hw, IXGBE_CS4227_SCRATCH,
 				    IXGBE_CS4227_SCRATCH_VALUE);
 	if (status != IXGBE_SUCCESS)
@@ -141,6 +213,7 @@ STATIC s32 ixgbe_get_cs4227_status(struct ixgbe_hw *hw)
 		return status;
 	if (value != IXGBE_CS4227_SCRATCH_VALUE)
 		return IXGBE_ERR_PHY;
+
 	return IXGBE_SUCCESS;
 }
 
@@ -1771,13 +1844,12 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
 	if (ret_val != IXGBE_SUCCESS)
 		return ret_val;
 
-	/* Configure CS4227 for connection rate. */
+	/* Configure CS4227 for LINE connection rate then type. */
 	reg_slice = IXGBE_CS4227_LINE_SPARE22_MSB + (hw->bus.lan_id << 12);
 	reg_val = (speed & IXGBE_LINK_SPEED_10GB_FULL) ? 0 : 0x8000;
 	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
 					   reg_val);
 
-	/* Configure CS4227 for connection type. */
 	reg_slice = IXGBE_CS4227_LINE_SPARE24_LSB + (hw->bus.lan_id << 12);
 	if (setup_linear)
 		reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1;
@@ -1786,12 +1858,12 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
 	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
 					   reg_val);
 
+	/* Configure CS4227 for HOST connection rate then type. */
 	reg_slice = IXGBE_CS4227_HOST_SPARE22_MSB + (hw->bus.lan_id << 12);
 	reg_val = (speed & IXGBE_LINK_SPEED_10GB_FULL) ? 0 : 0x8000;
 	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
 					   reg_val);
 
-	/* Configure CS4227 for connection type. */
 	reg_slice = IXGBE_CS4227_HOST_SPARE24_LSB + (hw->bus.lan_id << 12);
 	if (setup_linear)
 		reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1;
-- 
1.9.3

[dpdk-dev] [PATCH 19/37] ixgbe/base: add KR/iXFI internal link mode support

[Wenzhuo Lu]

This patch adds support for x550em KR/iXFI internal link modes. The initial
x550em-10GBASET and x550em-SFP designs use iXFI internal link mode between
the internal PHY and the external PHY.
However future designs will use a KR internal link. This patch is intended
to future proof the driver by adding the KR internal link support in the
driver now.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h |   4 ++
 drivers/net/ixgbe/base/ixgbe_x550.c | 123 +++++++++++++++++++++++++-----------
 2 files changed, 89 insertions(+), 38 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index 5ee40a3..672d0a5 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -3733,6 +3733,7 @@ struct ixgbe_phy_info {
 	bool multispeed_fiber;
 	bool reset_if_overtemp;
 	bool qsfp_shared_i2c_bus;
+	u32 nw_mng_if_sel;
 };
 
 #include "ixgbe_mbx.h"
@@ -3906,4 +3907,7 @@ struct ixgbe_hw {
 #define IXGBE_SB_IOSF_TARGET_KX4_PHY	1
 #define IXGBE_SB_IOSF_TARGET_KX4_PCS	2
 
+#define IXGBE_NW_MNG_IF_SEL		0x00011178
+#define IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE (1 << 24)
+
 #endif /* _IXGBE_TYPE_H_ */
diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index e4e8cff..2a7046c 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -1415,6 +1415,48 @@ STATIC s32 ixgbe_enable_lasi_ext_t_x550em(struct ixgbe_hw *hw)
 }
 
 /**
+ *  ixgbe_setup_kr_speed_x550em - Configure the KR PHY for link speed.
+ *  @hw: pointer to hardware structure
+ *  @speed: link speed
+ *
+ *  Configures the integrated KR PHY.
+ **/
+STATIC s32 ixgbe_setup_kr_speed_x550em(struct ixgbe_hw *hw,
+				       ixgbe_link_speed speed)
+{
+	s32 status;
+	u32 reg_val;
+
+	status = ixgbe_read_iosf_sb_reg_x550(hw,
+		IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
+		IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);
+	if (status)
+		return status;
+
+	reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE;
+	reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_FEC_REQ |
+		     IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_FEC);
+	reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR |
+		     IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX);
+
+	/* Advertise 10G support. */
+	if (speed & IXGBE_LINK_SPEED_10GB_FULL)
+		reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR;
+
+	/* Advertise 1G support. */
+	if (speed & IXGBE_LINK_SPEED_1GB_FULL)
+		reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX;
+
+	/* Restart auto-negotiation. */
+	reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_RESTART;
+	status = ixgbe_write_iosf_sb_reg_x550(hw,
+		IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
+		IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);
+
+	return status;
+}
+
+/**
  *  ixgbe_init_phy_ops_X550em - PHY/SFP specific init
  *  @hw: pointer to hardware structure
  *
@@ -1425,6 +1467,7 @@ STATIC s32 ixgbe_enable_lasi_ext_t_x550em(struct ixgbe_hw *hw)
 s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
 {
 	struct ixgbe_phy_info *phy = &hw->phy;
+	ixgbe_link_speed speed;
 	s32 ret_val;
 
 	DEBUGFUNC("ixgbe_init_phy_ops_X550em");
@@ -1435,6 +1478,18 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
 		phy->phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM;
 		ixgbe_setup_mux_ctl(hw);
 
+		/* Save NW management interface connected on board. This is used
+		 * to determine internal PHY mode.
+		 */
+		phy->nw_mng_if_sel = IXGBE_READ_REG(hw, IXGBE_NW_MNG_IF_SEL);
+
+		/* If internal PHY mode is KR, then initialize KR link */
+		if (phy->nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE) {
+			speed = IXGBE_LINK_SPEED_10GB_FULL |
+				IXGBE_LINK_SPEED_1GB_FULL;
+			ret_val = ixgbe_setup_kr_speed_x550em(hw, speed);
+		}
+
 		phy->ops.identify_sfp = ixgbe_identify_sfp_module_X550em;
 	}
 
@@ -1461,8 +1516,23 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
 		phy->ops.write_reg = ixgbe_write_phy_reg_x550em;
 		break;
 	case ixgbe_phy_x550em_ext_t:
-		phy->ops.setup_internal_link =
-					 ixgbe_setup_internal_phy_t_x550em;
+		/* Save NW management interface connected on board. This is used
+		 * to determine internal PHY mode
+		 */
+		phy->nw_mng_if_sel = IXGBE_READ_REG(hw, IXGBE_NW_MNG_IF_SEL);
+
+		/* If internal link mode is XFI, then setup iXFI internal link,
+		 * else setup KR now.
+		 */
+		if (!(phy->nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE)) {
+			phy->ops.setup_internal_link =
+					      ixgbe_setup_internal_phy_t_x550em;
+		} else {
+			speed = IXGBE_LINK_SPEED_10GB_FULL |
+				IXGBE_LINK_SPEED_1GB_FULL;
+			ret_val = ixgbe_setup_kr_speed_x550em(hw, speed);
+		}
+
 		phy->ops.enter_lplu = ixgbe_enter_lplu_t_x550em;
 		phy->ops.handle_lasi = ixgbe_handle_lasi_ext_t_x550em;
 		phy->ops.reset = ixgbe_reset_phy_t_X550em;
@@ -1636,34 +1706,7 @@ s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw)
  **/
 s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw)
 {
-	s32 status;
-	u32 reg_val;
-
-	status = ixgbe_read_iosf_sb_reg_x550(hw,
-		IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
-		IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);
-	if (status)
-		return status;
-
-	reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE;
-	reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR |
-		     IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX);
-
-	/* Advertise 10G support. */
-	if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
-		reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR;
-
-	/* Advertise 1G support. */
-	if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
-		reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX;
-
-	/* Restart auto-negotiation. */
-	reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_RESTART;
-	status = ixgbe_write_iosf_sb_reg_x550(hw,
-		IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
-		IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);
-
-	return status;
+	return ixgbe_setup_kr_speed_x550em(hw, hw->phy.autoneg_advertised);
 }
 
 /**
@@ -1817,10 +1860,10 @@ STATIC s32 ixgbe_setup_ixfi_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed)
 }
 
 /**
- *  ixgbe_setup_mac_link_sfp_x550em - Configure the CS4227 & KR PHY for SFP
+ *  ixgbe_setup_mac_link_sfp_x550em - Setup internal/external the PHY for SFP
  *  @hw: pointer to hardware structure
  *
- *  Configure the external CS4227 PHY and the integrated KR PHY for SFP support.
+ *  Configure the external PHY and the integrated KR PHY for SFP support.
  **/
 s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
 				    ixgbe_link_speed speed,
@@ -1872,8 +1915,9 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
 	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
 					   reg_val);
 
-	/* Configure the internal PHY. */
-	ret_val = ixgbe_setup_ixfi_x550em(hw, &speed);
+	/* If internal link mode is XFI, then setup XFI internal link. */
+	if (!(hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE))
+		ret_val = ixgbe_setup_ixfi_x550em(hw, &speed);
 
 	return ret_val;
 }
@@ -2935,7 +2979,7 @@ s32 ixgbe_handle_lasi_ext_t_x550em(struct ixgbe_hw *hw)
 		return status;
 
 	if (lsc)
-		return ixgbe_setup_internal_phy_t_x550em(hw);
+		return ixgbe_setup_internal_phy(hw);
 
 	return IXGBE_SUCCESS;
 }
@@ -2968,10 +3012,13 @@ s32 ixgbe_setup_mac_link_t_X550em(struct ixgbe_hw *hw,
 	else
 		force_speed = IXGBE_LINK_SPEED_1GB_FULL;
 
-	status = ixgbe_setup_ixfi_x550em(hw, &force_speed);
+	/* If internal link mode is XFI, then setup XFI internal link. */
+	if (!(hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE)) {
+		status = ixgbe_setup_ixfi_x550em(hw, &force_speed);
 
-	if (status != IXGBE_SUCCESS)
-		return status;
+		if (status != IXGBE_SUCCESS)
+			return status;
+	}
 
 	return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait_to_complete);
 }
-- 
1.9.3

[dpdk-dev] [PATCH 20/37] ixgbe/base: check link again after getting speed

[Wenzhuo Lu]

Ensure link is still up after getting the speed, to ensure that the
speed read is valid.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 79 ++++++++++++++++++++++++++-----------
 1 file changed, 57 insertions(+), 22 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 2a7046c..a7e95d9 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -1860,6 +1860,38 @@ STATIC s32 ixgbe_setup_ixfi_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed)
 }
 
 /**
+ * ixgbe_ext_phy_t_x550em_get_link - Get ext phy link status
+ * @hw: address of hardware structure
+ * @link_up: address of boolean to indicate link status
+ *
+ * Returns error code if unable to get link status.
+ */
+STATIC s32 ixgbe_ext_phy_t_x550em_get_link(struct ixgbe_hw *hw, bool *link_up)
+{
+	u32 ret;
+	u16 autoneg_status;
+
+	*link_up = false;
+
+	/* read this twice back to back to indicate current status */
+	ret = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,
+				   IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
+				   &autoneg_status);
+	if (ret != IXGBE_SUCCESS)
+		return ret;
+
+	ret = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,
+				   IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
+				   &autoneg_status);
+	if (ret != IXGBE_SUCCESS)
+		return ret;
+
+	*link_up = !!(autoneg_status & IXGBE_MDIO_AUTO_NEG_LINK_STATUS);
+
+	return IXGBE_SUCCESS;
+}
+
+/**
  *  ixgbe_setup_mac_link_sfp_x550em - Setup internal/external the PHY for SFP
  *  @hw: pointer to hardware structure
  *
@@ -1936,33 +1968,34 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
  */
 s32 ixgbe_setup_internal_phy_t_x550em(struct ixgbe_hw *hw)
 {
-	u32 status;
-	u16 autoneg_status, speed;
 	ixgbe_link_speed force_speed;
+	bool link_up;
+	u32 status;
+	u16 speed;
 
 	if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_copper)
 		return IXGBE_ERR_CONFIG;
 
-	/* read this twice back to back to indicate current status */
-	status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,
-				      IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
-				      &autoneg_status);
-	if (status != IXGBE_SUCCESS)
-		return status;
-
-	status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,
-				      IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
-				      &autoneg_status);
+	/* If link is not up, then there is no setup necessary so return  */
+	status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up);
 	if (status != IXGBE_SUCCESS)
 		return status;
 
-	/* If link is not up, then there is no setup necessary so return  */
-	if (!(autoneg_status & IXGBE_MDIO_AUTO_NEG_LINK_STATUS))
+	if (!link_up)
 		return IXGBE_SUCCESS;
 
 	status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_STAT,
 				      IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
 				      &speed);
+	if (status != IXGBE_SUCCESS)
+		return status;
+
+	/* If link is not still up, then no setup is necessary so return */
+	status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up);
+	if (status != IXGBE_SUCCESS)
+		return status;
+	if (!link_up)
+		return IXGBE_SUCCESS;
 
 	/* clear everything but the speed and duplex bits */
 	speed &= IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_MASK;
@@ -2687,19 +2720,17 @@ void ixgbe_disable_rx_x550(struct ixgbe_hw *hw)
  **/
 s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
 {
-	u16 autoneg_status, an_10g_cntl_reg, autoneg_reg, speed;
+	u16 an_10g_cntl_reg, autoneg_reg, speed;
 	s32 status;
 	ixgbe_link_speed lcd_speed;
 	u32 save_autoneg;
+	bool link_up;
 
 	/* If blocked by MNG FW, then don't restart AN */
 	if (ixgbe_check_reset_blocked(hw))
 		return IXGBE_SUCCESS;
 
-	status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,
-				      IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
-				      &autoneg_status);
-
+	status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up);
 	if (status != IXGBE_SUCCESS)
 		return status;
 
@@ -2711,8 +2742,7 @@ s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
 	/* If link is down, LPLU disabled in NVM, WoL disabled, or manageability
 	 * disabled, then force link down by entering low power mode.
 	 */
-	if (!(autoneg_status & IXGBE_MDIO_AUTO_NEG_LINK_STATUS) ||
-	    !(hw->eeprom.ctrl_word_3 & NVM_INIT_CTRL_3_LPLU) ||
+	if (!link_up || !(hw->eeprom.ctrl_word_3 & NVM_INIT_CTRL_3_LPLU) ||
 	    !(hw->wol_enabled || ixgbe_mng_present(hw)))
 		return ixgbe_set_copper_phy_power(hw, FALSE);
 
@@ -2733,6 +2763,11 @@ s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
 	if (status != IXGBE_SUCCESS)
 		return status;
 
+	/* If no link now, speed is invalid so take link down */
+	status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up);
+	if (status != IXGBE_SUCCESS)
+		return ixgbe_set_copper_phy_power(hw, false);
+
 	/* clear everything but the speed bits */
 	speed &= IXGBE_MDIO_AUTO_NEG_VEN_STAT_SPEED_MASK;
 
@@ -2746,7 +2781,7 @@ s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
 	/* Clear AN completed indication */
 	status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM,
 				      IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
-				      &autoneg_status);
+				      &autoneg_reg);
 
 	if (status != IXGBE_SUCCESS)
 		return status;
-- 
1.9.3

[dpdk-dev] [PATCH 21/37] ixgbe/base: config MDIO clock for x550em

[Wenzhuo Lu]

The MDIO clock needs to be configured for a specific speed for
x550em. We expected this to be done automatically, but in
the early days of the project this was not happening. We put
code in to do this ourselves.
Eventually, we decided that there is no harm in having SW do
this all the time, so we may not remove this code in the future.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index a7e95d9..c2c0014 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -38,6 +38,7 @@ POSSIBILITY OF SUCH DAMAGE.
 #include "ixgbe_common.h"
 #include "ixgbe_phy.h"
 
+STATIC s32 ixgbe_setup_ixfi_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed);
 
 /**
  *  ixgbe_init_ops_X550 - Inits func ptrs and MAC type
@@ -1557,6 +1558,7 @@ s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
 	s32 status;
 	u32 ctrl = 0;
 	u32 i;
+	u32 hlreg0;
 	bool link_up = false;
 
 	DEBUGFUNC("ixgbe_reset_hw_X550em");
@@ -1648,6 +1650,12 @@ mac_reset_top:
 	hw->mac.num_rar_entries = 128;
 	hw->mac.ops.init_rx_addrs(hw);
 
+	if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
+		/* Config MDIO clock speed. */
+		hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
+		hlreg0 &= ~IXGBE_HLREG0_MDCSPD;
+		IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
+	}
 
 	if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP)
 		ixgbe_setup_mux_ctl(hw);
-- 
1.9.3

[dpdk-dev] [PATCH 22/37] ixgbe/base: add support for led_on and led_off for X557 PHY LEDs

[Wenzhuo Lu]

This patch implements ixgbe_led_on_t_X550em and ixgbe_led_off_t_X550em
function for turning on and off LEDs on X557 external PHY.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h |  3 +++
 drivers/net/ixgbe/base/ixgbe_x550.c | 52 +++++++++++++++++++++++++++++++++++++
 drivers/net/ixgbe/base/ixgbe_x550.h |  2 ++
 3 files changed, 57 insertions(+)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index 672d0a5..6eb3421 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -1931,6 +1931,9 @@ enum {
 #define IXGBE_LED_IVRT(_i)	IXGBE_LED_OFFSET(IXGBE_LED_IVRT_BASE, _i)
 #define IXGBE_LED_BLINK(_i)	IXGBE_LED_OFFSET(IXGBE_LED_BLINK_BASE, _i)
 #define IXGBE_LED_MODE_MASK(_i)	IXGBE_LED_OFFSET(IXGBE_LED_MODE_MASK_BASE, _i)
+#define IXGBE_X557_LED_MANUAL_SET_MASK	(1 << 8)
+#define IXGBE_X557_MAX_LED_INDEX	3
+#define IXGBE_X557_LED_PROVISIONING	0xC430
 
 /* LED modes */
 #define IXGBE_LED_LINK_UP	0x0
diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index c2c0014..c9b1465 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -80,6 +80,10 @@ s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw)
 	mac->ops.mdd_event = ixgbe_mdd_event_X550;
 	mac->ops.restore_mdd_vf = ixgbe_restore_mdd_vf_X550;
 	mac->ops.disable_rx = ixgbe_disable_rx_x550;
+	if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
+		hw->mac.ops.led_on = ixgbe_led_on_t_X550em;
+		hw->mac.ops.led_off = ixgbe_led_off_t_X550em;
+	}
 	return ret_val;
 }
 
@@ -3131,3 +3135,51 @@ s32 ixgbe_reset_phy_t_X550em(struct ixgbe_hw *hw)
 	/* Configure Link Status Alarm and Temperature Threshold interrupts */
 	return ixgbe_enable_lasi_ext_t_x550em(hw);
 }
+
+/**
+ *  ixgbe_led_on_t_X550em - Turns on the software controllable LEDs.
+ *  @hw: pointer to hardware structure
+ *  @led_idx: led number to turn on
+ **/
+s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx)
+{
+	u16 phy_data;
+
+	DEBUGFUNC("ixgbe_led_on_t_X550em");
+
+	if (led_idx >= IXGBE_X557_MAX_LED_INDEX)
+		return IXGBE_ERR_PARAM;
+
+	/* To turn on the LED, set mode to ON. */
+	ixgbe_read_phy_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,
+			   IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, &phy_data);
+	phy_data |= IXGBE_X557_LED_MANUAL_SET_MASK;
+	ixgbe_write_phy_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,
+			    IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, phy_data);
+
+	return IXGBE_SUCCESS;
+}
+
+/**
+ *  ixgbe_led_off_t_X550em - Turns off the software controllable LEDs.
+ *  @hw: pointer to hardware structure
+ *  @led_idx: led number to turn off
+ **/
+s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx)
+{
+	u16 phy_data;
+
+	DEBUGFUNC("ixgbe_led_off_t_X550em");
+
+	if (led_idx >= IXGBE_X557_MAX_LED_INDEX)
+		return IXGBE_ERR_PARAM;
+
+	/* To turn on the LED, set mode to ON. */
+	ixgbe_read_phy_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,
+			   IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, &phy_data);
+	phy_data &= ~IXGBE_X557_LED_MANUAL_SET_MASK;
+	ixgbe_write_phy_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,
+			    IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, phy_data);
+
+	return IXGBE_SUCCESS;
+}
diff --git a/drivers/net/ixgbe/base/ixgbe_x550.h b/drivers/net/ixgbe/base/ixgbe_x550.h
index 230b44f..4f986e8 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.h
+++ b/drivers/net/ixgbe/base/ixgbe_x550.h
@@ -103,4 +103,6 @@ s32 ixgbe_check_link_t_X550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
 			      bool *link_up, bool link_up_wait_to_complete);
 s32 ixgbe_reset_phy_t_X550em(struct ixgbe_hw *hw);
 s32 ixgbe_identify_sfp_module_X550em(struct ixgbe_hw *hw);
+s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx);
+s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx);
 #endif /* _IXGBE_X550_H_ */
-- 
1.9.3

[dpdk-dev] [PATCH 23/37] ixgbe/base: update EEE/FEC support for device X550EM_X_KR

[Wenzhuo Lu]

EEE(Energy Efficient Ethernet) is not supported on the initial revision
of IXGBE_DEV_ID_X550EM_X_KR. We determine the revision by reading a fuse
register.

Also, the requirements for FEC(Forward Error Correction) have changed
slightly. Now, we don't change the "request" bit at all. When EEE is
enabled, we advertise that we are capable. When EEE is disabled, we do
not advertise that we are capable. This change makes us consistent with
the power-on defaults that are in the NVM.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h |  6 ++++--
 drivers/net/ixgbe/base/ixgbe_x550.c | 16 ++++++++++------
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index 6eb3421..d6ec699 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -3837,8 +3837,10 @@ struct ixgbe_hw {
 
 #define IXGBE_NOT_IMPLEMENTED			0x7FFFFFFF
 
-#define IXGBE_FUSES0_GROUP(_i)         (0x11158 + ((_i) * 4))
-#define IXGBE_FUSES0_300MHZ            (1 << 5)
+
+#define IXGBE_FUSES0_GROUP(_i)		(0x11158 + ((_i) * 4))
+#define IXGBE_FUSES0_300MHZ		(1 << 5)
+#define IXGBE_FUSES0_REV1		(1 << 6)
 
 #define IXGBE_KRM_PORT_CAR_GEN_CTRL(P)	((P == 0) ? (0x4010) : (0x8010))
 #define IXGBE_KRM_LINK_CTRL_1(P)	((P == 0) ? (0x420C) : (0x820C))
diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index c9b1465..7c7829c 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -669,6 +669,7 @@ s32 ixgbe_setup_eee_X550(struct ixgbe_hw *hw, bool enable_eee)
 	u16 autoneg_eee_reg;
 	u32 link_reg;
 	s32 status;
+	u32 fuse;
 
 	DEBUGFUNC("ixgbe_setup_eee_X550");
 
@@ -689,6 +690,11 @@ s32 ixgbe_setup_eee_X550(struct ixgbe_hw *hw, bool enable_eee)
 			hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_EEE_ADVT,
 				IXGBE_MDIO_AUTO_NEG_DEV_TYPE, autoneg_eee_reg);
 		} else if (hw->device_id == IXGBE_DEV_ID_X550EM_X_KR) {
+			/* Not supported on first revision. */
+			fuse = IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0));
+			if (!(fuse & IXGBE_FUSES0_REV1))
+				return IXGBE_SUCCESS;
+
 			status = ixgbe_read_iosf_sb_reg_x550(hw,
 				IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
 				IXGBE_SB_IOSF_TARGET_KR_PHY, &link_reg);
@@ -698,9 +704,8 @@ s32 ixgbe_setup_eee_X550(struct ixgbe_hw *hw, bool enable_eee)
 			link_reg |= IXGBE_KRM_LINK_CTRL_1_TETH_EEE_CAP_KR |
 				    IXGBE_KRM_LINK_CTRL_1_TETH_EEE_CAP_KX;
 
-			/* Must disable FEC when EEE is enabled. */
-			link_reg &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_FEC_REQ |
-				IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_FEC);
+			/* Don't advertise FEC capability when EEE enabled. */
+			link_reg &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_FEC;
 
 			status = ixgbe_write_iosf_sb_reg_x550(hw,
 				IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
@@ -732,9 +737,8 @@ s32 ixgbe_setup_eee_X550(struct ixgbe_hw *hw, bool enable_eee)
 			link_reg &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_EEE_CAP_KR |
 				IXGBE_KRM_LINK_CTRL_1_TETH_EEE_CAP_KX);
 
-			/* Enable FEC when EEE is disabled. */
-			link_reg |= (IXGBE_KRM_LINK_CTRL_1_TETH_AN_FEC_REQ |
-				IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_FEC);
+			/* Advertise FEC capability when EEE is disabled. */
+			link_reg |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_FEC;
 
 			status = ixgbe_write_iosf_sb_reg_x550(hw,
 				IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
-- 
1.9.3

[dpdk-dev] [PATCH 24/37] ixgbe/base: introduce array of mac-type-dependent values

[Wenzhuo Lu]

Add a const u32 *mvals pointer to the ixgbe_hw struct to point to an
array of mac-type-dependent values. These can include register
offsets, masks, whatever can be in a u32. When the ixgbe_hw struct
is initialized, a pointer to the appropriate array must be set.
The IXGBE_I2CCTL register references are changed to use it.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_api.c  | 26 ++++++++++++++++++++++++++
 drivers/net/ixgbe/base/ixgbe_type.h | 18 ++++++++++++++++--
 2 files changed, 42 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_api.c b/drivers/net/ixgbe/base/ixgbe_api.c
index 916d744..0c4f8d8 100644
--- a/drivers/net/ixgbe/base/ixgbe_api.c
+++ b/drivers/net/ixgbe/base/ixgbe_api.c
@@ -34,6 +34,24 @@ POSSIBILITY OF SUCH DAMAGE.
 #include "ixgbe_api.h"
 #include "ixgbe_common.h"
 
+#define IXGBE_EMPTY_PARAM
+
+static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = {
+	IXGBE_MVALS_INIT(IXGBE_EMPTY_PARAM)
+};
+
+static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = {
+	IXGBE_MVALS_INIT(_X540)
+};
+
+static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {
+	IXGBE_MVALS_INIT(_X550)
+};
+
+static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {
+	IXGBE_MVALS_INIT(_X550EM_x)
+};
+
 /**
  * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
  * @hw: pointer to hardware structure
@@ -119,6 +137,8 @@ s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
 		return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
 	}
 
+	hw->mvals = ixgbe_mvals_base;
+
 	switch (hw->device_id) {
 	case IXGBE_DEV_ID_82598:
 	case IXGBE_DEV_ID_82598_BX:
@@ -159,13 +179,16 @@ s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
 	case IXGBE_DEV_ID_X540_VF:
 	case IXGBE_DEV_ID_X540_VF_HV:
 		hw->mac.type = ixgbe_mac_X540_vf;
+		hw->mvals = ixgbe_mvals_X540;
 		break;
 	case IXGBE_DEV_ID_X540T:
 	case IXGBE_DEV_ID_X540T1:
 		hw->mac.type = ixgbe_mac_X540;
+		hw->mvals = ixgbe_mvals_X540;
 		break;
 	case IXGBE_DEV_ID_X550T:
 		hw->mac.type = ixgbe_mac_X550;
+		hw->mvals = ixgbe_mvals_X550;
 		break;
 	case IXGBE_DEV_ID_X550EM_X_KX4:
 	case IXGBE_DEV_ID_X550EM_X_KR:
@@ -173,14 +196,17 @@ s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
 	case IXGBE_DEV_ID_X550EM_X_1G_T:
 	case IXGBE_DEV_ID_X550EM_X_SFP:
 		hw->mac.type = ixgbe_mac_X550EM_x;
+		hw->mvals = ixgbe_mvals_X550EM_x;
 		break;
 	case IXGBE_DEV_ID_X550_VF:
 	case IXGBE_DEV_ID_X550_VF_HV:
 		hw->mac.type = ixgbe_mac_X550_vf;
+		hw->mvals = ixgbe_mvals_X550;
 		break;
 	case IXGBE_DEV_ID_X550EM_X_VF:
 	case IXGBE_DEV_ID_X550EM_X_VF_HV:
 		hw->mac.type = ixgbe_mac_X550EM_x_vf;
+		hw->mvals = ixgbe_mvals_X550EM_x;
 		break;
 	default:
 		ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index d6ec699..12ca04b 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -138,6 +138,10 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_DEV_ID_X550EM_X_VF		0x15A8
 #define IXGBE_DEV_ID_X550EM_X_VF_HV		0x15A9
 
+#define IXGBE_CAT(r, m) IXGBE_##r##m
+
+#define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, _IDX)])
+
 /* General Registers */
 #define IXGBE_CTRL		0x00000
 #define IXGBE_STATUS		0x00008
@@ -145,9 +149,11 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_ESDP		0x00020
 #define IXGBE_EODSDP		0x00028
 #define IXGBE_I2CCTL_82599	0x00028
+#define IXGBE_I2CCTL		IXGBE_I2CCTL_82599
+#define IXGBE_I2CCTL_X540	IXGBE_I2CCTL_82599
 #define IXGBE_I2CCTL_X550	0x15F5C
-#define IXGBE_I2CCTL_BY_MAC(_hw) ((((_hw)->mac.type >= ixgbe_mac_X550) ? \
-				 IXGBE_I2CCTL_X550 : IXGBE_I2CCTL_82599))
+#define IXGBE_I2CCTL_X550EM_x	IXGBE_I2CCTL_X550
+#define IXGBE_I2CCTL_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2CCTL)
 #define IXGBE_PHY_GPIO		0x00028
 #define IXGBE_MAC_GPIO		0x00030
 #define IXGBE_PHYINT_STATUS0	0x00100
@@ -3248,6 +3254,13 @@ union ixgbe_atr_hash_dword {
 	__be32 dword;
 };
 
+#define IXGBE_MVALS_INIT(m)    \
+	IXGBE_CAT(I2CCTL, m)
+
+enum ixgbe_mvals {
+	IXGBE_MVALS_INIT(_IDX),
+	IXGBE_MVALS_IDX_LIMIT
+};
 
 /*
  * Unavailable: The FCoE Boot Option ROM is not present in the flash.
@@ -3780,6 +3793,7 @@ struct ixgbe_hw {
 	struct ixgbe_eeprom_info eeprom;
 	struct ixgbe_bus_info bus;
 	struct ixgbe_mbx_info mbx;
+	const u32 *mvals;
 	u16 device_id;
 	u16 vendor_id;
 	u16 subsystem_device_id;
-- 
1.9.3

[dpdk-dev] [PATCH 25/37] ixgbe/base: use mvals array for I2C_*_BY_MAC values

[Wenzhuo Lu]

Use the mvals array to hold differing values used for
IXGBE_I2C_* symbols.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h | 63 ++++++++++++++++++++++++++++---------
 1 file changed, 49 insertions(+), 14 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index 12ca04b..f1c1645 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -188,20 +188,48 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_VPDDIAG1	0x10208
 
 /* I2CCTL Bit Masks */
-#define IXGBE_I2C_CLK_IN_BY_MAC(_hw)(((_hw)->mac.type) >= ixgbe_mac_X550 ? \
-					0x00004000 : 0x00000001)
-#define IXGBE_I2C_CLK_OUT_BY_MAC(_hw)(((_hw)->mac.type) >= ixgbe_mac_X550 ? \
-					0x00000200 : 0x00000002)
-#define IXGBE_I2C_DATA_IN_BY_MAC(_hw)(((_hw)->mac.type) >= ixgbe_mac_X550 ? \
-					0x00001000 : 0x00000004)
-#define IXGBE_I2C_DATA_OUT_BY_MAC(_hw)(((_hw)->mac.type) >= ixgbe_mac_X550 ? \
-					0x00000400 : 0x00000008)
-#define IXGBE_I2C_BB_EN_BY_MAC(hw) ((hw)->mac.type >= ixgbe_mac_X550 ? \
-				    0x00000100 : 0)
-#define IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw) ((hw)->mac.type >= ixgbe_mac_X550 ? \
-					   0x00000800 : 0)
-#define IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw) ((hw)->mac.type >= ixgbe_mac_X550 ? \
-					  0x00002000 : 0)
+#define IXGBE_I2C_CLK_IN		0x00000001
+#define IXGBE_I2C_CLK_IN_X540		IXGBE_I2C_CLK_IN
+#define IXGBE_I2C_CLK_IN_X550		0x00004000
+#define IXGBE_I2C_CLK_IN_X550EM_x	IXGBE_I2C_CLK_IN_X550
+#define IXGBE_I2C_CLK_IN_BY_MAC(_hw)	IXGBE_BY_MAC((_hw), I2C_CLK_IN)
+
+#define IXGBE_I2C_CLK_OUT		0x00000002
+#define IXGBE_I2C_CLK_OUT_X540		IXGBE_I2C_CLK_OUT
+#define IXGBE_I2C_CLK_OUT_X550		0x00000200
+#define IXGBE_I2C_CLK_OUT_X550EM_x	IXGBE_I2C_CLK_OUT_X550
+#define IXGBE_I2C_CLK_OUT_BY_MAC(_hw)	IXGBE_BY_MAC((_hw), I2C_CLK_OUT)
+
+#define IXGBE_I2C_DATA_IN		0x00000004
+#define IXGBE_I2C_DATA_IN_X540		IXGBE_I2C_DATA_IN
+#define IXGBE_I2C_DATA_IN_X550		0x00001000
+#define IXGBE_I2C_DATA_IN_X550EM_x	IXGBE_I2C_DATA_IN_X550
+#define IXGBE_I2C_DATA_IN_BY_MAC(_hw)	IXGBE_BY_MAC((_hw), I2C_DATA_IN)
+
+#define IXGBE_I2C_DATA_OUT		0x00000008
+#define IXGBE_I2C_DATA_OUT_X540		IXGBE_I2C_DATA_OUT
+#define IXGBE_I2C_DATA_OUT_X550		0x00000400
+#define IXGBE_I2C_DATA_OUT_X550EM_x	IXGBE_I2C_DATA_OUT_X550
+#define IXGBE_I2C_DATA_OUT_BY_MAC(_hw)	IXGBE_BY_MAC((_hw), I2C_DATA_OUT)
+
+#define IXGBE_I2C_DATA_OE_N_EN		0
+#define IXGBE_I2C_DATA_OE_N_EN_X540	IXGBE_I2C_DATA_OE_N_EN
+#define IXGBE_I2C_DATA_OE_N_EN_X550	0x00000800
+#define IXGBE_I2C_DATA_OE_N_EN_X550EM_x	IXGBE_I2C_DATA_OE_N_EN_X550
+#define IXGBE_I2C_DATA_OE_N_EN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_DATA_OE_N_EN)
+
+#define IXGBE_I2C_BB_EN			0
+#define IXGBE_I2C_BB_EN_X540		IXGBE_I2C_BB_EN
+#define IXGBE_I2C_BB_EN_X550		0x00000100
+#define IXGBE_I2C_BB_EN_X550EM_x	IXGBE_I2C_BB_EN_X550
+
+#define IXGBE_I2C_BB_EN_BY_MAC(_hw)	IXGBE_BY_MAC((_hw), I2C_BB_EN)
+
+#define IXGBE_I2C_CLK_OE_N_EN		0
+#define IXGBE_I2C_CLK_OE_N_EN_X540	IXGBE_I2C_CLK_OE_N_EN
+#define IXGBE_I2C_CLK_OE_N_EN_X550	0x00002000
+#define IXGBE_I2C_CLK_OE_N_EN_X550EM_x	IXGBE_I2C_CLK_OE_N_EN_X550
+#define IXGBE_I2C_CLK_OE_N_EN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_CLK_OE_N_EN)
 #define IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT	500
 
 #define IXGBE_I2C_THERMAL_SENSOR_ADDR	0xF8
@@ -3255,6 +3283,13 @@ union ixgbe_atr_hash_dword {
 };
 
 #define IXGBE_MVALS_INIT(m)    \
+	IXGBE_CAT(I2C_CLK_IN, m),	\
+	IXGBE_CAT(I2C_CLK_OUT, m),	\
+	IXGBE_CAT(I2C_DATA_IN, m),	\
+	IXGBE_CAT(I2C_DATA_OUT, m),	\
+	IXGBE_CAT(I2C_DATA_OE_N_EN, m),	\
+	IXGBE_CAT(I2C_BB_EN, m),	\
+	IXGBE_CAT(I2C_CLK_OE_N_EN, m),	\
 	IXGBE_CAT(I2CCTL, m)
 
 enum ixgbe_mvals {
-- 
1.9.3

[dpdk-dev] [PATCH 26/37] ixgbe/base: use mvals array for *_GPI*_BY_MAC values

[Wenzhuo Lu]

Use the mvals array to hold differing values used for
IXGBE_*_GPI* symbols.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h | 41 +++++++++++++++++++++++--------------
 1 file changed, 26 insertions(+), 15 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index f1c1645..ac9909e 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -1543,12 +1543,16 @@ struct ixgbe_dmac_config {
 #define IXGBE_SDP0_GPIEN_X540	0x00000002 /* SDP0 on X540 and X550 */
 #define IXGBE_SDP1_GPIEN_X540	0x00000004 /* SDP1 on X540 and X550 */
 #define IXGBE_SDP2_GPIEN_X540	0x00000008 /* SDP2 on X540 and X550 */
-#define IXGBE_SDP0_GPIEN_BY_MAC(_hw) ((_hw)->mac.type >= ixgbe_mac_X540 ? \
-				      IXGBE_SDP0_GPIEN_X540 : IXGBE_SDP0_GPIEN)
-#define IXGBE_SDP1_GPIEN_BY_MAC(_hw) ((_hw)->mac.type >= ixgbe_mac_X540 ? \
-				      IXGBE_SDP1_GPIEN_X540 : IXGBE_SDP1_GPIEN)
-#define IXGBE_SDP2_GPIEN_BY_MAC(_hw) ((_hw)->mac.type >= ixgbe_mac_X540 ? \
-				      IXGBE_SDP2_GPIEN_X540 : IXGBE_SDP2_GPIEN)
+#define IXGBE_SDP0_GPIEN_X550	IXGBE_SDP0_GPIEN_X540
+#define IXGBE_SDP1_GPIEN_X550	IXGBE_SDP1_GPIEN_X540
+#define IXGBE_SDP2_GPIEN_X550	IXGBE_SDP2_GPIEN_X540
+#define IXGBE_SDP0_GPIEN_X550EM_x	IXGBE_SDP0_GPIEN_X540
+#define IXGBE_SDP1_GPIEN_X550EM_x	IXGBE_SDP1_GPIEN_X540
+#define IXGBE_SDP2_GPIEN_X550EM_x	IXGBE_SDP2_GPIEN_X540
+#define IXGBE_SDP0_GPIEN_BY_MAC(_hw)	IXGBE_BY_MAC((_hw), SDP0_GPIEN)
+#define IXGBE_SDP1_GPIEN_BY_MAC(_hw)	IXGBE_BY_MAC((_hw), SDP1_GPIEN)
+#define IXGBE_SDP2_GPIEN_BY_MAC(_hw)	IXGBE_BY_MAC((_hw), SDP2_GPIEN)
+
 #define IXGBE_GPIE_MSIX_MODE	0x00000010 /* MSI-X mode */
 #define IXGBE_GPIE_OCD		0x00000020 /* Other Clear Disable */
 #define IXGBE_GPIE_EIMEN	0x00000040 /* Immediate Interrupt Enable */
@@ -1729,15 +1733,16 @@ enum {
 #define IXGBE_EICR_GPI_SDP0_X540 0x02000000 /* Gen Purpose Interrupt on SDP0 */
 #define IXGBE_EICR_GPI_SDP1_X540 0x04000000 /* Gen Purpose Interrupt on SDP1 */
 #define IXGBE_EICR_GPI_SDP2_X540 0x08000000 /* Gen Purpose Interrupt on SDP2 */
-#define IXGBE_EICR_GPI_SDP0_BY_MAC(_hw)	((_hw)->mac.type >= ixgbe_mac_X540 ? \
-					 IXGBE_EICR_GPI_SDP0_X540 : \
-					 IXGBE_EICR_GPI_SDP0)
-#define IXGBE_EICR_GPI_SDP1_BY_MAC(_hw)	((_hw)->mac.type >= ixgbe_mac_X540 ? \
-					 IXGBE_EICR_GPI_SDP1_X540 : \
-					 IXGBE_EICR_GPI_SDP1)
-#define IXGBE_EICR_GPI_SDP2_BY_MAC(_hw)	((_hw)->mac.type >= ixgbe_mac_X540 ? \
-					 IXGBE_EICR_GPI_SDP2_X540 : \
-					 IXGBE_EICR_GPI_SDP2)
+#define IXGBE_EICR_GPI_SDP0_X550	IXGBE_EICR_GPI_SDP0_X540
+#define IXGBE_EICR_GPI_SDP1_X550	IXGBE_EICR_GPI_SDP1_X540
+#define IXGBE_EICR_GPI_SDP2_X550	IXGBE_EICR_GPI_SDP2_X540
+#define IXGBE_EICR_GPI_SDP0_X550EM_x	IXGBE_EICR_GPI_SDP0_X540
+#define IXGBE_EICR_GPI_SDP1_X550EM_x	IXGBE_EICR_GPI_SDP1_X540
+#define IXGBE_EICR_GPI_SDP2_X550EM_x	IXGBE_EICR_GPI_SDP2_X540
+#define IXGBE_EICR_GPI_SDP0_BY_MAC(_hw)	IXGBE_BY_MAC((_hw), EICR_GPI_SDP0)
+#define IXGBE_EICR_GPI_SDP1_BY_MAC(_hw)	IXGBE_BY_MAC((_hw), EICR_GPI_SDP1)
+#define IXGBE_EICR_GPI_SDP2_BY_MAC(_hw)	IXGBE_BY_MAC((_hw), EICR_GPI_SDP2)
+
 #define IXGBE_EICR_PBUR		0x10000000 /* Packet Buffer Handler Error */
 #define IXGBE_EICR_DHER		0x20000000 /* Descriptor Handler Error */
 #define IXGBE_EICR_TCP_TIMER	0x40000000 /* TCP Timer */
@@ -3283,6 +3288,12 @@ union ixgbe_atr_hash_dword {
 };
 
 #define IXGBE_MVALS_INIT(m)    \
+	IXGBE_CAT(SDP0_GPIEN, m),	\
+	IXGBE_CAT(SDP1_GPIEN, m),	\
+	IXGBE_CAT(SDP2_GPIEN, m),	\
+	IXGBE_CAT(EICR_GPI_SDP0, m),	\
+	IXGBE_CAT(EICR_GPI_SDP1, m),	\
+	IXGBE_CAT(EICR_GPI_SDP2, m),	\
 	IXGBE_CAT(I2C_CLK_IN, m),	\
 	IXGBE_CAT(I2C_CLK_OUT, m),	\
 	IXGBE_CAT(I2C_DATA_IN, m),	\
-- 
1.9.3

[dpdk-dev] [PATCH 27/37] ixgbe/base: use mvals array for CIA*_BY_MAC values

[Wenzhuo Lu]

Use the mvals array to hold differing values use for CIAA and
CIAD symbols.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index ac9909e..d4a91d8 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -1057,14 +1057,18 @@ struct ixgbe_dmac_config {
 #define IXGBE_PHYDAT_82599	0x11044
 #define IXGBE_PHYCTL_82599	0x11048
 #define IXGBE_PBACLR_82599	0x11068
-#define IXGBE_CIAA_82599	0x11088
-#define IXGBE_CIAD_82599	0x1108C
+#define IXGBE_CIAA		0x11088
+#define IXGBE_CIAD		0x1108C
+#define IXGBE_CIAA_82599	IXGBE_CIAA
+#define IXGBE_CIAD_82599	IXGBE_CIAD
+#define IXGBE_CIAA_X540		IXGBE_CIAA
+#define IXGBE_CIAD_X540		IXGBE_CIAD
 #define IXGBE_CIAA_X550		0x11508
 #define IXGBE_CIAD_X550		0x11510
-#define IXGBE_CIAA_BY_MAC(_hw)	((((_hw)->mac.type >= ixgbe_mac_X550) ? \
-				 IXGBE_CIAA_X550 : IXGBE_CIAA_82599))
-#define IXGBE_CIAD_BY_MAC(_hw)	((((_hw)->mac.type >= ixgbe_mac_X550) ? \
-				 IXGBE_CIAD_X550 : IXGBE_CIAD_82599))
+#define IXGBE_CIAA_X550EM_x	IXGBE_CIAA_X550
+#define IXGBE_CIAD_X550EM_x	IXGBE_CIAD_X550
+#define IXGBE_CIAA_BY_MAC(_hw)	IXGBE_BY_MAC((_hw), CIAA)
+#define IXGBE_CIAD_BY_MAC(_hw)	IXGBE_BY_MAC((_hw), CIAD)
 #define IXGBE_PICAUSE		0x110B0
 #define IXGBE_PIENA		0x110B8
 #define IXGBE_CDQ_MBR_82599	0x110B4
@@ -3294,6 +3298,8 @@ union ixgbe_atr_hash_dword {
 	IXGBE_CAT(EICR_GPI_SDP0, m),	\
 	IXGBE_CAT(EICR_GPI_SDP1, m),	\
 	IXGBE_CAT(EICR_GPI_SDP2, m),	\
+	IXGBE_CAT(CIAA, m),		\
+	IXGBE_CAT(CIAD, m),		\
 	IXGBE_CAT(I2C_CLK_IN, m),	\
 	IXGBE_CAT(I2C_CLK_OUT, m),	\
 	IXGBE_CAT(I2C_DATA_IN, m),	\
-- 
1.9.3

[dpdk-dev] [PATCH 28/37] ixgbe/base: add new mac-dependent values for x540, x550

[Wenzhuo Lu]

Add new values that vary by MAC type that are introduced in
x540, x550.
And remove some meaningless comments BTW.

Please note this patch hits a checkpatch errror.
"ERROR: Macros with complex values should be enclosed in parentheses
 #105: FILE: drivers/net/ixgbe/base/ixgbe_type.h:3337:"
We think it's not an error and the checkpatch is overly aggressive.
If we add the parentheses, it will broke our code and make it cannot
be compiled. We should ignore this error safely enough.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h | 72 ++++++++++++++++++++++++++++++-------
 1 file changed, 59 insertions(+), 13 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index d4a91d8..74b76e2 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -166,18 +166,40 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_EXVET		0x05078
 
 /* NVM Registers */
-#define IXGBE_EEC	0x10010
-#define IXGBE_EERD	0x10014
-#define IXGBE_EEWR	0x10018
-#define IXGBE_FLA	0x1001C
+#define IXGBE_EEC		0x10010
+#define IXGBE_EEC_X540		IXGBE_EEC
+#define IXGBE_EEC_X550		IXGBE_EEC
+#define IXGBE_EEC_X550EM_x	IXGBE_EEC
+#define IXGBE_EEC_BY_MAC(_hw)	IXGBE_EEC
+
+#define IXGBE_EERD		0x10014
+#define IXGBE_EEWR		0x10018
+
+#define IXGBE_FLA		0x1001C
+#define IXGBE_FLA_X540		IXGBE_FLA
+#define IXGBE_FLA_X550		IXGBE_FLA
+#define IXGBE_FLA_X550EM_x	IXGBE_FLA
+#define IXGBE_FLA_BY_MAC(_hw)	IXGBE_FLA
+
 #define IXGBE_EEMNGCTL	0x10110
 #define IXGBE_EEMNGDATA	0x10114
 #define IXGBE_FLMNGCTL	0x10118
 #define IXGBE_FLMNGDATA	0x1011C
 #define IXGBE_FLMNGCNT	0x10120
 #define IXGBE_FLOP	0x1013C
-#define IXGBE_GRC	0x10200
-#define IXGBE_SRAMREL	0x10210
+
+#define IXGBE_GRC		0x10200
+#define IXGBE_GRC_X540		IXGBE_GRC
+#define IXGBE_GRC_X550		IXGBE_GRC
+#define IXGBE_GRC_X550EM_x	IXGBE_GRC
+#define IXGBE_GRC_BY_MAC(_hw)	IXGBE_GRC
+
+#define IXGBE_SRAMREL		0x10210
+#define IXGBE_SRAMREL_X540	IXGBE_SRAMREL
+#define IXGBE_SRAMREL_X550	IXGBE_SRAMREL
+#define IXGBE_SRAMREL_X550EM_x	IXGBE_SRAMREL
+#define IXGBE_SRAMREL_BY_MAC(_hw)	IXGBE_SRAMREL
+
 #define IXGBE_PHYDBG	0x10218
 
 /* General Receive Control */
@@ -1038,14 +1060,34 @@ struct ixgbe_dmac_config {
 #define IXGBE_GSCN_2		0x11028
 #define IXGBE_GSCN_3		0x1102C
 #define IXGBE_FACTPS		0x10150
+#define IXGBE_FACTPS_X540	IXGBE_FACTPS
+#define IXGBE_FACTPS_X550	IXGBE_FACTPS
+#define IXGBE_FACTPS_X550EM_x	IXGBE_FACTPS
+#define IXGBE_FACTPS_BY_MAC(_hw)	IXGBE_FACTPS
+
 #define IXGBE_PCIEANACTL	0x11040
 #define IXGBE_SWSM		0x10140
+#define IXGBE_SWSM_X540		IXGBE_SWSM
+#define IXGBE_SWSM_X550		IXGBE_SWSM
+#define IXGBE_SWSM_X550EM_x	IXGBE_SWSM
+#define IXGBE_SWSM_BY_MAC(_hw)	IXGBE_SWSM
+
 #define IXGBE_FWSM		0x10148
+#define IXGBE_FWSM_X540		IXGBE_FWSM
+#define IXGBE_FWSM_X550		IXGBE_FWSM
+#define IXGBE_FWSM_X550EM_x	IXGBE_FWSM
+#define IXGBE_FWSM_BY_MAC(_hw)	IXGBE_FWSM
+
+#define IXGBE_SWFW_SYNC		IXGBE_GSSR
+#define IXGBE_SWFW_SYNC_X540	IXGBE_SWFW_SYNC
+#define IXGBE_SWFW_SYNC_X550	IXGBE_SWFW_SYNC
+#define IXGBE_SWFW_SYNC_X550EM_x	IXGBE_SWFW_SYNC
+#define IXGBE_SWFW_SYNC_BY_MAC(_hw)	IXGBE_SWFW_SYNC
+
 #define IXGBE_GSSR		0x10160
 #define IXGBE_MREVID		0x11064
 #define IXGBE_DCA_ID		0x11070
 #define IXGBE_DCA_CTRL		0x11074
-#define IXGBE_SWFW_SYNC		IXGBE_GSSR
 
 /* PCI-E registers 82599-Specific */
 #define IXGBE_GCR_EXT		0x11050
@@ -3291,7 +3333,16 @@ union ixgbe_atr_hash_dword {
 	__be32 dword;
 };
 
-#define IXGBE_MVALS_INIT(m)    \
+
+#define IXGBE_MVALS_INIT(m)	\
+	IXGBE_CAT(EEC, m),		\
+	IXGBE_CAT(FLA, m),		\
+	IXGBE_CAT(GRC, m),		\
+	IXGBE_CAT(SRAMREL, m),		\
+	IXGBE_CAT(FACTPS, m),		\
+	IXGBE_CAT(SWSM, m),		\
+	IXGBE_CAT(SWFW_SYNC, m),	\
+	IXGBE_CAT(FWSM, m),		\
 	IXGBE_CAT(SDP0_GPIEN, m),	\
 	IXGBE_CAT(SDP1_GPIEN, m),	\
 	IXGBE_CAT(SDP2_GPIEN, m),	\
@@ -3339,11 +3390,6 @@ enum ixgbe_mac_type {
 	ixgbe_mac_82599_vf,
 	ixgbe_mac_X540,
 	ixgbe_mac_X540_vf,
-	/*
-	 * X550EM MAC type decoder:
-	 * ixgbe_mac_X550EM_x: "x" = Xeon
-	 * ixgbe_mac_X550EM_a: "a" = Atom
-	 */
 	ixgbe_mac_X550,
 	ixgbe_mac_X550EM_x,
 	ixgbe_mac_X550_vf,
-- 
1.9.3

[dpdk-dev] [PATCH 29/37] ixgbe/base: disable SW LPLU implementation for x557 V2

[Wenzhuo Lu]

This patch disables SW LPLU on x557 V2. It also sets the
enter_lplu function pointer to NULL on x557 V2. LPLU will be
implemented in FW for all x557 V2 interfaces. The SW LPLU
implementation must be disabled on V2 to avoid conflicts with
FW. SW LPLU support is still required for x557 V1.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 7c7829c..9958a63 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -1542,7 +1542,11 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
 			ret_val = ixgbe_setup_kr_speed_x550em(hw, speed);
 		}
 
-		phy->ops.enter_lplu = ixgbe_enter_lplu_t_x550em;
+		/* setup SW LPLU only for first revision */
+		if (!(IXGBE_FUSES0_REV1 & IXGBE_READ_REG(hw,
+						       IXGBE_FUSES0_GROUP(0))))
+			phy->ops.enter_lplu = ixgbe_enter_lplu_t_x550em;
+
 		phy->ops.handle_lasi = ixgbe_handle_lasi_ext_t_x550em;
 		phy->ops.reset = ixgbe_reset_phy_t_X550em;
 		break;
@@ -2742,6 +2746,10 @@ s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
 	u32 save_autoneg;
 	bool link_up;
 
+	/* SW LPLU not required on later HW revisions. */
+	if (IXGBE_FUSES0_REV1 & IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0)))
+		return IXGBE_SUCCESS;
+
 	/* If blocked by MNG FW, then don't restart AN */
 	if (ixgbe_check_reset_blocked(hw))
 		return IXGBE_SUCCESS;
-- 
1.9.3

[dpdk-dev] [PATCH 30/37] ixgbe/base: remove FEC disablement for x550em

[Wenzhuo Lu]

This patch removes the clearing of the FEC(Forward Error Correction)
bits in ixgbe_setup_kr_speed_x550em.  FEC default enablement is
configured via the NVM and SW should not be overriding these defaults
in this function.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 9958a63..3b6f517 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -1443,8 +1443,6 @@ STATIC s32 ixgbe_setup_kr_speed_x550em(struct ixgbe_hw *hw,
 		return status;
 
 	reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE;
-	reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_FEC_REQ |
-		     IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_FEC);
 	reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR |
 		     IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX);
 
-- 
1.9.3

[dpdk-dev] [PATCH 31/37] ixgbe/base: modify register definition code style

[Wenzhuo Lu]

This path changes ((P == 0) ? (<value for port 0>) : (<value for port 1>))
register definition into ((P) ? <value for port 1> : <value for port 0>)
style.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index 74b76e2..c71e1d7 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -3954,15 +3954,15 @@ struct ixgbe_hw {
 #define IXGBE_FUSES0_300MHZ		(1 << 5)
 #define IXGBE_FUSES0_REV1		(1 << 6)
 
-#define IXGBE_KRM_PORT_CAR_GEN_CTRL(P)	((P == 0) ? (0x4010) : (0x8010))
-#define IXGBE_KRM_LINK_CTRL_1(P)	((P == 0) ? (0x420C) : (0x820C))
-#define IXGBE_KRM_AN_CNTL_1(P)		((P == 0) ? (0x422C) : (0x822C))
-#define IXGBE_KRM_DSP_TXFFE_STATE_4(P)	((P == 0) ? (0x4634) : (0x8634))
-#define IXGBE_KRM_DSP_TXFFE_STATE_5(P)	((P == 0) ? (0x4638) : (0x8638))
-#define IXGBE_KRM_RX_TRN_LINKUP_CTRL(P)	((P == 0) ? (0x4B00) : (0x8B00))
-#define IXGBE_KRM_PMD_DFX_BURNIN(P)	((P == 0) ? (0x4E00) : (0x8E00))
-#define IXGBE_KRM_TX_COEFF_CTRL_1(P)	((P == 0) ? (0x5520) : (0x9520))
-#define IXGBE_KRM_RX_ANA_CTL(P)		((P == 0) ? (0x5A00) : (0x9A00))
+#define IXGBE_KRM_PORT_CAR_GEN_CTRL(P)	((P) ? 0x8010 : 0x4010)
+#define IXGBE_KRM_LINK_CTRL_1(P)	((P) ? 0x820C : 0x420C)
+#define IXGBE_KRM_AN_CNTL_1(P)		((P) ? 0x822C : 0x422C)
+#define IXGBE_KRM_DSP_TXFFE_STATE_4(P)	((P) ? 0x8634 : 0x4634)
+#define IXGBE_KRM_DSP_TXFFE_STATE_5(P)	((P) ? 0x8638 : 0x4638)
+#define IXGBE_KRM_RX_TRN_LINKUP_CTRL(P)	((P) ? 0x8B00 : 0x4B00)
+#define IXGBE_KRM_PMD_DFX_BURNIN(P)	((P) ? 0x8E00 : 0x4E00)
+#define IXGBE_KRM_TX_COEFF_CTRL_1(P)	((P) ? 0x9520 : 0x5520)
+#define IXGBE_KRM_RX_ANA_CTL(P)		((P) ? 0x9A00 : 0x5A00)
 
 #define IXGBE_KRM_PORT_CAR_GEN_CTRL_NELB_32B		(1 << 9)
 #define IXGBE_KRM_PORT_CAR_GEN_CTRL_NELB_KRPCS		(1 << 11)
-- 
1.9.3

[dpdk-dev] [PATCH 32/37] ixgbe/base: specific process for X550 and X550em when disabling PCIe master

[Wenzhuo Lu]

This patch skips the PCI transactions pending check in
ixgbe_disable_pcie_master. The PCI transactions pending bit sticks high
when there were pending transactions, we should wait and then continue
with our reset flow.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_common.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/ixgbe/base/ixgbe_common.c b/drivers/net/ixgbe/base/ixgbe_common.c
index 9e80722..17db352 100644
--- a/drivers/net/ixgbe/base/ixgbe_common.c
+++ b/drivers/net/ixgbe/base/ixgbe_common.c
@@ -3142,6 +3142,9 @@ s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw)
 	DEBUGOUT("GIO Master Disable bit didn't clear - requesting resets\n");
 	hw->mac.flags |= IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;
 
+	if (hw->mac.type >= ixgbe_mac_X550)
+		goto out;
+
 	/*
 	 * Before proceeding, make sure that the PCIe block does not have
 	 * transactions pending.
-- 
1.9.3

[dpdk-dev] [PATCH 33/37] ixgbe/base: fix flow control to be KR only

[Wenzhuo Lu]

The code in the if statement is specific to the KR PHY. However,
the conditional was only checking for backplane. If the driver
was using the KX4 backplane PHY, this code would execute but
would write to the wrong PHY.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_x550.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 3b6f517..9a3f488 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -2929,7 +2929,7 @@ s32 ixgbe_setup_fc_X550em(struct ixgbe_hw *hw)
 		goto out;
 	}
 
-	if (hw->phy.media_type == ixgbe_media_type_backplane) {
+	if (hw->device_id == IXGBE_DEV_ID_X550EM_X_KR) {
 		ret_val = ixgbe_read_iosf_sb_reg_x550(hw,
 			IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id),
 			IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);
@@ -2945,9 +2945,8 @@ s32 ixgbe_setup_fc_X550em(struct ixgbe_hw *hw)
 			IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id),
 			IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);
 
-		/* Not all devices fully support AN. */
-		if (hw->device_id == IXGBE_DEV_ID_X550EM_X_KR)
-			hw->fc.disable_fc_autoneg = true;
+		/* This device does not fully support AN. */
+		hw->fc.disable_fc_autoneg = true;
 	}
 
 out:
-- 
1.9.3

[dpdk-dev] [PATCH 34/37] ixgbe/base: fix 5G and 2.5G speed description

[Wenzhuo Lu]

This patch fixes comment description for setting 2.5G and 5G speeds in
ixgbe_setup_phy_link_generic.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_phy.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_phy.c b/drivers/net/ixgbe/base/ixgbe_phy.c
index 3ba5661..1e24ab8 100644
--- a/drivers/net/ixgbe/base/ixgbe_phy.c
+++ b/drivers/net/ixgbe/base/ixgbe_phy.c
@@ -829,7 +829,7 @@ s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw)
 
 	if (hw->mac.type == ixgbe_mac_X550) {
 		if (speed & IXGBE_LINK_SPEED_5GB_FULL) {
-			/* Set or unset auto-negotiation 1G advertisement */
+			/* Set or unset auto-negotiation 5G advertisement */
 			hw->phy.ops.read_reg(hw,
 				IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,
 				IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
@@ -847,7 +847,7 @@ s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw)
 		}
 
 		if (speed & IXGBE_LINK_SPEED_2_5GB_FULL) {
-			/* Set or unset auto-negotiation 1G advertisement */
+			/* Set or unset auto-negotiation 2.5G advertisement */
 			hw->phy.ops.read_reg(hw,
 				IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,
 				IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
-- 
1.9.3

[dpdk-dev] [PATCH 35/37] ixgbe/base: force cs4227 LINE side to 10G SR mode

[Wenzhuo Lu]

According to the hardware, the LINE side of the cs4227 needs to be
set to 10 Gbps SR mode regardless of the configuration of the link.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_phy.h  |   2 +
 drivers/net/ixgbe/base/ixgbe_x550.c | 143 ++++++++++++++++++++----------------
 2 files changed, 81 insertions(+), 64 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_phy.h b/drivers/net/ixgbe/base/ixgbe_phy.h
index e3cf7ff..1f07c1e 100644
--- a/drivers/net/ixgbe/base/ixgbe_phy.h
+++ b/drivers/net/ixgbe/base/ixgbe_phy.h
@@ -97,6 +97,8 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_CS4227_LINE_SPARE24_LSB	0x12B0	/* Reg to program EDC */
 #define IXGBE_CS4227_HOST_SPARE22_MSB	0x1AAD	/* Reg to program speed */
 #define IXGBE_CS4227_HOST_SPARE24_LSB	0x1AB0	/* Reg to program EDC */
+#define IXGBE_CS4227_SPEED_1G		0x8000
+#define IXGBE_CS4227_SPEED_10G		0
 #define IXGBE_CS4227_EDC_MODE_CX1	0x0002
 #define IXGBE_CS4227_EDC_MODE_SR	0x0004
 #define IXGBE_CS4227_RESET_HOLD		500	/* microseconds */
diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index 9a3f488..48077ae 100644
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -117,7 +117,9 @@ STATIC s32 ixgbe_write_cs4227(struct ixgbe_hw *hw, u16 reg, u16 value)
  * ixgbe_get_cs4227_status - Return CS4227 status
  * @hw: pointer to hardware structure
  *
- * Returns error if CS4227 not successfully initialized
+ * Performs a diagnostic on the CS4227 chip. Returns an error if it is
+ * not operating correctly.
+ * This function assumes that the caller has acquired the proper semaphore.
  **/
 STATIC s32 ixgbe_get_cs4227_status(struct ixgbe_hw *hw)
 {
@@ -126,6 +128,7 @@ STATIC s32 ixgbe_get_cs4227_status(struct ixgbe_hw *hw)
 	u16 reg_slice, reg_val;
 	u8 retry;
 
+	/* Check register reads. */
 	for (retry = 0; retry < IXGBE_CS4227_RETRIES; ++retry) {
 		status = ixgbe_read_cs4227(hw, IXGBE_CS4227_GLOBAL_ID_LSB,
 					   &value);
@@ -146,8 +149,16 @@ STATIC s32 ixgbe_get_cs4227_status(struct ixgbe_hw *hw)
 	 * Otherwise, this will disrupt link on all ports. Because we
 	 * can only do this the first time, we must check all ports,
 	 * not just our own.
+	 * While we are at it, set the LINE side to 10G SR, which is
+	 * what it needs to be regardless of the actual link.
 	 */
 	if (value != IXGBE_CS4227_SCRATCH_VALUE) {
+		reg_slice = IXGBE_CS4227_LINE_SPARE22_MSB;
+		reg_val = IXGBE_CS4227_SPEED_10G;
+		status = ixgbe_write_cs4227(hw, reg_slice, reg_val);
+		if (status != IXGBE_SUCCESS)
+			return status;
+
 		reg_slice = IXGBE_CS4227_LINE_SPARE24_LSB;
 		reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
 		status = ixgbe_write_cs4227(hw, reg_slice, reg_val);
@@ -160,6 +171,12 @@ STATIC s32 ixgbe_get_cs4227_status(struct ixgbe_hw *hw)
 		if (status != IXGBE_SUCCESS)
 			return status;
 
+		reg_slice = IXGBE_CS4227_LINE_SPARE22_MSB + (1 << 12);
+		reg_val = IXGBE_CS4227_SPEED_10G;
+		status = ixgbe_write_cs4227(hw, reg_slice, reg_val);
+		if (status != IXGBE_SUCCESS)
+			return status;
+
 		reg_slice = IXGBE_CS4227_LINE_SPARE24_LSB + (1 << 12);
 		reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
 		status = ixgbe_write_cs4227(hw, reg_slice, reg_val);
@@ -1765,6 +1782,67 @@ s32 ixgbe_setup_kx4_x550em(struct ixgbe_hw *hw)
 }
 
 /**
+ *  ixgbe_setup_mac_link_sfp_x550em - Setup internal/external the PHY for SFP
+ *  @hw: pointer to hardware structure
+ *
+ *  Configure the external PHY and the integrated KR PHY for SFP support.
+ **/
+s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
+				    ixgbe_link_speed speed,
+				    bool autoneg_wait_to_complete)
+{
+	s32 ret_val;
+	u16 reg_slice, reg_val;
+	bool setup_linear = false;
+	UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
+
+	/* Check if SFP module is supported and linear */
+	ret_val = ixgbe_supported_sfp_modules_X550em(hw, &setup_linear);
+
+	/* If no SFP module present, then return success. Return success since
+	 * there is no reason to configure CS4227 and SFP not present error is
+	 * not excepted in the setup MAC link flow.
+	 */
+	if (ret_val == IXGBE_ERR_SFP_NOT_PRESENT)
+		return IXGBE_SUCCESS;
+
+	if (ret_val != IXGBE_SUCCESS)
+		return ret_val;
+
+	/* Configure CS4227 LINE side to 10G SR. */
+	reg_slice = IXGBE_CS4227_LINE_SPARE22_MSB + (hw->bus.lan_id << 12);
+	reg_val = IXGBE_CS4227_SPEED_10G;
+	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
+		reg_val);
+
+	reg_slice = IXGBE_CS4227_LINE_SPARE24_LSB + (hw->bus.lan_id << 12);
+	reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
+	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
+		reg_val);
+
+	/* Configure CS4227 for HOST connection rate then type. */
+	reg_slice = IXGBE_CS4227_HOST_SPARE22_MSB + (hw->bus.lan_id << 12);
+	reg_val = (speed & IXGBE_LINK_SPEED_10GB_FULL) ?
+		IXGBE_CS4227_SPEED_10G : IXGBE_CS4227_SPEED_1G;
+	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
+					   reg_val);
+
+	reg_slice = IXGBE_CS4227_HOST_SPARE24_LSB + (hw->bus.lan_id << 12);
+	if (setup_linear)
+		reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1;
+	else
+		reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
+	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
+					   reg_val);
+
+	/* If internal link mode is XFI, then setup XFI internal link. */
+	if (!(hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE))
+		ret_val = ixgbe_setup_ixfi_x550em(hw, &speed);
+
+	return ret_val;
+}
+
+/**
  *  ixgbe_setup_ixfi_x550em - Configure the KR PHY for iXFI mode.
  *  @hw: pointer to hardware structure
  *  @speed: the link speed to force
@@ -1910,69 +1988,6 @@ STATIC s32 ixgbe_ext_phy_t_x550em_get_link(struct ixgbe_hw *hw, bool *link_up)
 }
 
 /**
- *  ixgbe_setup_mac_link_sfp_x550em - Setup internal/external the PHY for SFP
- *  @hw: pointer to hardware structure
- *
- *  Configure the external PHY and the integrated KR PHY for SFP support.
- **/
-s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
-				    ixgbe_link_speed speed,
-				    bool autoneg_wait_to_complete)
-{
-	s32 ret_val;
-	u16 reg_slice, reg_val;
-	bool setup_linear = false;
-	UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
-
-	/* Check if SFP module is supported and linear */
-	ret_val = ixgbe_supported_sfp_modules_X550em(hw, &setup_linear);
-
-	/* If no SFP module present, then return success. Return success since
-	 * there is no reason to configure CS4227 and SFP not present error is
-	 * not excepted in the setup MAC link flow.
-	 */
-	if (ret_val == IXGBE_ERR_SFP_NOT_PRESENT)
-		return IXGBE_SUCCESS;
-
-	if (ret_val != IXGBE_SUCCESS)
-		return ret_val;
-
-	/* Configure CS4227 for LINE connection rate then type. */
-	reg_slice = IXGBE_CS4227_LINE_SPARE22_MSB + (hw->bus.lan_id << 12);
-	reg_val = (speed & IXGBE_LINK_SPEED_10GB_FULL) ? 0 : 0x8000;
-	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
-					   reg_val);
-
-	reg_slice = IXGBE_CS4227_LINE_SPARE24_LSB + (hw->bus.lan_id << 12);
-	if (setup_linear)
-		reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1;
-	else
-		reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
-	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
-					   reg_val);
-
-	/* Configure CS4227 for HOST connection rate then type. */
-	reg_slice = IXGBE_CS4227_HOST_SPARE22_MSB + (hw->bus.lan_id << 12);
-	reg_val = (speed & IXGBE_LINK_SPEED_10GB_FULL) ? 0 : 0x8000;
-	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
-					   reg_val);
-
-	reg_slice = IXGBE_CS4227_HOST_SPARE24_LSB + (hw->bus.lan_id << 12);
-	if (setup_linear)
-		reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1;
-	else
-		reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
-	ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
-					   reg_val);
-
-	/* If internal link mode is XFI, then setup XFI internal link. */
-	if (!(hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE))
-		ret_val = ixgbe_setup_ixfi_x550em(hw, &speed);
-
-	return ret_val;
-}
-
-/**
  * ixgbe_setup_internal_phy_t_x550em - Configure KR PHY to X557 link
  * @hw: point to hardware structure
  *
-- 
1.9.3

[dpdk-dev] [PATCH 36/37] ixgbe/base: a minor optimization for max link up time

[Wenzhuo Lu]

This patch adds max_link_up_time parameter to mac structure.
This parameter is used to control maximum link polling time in
ixgbe_check_mac_link functions. It is required to prevent long wait
time on x550 PHY that have no external link.

Since x550 is handled by software, we have to reset internal (PHY to
PHY) link when external link changes, and after reset, we have to wait for
this link to be established. As a result of not having interrupts, we have
to poll for link state, and we know that this link comes up much faster
than default 9 seconds. This parameter is added to prevent waiting 9
seconds for link when external link is not established.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_82598.c  | 4 ++--
 drivers/net/ixgbe/base/ixgbe_api.c    | 1 +
 drivers/net/ixgbe/base/ixgbe_common.c | 2 +-
 drivers/net/ixgbe/base/ixgbe_type.h   | 1 +
 4 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_82598.c b/drivers/net/ixgbe/base/ixgbe_82598.c
index 9bdbce4..9e65fff 100644
--- a/drivers/net/ixgbe/base/ixgbe_82598.c
+++ b/drivers/net/ixgbe/base/ixgbe_82598.c
@@ -659,7 +659,7 @@ STATIC s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
 		hw->phy.ops.read_reg(hw, 0xC00C, IXGBE_TWINAX_DEV,
 				     &adapt_comp_reg);
 		if (link_up_wait_to_complete) {
-			for (i = 0; i < IXGBE_LINK_UP_TIME; i++) {
+			for (i = 0; i < hw->mac.max_link_up_time; i++) {
 				if ((link_reg & 1) &&
 				    ((adapt_comp_reg & 1) == 0)) {
 					*link_up = true;
@@ -688,7 +688,7 @@ STATIC s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
 
 	links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
 	if (link_up_wait_to_complete) {
-		for (i = 0; i < IXGBE_LINK_UP_TIME; i++) {
+		for (i = 0; i < hw->mac.max_link_up_time; i++) {
 			if (links_reg & IXGBE_LINKS_UP) {
 				*link_up = true;
 				break;
diff --git a/drivers/net/ixgbe/base/ixgbe_api.c b/drivers/net/ixgbe/base/ixgbe_api.c
index 0c4f8d8..64579ae 100644
--- a/drivers/net/ixgbe/base/ixgbe_api.c
+++ b/drivers/net/ixgbe/base/ixgbe_api.c
@@ -114,6 +114,7 @@ s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
 		status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
 		break;
 	}
+	hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME;
 
 	return status;
 }
diff --git a/drivers/net/ixgbe/base/ixgbe_common.c b/drivers/net/ixgbe/base/ixgbe_common.c
index 17db352..08754c8 100644
--- a/drivers/net/ixgbe/base/ixgbe_common.c
+++ b/drivers/net/ixgbe/base/ixgbe_common.c
@@ -4067,7 +4067,7 @@ s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
 	}
 
 	if (link_up_wait_to_complete) {
-		for (i = 0; i < IXGBE_LINK_UP_TIME; i++) {
+		for (i = 0; i < hw->mac.max_link_up_time; i++) {
 			if (links_reg & IXGBE_LINKS_UP) {
 				*link_up = true;
 				break;
diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index c71e1d7..5a01b86 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -3828,6 +3828,7 @@ struct ixgbe_mac_info {
 	bool thermal_sensor_enabled;
 	struct ixgbe_dmac_config dmac_config;
 	bool set_lben;
+	u32  max_link_up_time;
 };
 
 struct ixgbe_phy_info {
-- 
1.9.3

[dpdk-dev] [PATCH 37/37] ixgbe/base: add support for new x550 PHY IDs

[Wenzhuo Lu]

This patch adds support for new x550 PHY IDs:
0x0154 0x0223
0x0154 0x0221

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_phy.c  | 4 +++-
 drivers/net/ixgbe/base/ixgbe_type.h | 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ixgbe/base/ixgbe_phy.c b/drivers/net/ixgbe/base/ixgbe_phy.c
index 1e24ab8..51f32c6 100644
--- a/drivers/net/ixgbe/base/ixgbe_phy.c
+++ b/drivers/net/ixgbe/base/ixgbe_phy.c
@@ -507,7 +507,9 @@ enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id)
 	case TN1010_PHY_ID:
 		phy_type = ixgbe_phy_tn;
 		break;
-	case X550_PHY_ID:
+	case X550_PHY_ID1:
+	case X550_PHY_ID2:
+	case X550_PHY_ID3:
 	case X540_PHY_ID:
 		phy_type = ixgbe_phy_aq;
 		break;
diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index 5a01b86..881f34c 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -1561,7 +1561,9 @@ struct ixgbe_dmac_config {
 #define TN1010_PHY_ID	0x00A19410
 #define TNX_FW_REV	0xB
 #define X540_PHY_ID	0x01540200
-#define X550_PHY_ID	0x01540220
+#define X550_PHY_ID1	0x01540220
+#define X550_PHY_ID2	0x01540223
+#define X550_PHY_ID3	0x01540221
 #define X557_PHY_ID	0x01540240
 #define AQ_FW_REV	0x20
 #define QT2022_PHY_ID	0x0043A400
-- 
1.9.3

Re: [dpdk-dev] [PATCH 00/37] update ixgbe base driver

[Zhang, Helin]

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Wenzhuo Lu
> Sent: Wednesday, June 24, 2015 11:26 AM
> To: dev@dpdk.org
> Subject: [dpdk-dev] [PATCH 00/37] update ixgbe base driver
> 
> Short summary:
> *update Low Power Link Up to use MAC ops link *fix 1G and 10G link stability for
> x550em SFP+ *update x550em SFP link setup *add shift define for
> EEE_SU.TEEE_DLY *add x550em identify SFP module support *return err when
> SFP module is not present *power down the x550em PHY on overtemp events
> *restore advertised autoneg after setting LPLU *fix UniPHY link configuration
> *add macro for x550em bus speed fuse *add a new 82599 device ID *enable FEC
> when EEE is disabled *release semaphores in proper order *add wait helper for
> IOSF accesses *use a semaphore to serialize IOSF accesses *check for functional
> ucode *add KR/iXFI internal link mode support *check link again after getting
> speed *config MDIO clock for x550em *add support for led_on and led_off for
> X557 PHY LEDs *update EEE/FEC support for device X550EM_X_KR *introduce
> array of mac-type-dependent values *use mvals array for I2C_*_BY_MAC values
> *use mvals array for *_GPI*_BY_MAC values *use mvals array for CIA*_BY_MAC
> values *add new mac-dependent values for x540, x550 *disable SW LPLU
> implementation for x557 V2 *remove FEC disablement for x550em *modify
> register definition code style *specific process for X550 and X550em when
> disabling PCIe master *fix flow control to be KR only *force cs4227 LINE side to
> 10G SR mode *add support for new x550 PHY IDs
> 
> Wenzhuo Lu (37):
>   ixgbe/base: update readme
>   ixgbe/base: update Low Power Link Up to use MAC ops link
>   ixgbe/base: fix 1G and 10G link stability for x550em SFP+
>   ixgbe/base: update x550em SFP link setup
>   ixgbe/base: add shift define for EEE_SU.TEEE_DLY
>   ixgbe/base: add x550em identify SFP module support
>   ixgbe/base: fix potential warning
>   ixgbe/base: return err when SFP module is not present
>   ixgbe/base: power down the x550em PHY on overtemp events
>   ixgbe/base: restore advertised autoneg after setting LPLU
>   ixgbe/base: fix UniPHY link configuration
>   ixgbe/base: add macro for x550em bus speed fuse
>   ixgbe/base: add a new 82599 device ID
>   ixgbe/base: enable FEC when EEE is disabled
>   ixgbe/base: release semaphores in proper order
>   ixgbe/base: add wait helper for IOSF accesses
>   ixgbe/base: use a semaphore to serialize IOSF accesses
>   ixgbe/base: check for functional ucode
>   ixgbe/base: add KR/iXFI internal link mode support
>   ixgbe/base: check link again after getting speed
>   ixgbe/base: config MDIO clock for x550em
>   ixgbe/base: add support for led_on and led_off for X557 PHY LEDs
>   ixgbe/base: update EEE/FEC support for device X550EM_X_KR
>   ixgbe/base: introduce array of mac-type-dependent values
>   ixgbe/base: use mvals array for I2C_*_BY_MAC values
>   ixgbe/base: use mvals array for *_GPI*_BY_MAC values
>   ixgbe/base: use mvals array for CIA*_BY_MAC values
>   ixgbe/base: add new mac-dependent values for x540, x550
>   ixgbe/base: disable SW LPLU implementation for x557 V2
>   ixgbe/base: remove FEC disablement for x550em
>   ixgbe/base: modify register definition code style
>   ixgbe/base: specific process for X550 and X550em when disabling PCIe
>     master
>   ixgbe/base: fix flow control to be KR only
>   ixgbe/base: fix 5G and 2.5G speed description
>   ixgbe/base: force cs4227 LINE side to 10G SR mode
>   ixgbe/base: a minor optimization for max link up time
>   ixgbe/base: add support for new x550 PHY IDs
> 
>  drivers/net/ixgbe/base/README         |   2 +-
>  drivers/net/ixgbe/base/ixgbe_82598.c  |   4 +-
>  drivers/net/ixgbe/base/ixgbe_api.c    |  27 ++
>  drivers/net/ixgbe/base/ixgbe_common.c |   5 +-
>  drivers/net/ixgbe/base/ixgbe_phy.c    |   8 +-
>  drivers/net/ixgbe/base/ixgbe_phy.h    |   7 +-
>  drivers/net/ixgbe/base/ixgbe_type.h   | 251 +++++++++---
>  drivers/net/ixgbe/base/ixgbe_x540.c   |   8 +-
>  drivers/net/ixgbe/base/ixgbe_x550.c   | 699
> ++++++++++++++++++++++++----------
>  drivers/net/ixgbe/base/ixgbe_x550.h   |   3 +
>  10 files changed, 739 insertions(+), 275 deletions(-)
> 
> --
> 1.9.3


Acked-by: Helin Zhang <helin.zhang@intel.com>

Re: [dpdk-dev] [PATCH 00/37] update ixgbe base driver

[Thomas Monjalon]

2015-06-25 01:24, Zhang, Helin:
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Wenzhuo Lu
> > Wenzhuo Lu (37):
> >   ixgbe/base: update readme
> >   ixgbe/base: update Low Power Link Up to use MAC ops link
> >   ixgbe/base: fix 1G and 10G link stability for x550em SFP+
> >   ixgbe/base: update x550em SFP link setup
> >   ixgbe/base: add shift define for EEE_SU.TEEE_DLY
> >   ixgbe/base: add x550em identify SFP module support
> >   ixgbe/base: fix potential warning
> >   ixgbe/base: return err when SFP module is not present
> >   ixgbe/base: power down the x550em PHY on overtemp events
> >   ixgbe/base: restore advertised autoneg after setting LPLU
> >   ixgbe/base: fix UniPHY link configuration
> >   ixgbe/base: add macro for x550em bus speed fuse
> >   ixgbe/base: add a new 82599 device ID
> >   ixgbe/base: enable FEC when EEE is disabled
> >   ixgbe/base: release semaphores in proper order
> >   ixgbe/base: add wait helper for IOSF accesses
> >   ixgbe/base: use a semaphore to serialize IOSF accesses
> >   ixgbe/base: check for functional ucode
> >   ixgbe/base: add KR/iXFI internal link mode support
> >   ixgbe/base: check link again after getting speed
> >   ixgbe/base: config MDIO clock for x550em
> >   ixgbe/base: add support for led_on and led_off for X557 PHY LEDs
> >   ixgbe/base: update EEE/FEC support for device X550EM_X_KR
> >   ixgbe/base: introduce array of mac-type-dependent values
> >   ixgbe/base: use mvals array for I2C_*_BY_MAC values
> >   ixgbe/base: use mvals array for *_GPI*_BY_MAC values
> >   ixgbe/base: use mvals array for CIA*_BY_MAC values
> >   ixgbe/base: add new mac-dependent values for x540, x550
> >   ixgbe/base: disable SW LPLU implementation for x557 V2
> >   ixgbe/base: remove FEC disablement for x550em
> >   ixgbe/base: modify register definition code style
> >   ixgbe/base: specific process for X550 and X550em when disabling PCIe
> >     master
> >   ixgbe/base: fix flow control to be KR only
> >   ixgbe/base: fix 5G and 2.5G speed description
> >   ixgbe/base: force cs4227 LINE side to 10G SR mode
> >   ixgbe/base: a minor optimization for max link up time
> >   ixgbe/base: add support for new x550 PHY IDs
> 
> Acked-by: Helin Zhang <helin.zhang@intel.com>

Applied, thanks

Some patches have been reordered or squashed, and more importantly,
the X550 keyword was added in numerous commit titles to make the scope clear.

Wenzhuo, are you the original author of these code changes?
Are these changes already integrated in Linux and *BSD?

Thanks