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DB5PR02MB0806; 5:ZcaM7MnaDY6FpYNoGNi34VRsxQvaVC6nqnkXNti0cVq8Y7izmW5x7o5ajnDbGehvP4mTMHYEzFSKVHQrtFAneFf3WpMflDTtRurBRtcWJ86y58PMimFwPGZUMVfmwjHsZ+qILd1WsJuPewkSZdDU6g==; 24:Bcn0OVRSfdae0TMKSeQ/N+U9enJYW1zEH0ZEKofcbH57vEskwEw6nQbKghuerbhd9bF7mmbSYOCkHAmqRRWzXW5WMyU+YBJLkhmgqBsmIXE=; 20:eY5hGZ4+eF20Kl+824hIHTvLlMOycMifLS4EShLGDYTYAh/aK3Rsrp5HpAj/ygxxsbKIkA4mFIu9VuC3OgjqPQ== SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: ezchip.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Jul 2015 08:51:52.7147 (UTC) X-MS-Exchange-CrossTenant-Id: 0fc16e0a-3cd3-4092-8b2f-0a42cff122c3 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0fc16e0a-3cd3-4092-8b2f-0a42cff122c3; Ip=[124.207.145.166]; Helo=[bjgfarm-1.internal.tilera.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR02MB0806 Subject: [dpdk-dev] [PATCH v3 00/12] Introducing the TILE-Gx platform X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK <dev.dpdk.org> List-Unsubscribe: <http://dpdk.org/ml/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://dpdk.org/ml/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <http://dpdk.org/ml/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> X-List-Received-Date: Mon, 06 Jul 2015 08:51:57 -0000 This series adds support for the EZchip TILE-Gx family of SoCs. The architecture port in itself is fairly straight forward due to its reliance on generics for the most part. In addition to adding TILE-Gx architecture specific code, this series includes a few cross-platform fixes for DPDK (cpuflags, SSE related, etc.), as well as minor extensions to to accomodate a wider range of hugepage sizes and configurable mempool element alignment boundaries. Changes in this series: v3: Renewed the Signed-off-by line. v2: Removed RTE_LIBNAME per Thomas' feedback. Cyril Chemparathy (12): test: limit x86 cpuflags checks to x86 builds hash: fix compilation on non-X86 platforms hash: check SSE flags only on x86 builds eal: allow empty compile time flags config: remove RTE_LIBNAME definition. memzone: refactor rte_memzone_reserve() variants memzone: allow multiple pagesizes to be requested mempool: allow config override on element alignment tile: add page sizes for TILE-Gx/Mx platforms tile: initial TILE-Gx support. tile: Add TILE-Gx mPIPE poll mode driver. maintainers: claim responsibility for TILE-Gx platform MAINTAINERS | 4 + app/test/test_cpuflags.c | 6 +- config/common_bsdapp | 1 - config/common_linuxapp | 1 - config/defconfig_ppc_64-power8-linuxapp-gcc | 2 - config/defconfig_tile-tilegx-linuxapp-gcc | 70 + drivers/net/Makefile | 1 + drivers/net/mpipe/Makefile | 46 + drivers/net/mpipe/mpipe_tilegx.c | 1637 ++++++++++++++++++++ lib/librte_eal/common/eal_common_cpuflags.c | 5 +- lib/librte_eal/common/eal_common_memzone.c | 141 +- .../common/include/arch/tile/rte_atomic.h | 86 + .../common/include/arch/tile/rte_byteorder.h | 91 ++ .../common/include/arch/tile/rte_cpuflags.h | 85 + .../common/include/arch/tile/rte_cycles.h | 70 + .../common/include/arch/tile/rte_memcpy.h | 93 ++ .../common/include/arch/tile/rte_prefetch.h | 61 + .../common/include/arch/tile/rte_rwlock.h | 70 + .../common/include/arch/tile/rte_spinlock.h | 92 ++ lib/librte_eal/common/include/rte_memory.h | 16 +- lib/librte_eal/common/include/rte_memzone.h | 50 +- lib/librte_hash/rte_hash_crc.h | 2 + lib/librte_hash/rte_jhash.h | 3 +- lib/librte_mempool/rte_mempool.c | 16 +- lib/librte_mempool/rte_mempool.h | 6 + mk/arch/tile/rte.vars.mk | 39 + mk/machine/tilegx/rte.vars.mk | 57 + mk/rte.app.mk | 1 + mk/rte.vars.mk | 5 +- 29 files changed, 2639 insertions(+), 118 deletions(-) create mode 100644 config/defconfig_tile-tilegx-linuxapp-gcc create mode 100644 drivers/net/mpipe/Makefile create mode 100644 drivers/net/mpipe/mpipe_tilegx.c create mode 100644 lib/librte_eal/common/include/arch/tile/rte_atomic.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_byteorder.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cpuflags.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cycles.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memcpy.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_rwlock.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_spinlock.h create mode 100644 mk/arch/tile/rte.vars.mk create mode 100644 mk/machine/tilegx/rte.vars.mk -- 2.1.2