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HE1PR02MB0809; 5:8+d1lmrNwPn9SOSdRtjpVWwqRjJZiJcMwtHo/DC/BSCBH7oY07bp7seNIX04MiH/fWtJ70g+guY3UI86zJFeADjSGuRX+WCgYAURU/FaChyHD0CO/O9rB3TQaY4id2o+zW/ZfR3WGHTDTZT3aTk7YA==; 24:1gs7BdJpKjakMNEGy2rj5ndZEODg6JplRnLefGvR5mEZYzApzx5oJc9AuCojO0WE4NygVZfcovnPnGsdntXJNjR3HnLOl+7wJULbkErP5nI=; 20:5rmNKV6GPtdQmqmWPbw9KsVb6dO+2wZ/AoHivq717HFIszsO3Dh4a9+QIfSTYVo/Zz0FPxm/UjNRFKdbALRYpQ== SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: ezchip.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Jul 2015 05:00:00.9217 (UTC) X-MS-Exchange-CrossTenant-Id: 0fc16e0a-3cd3-4092-8b2f-0a42cff122c3 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0fc16e0a-3cd3-4092-8b2f-0a42cff122c3; Ip=[124.207.145.166]; Helo=[bjgfarm-1.internal.tilera.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR02MB0809 Cc: Cyril Chemparathy Subject: [dpdk-dev] [PATCH v4 02/11] hash: check SSE flags only on x86 builds X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 09 Jul 2015 05:00:05 -0000 From: Cyril Chemparathy This is necessary because the required CPU flags may not be defined on other architectures. Signed-off-by: Zhigang Lu Acked-by: Bruce Richardson --- lib/librte_hash/rte_hash_crc.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h index abdbd9a..1f6f5bf 100644 --- a/lib/librte_hash/rte_hash_crc.h +++ b/lib/librte_hash/rte_hash_crc.h @@ -425,12 +425,14 @@ static inline void rte_hash_crc_set_alg(uint8_t alg) { switch (alg) { +#if defined(RTE_ARCH_I686) || defined(RTE_ARCH_X86_64) case CRC32_SSE42_x64: if (! rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T)) alg = CRC32_SSE42; case CRC32_SSE42: if (! rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_2)) alg = CRC32_SW; +#endif case CRC32_SW: crc32_alg = alg; default: -- 2.1.2