[dpdk-dev] [PATCH v2] Fix the endian issue for the i40e read&write registers functions

[Zhe Tao <zhe.tao@intel.com>]

When using the Power big endian CPU for i40e NIC,
the current i40e related registers operations will cause a problem,
because the i40e registers are little endian which is inconsistent with
big endian CPU. Add the conversion for the inconsistency.
 
Signed-off-by: Zhe Tao <zhe.tao@intel.com>
---
PATCH v2: Edit the comments make it more clear

PATCH v1: Add the endian conversion for registers operations.

 drivers/net/i40e/base/i40e_osdep.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/i40e/base/i40e_osdep.h b/drivers/net/i40e/base/i40e_osdep.h
index 3ce8057..70d2721 100644
--- a/drivers/net/i40e/base/i40e_osdep.h
+++ b/drivers/net/i40e/base/i40e_osdep.h
@@ -122,10 +122,10 @@ do {                                                            \
 	((volatile uint32_t *)((char *)(a)->hw_addr + (reg)))
 static inline uint32_t i40e_read_addr(volatile void *addr)
 {
-	return I40E_PCI_REG(addr);
+	return rte_le_to_cpu_32(I40E_PCI_REG(addr));
 }
 #define I40E_PCI_REG_WRITE(reg, value) \
-	do {I40E_PCI_REG((reg)) = (value);} while(0)
+	do { I40E_PCI_REG((reg)) = rte_cpu_to_le_32(value); } while (0)
 
 #define I40E_WRITE_FLUSH(a) I40E_READ_REG(a, I40E_GLGEN_STAT)
 #define I40EVF_WRITE_FLUSH(a) I40E_READ_REG(a, I40E_VFGEN_RSTAT)
-- 
1.9.3