[dpdk-dev] [PATCH] ixgbe: fix 82599 / 82598 register differences

[Harry van Haaren <harry.van.haaren@intel.com>]

Ixgbe based 82598 and 82599 have different priority recieve link-on
register addresses. This is solved in base/ by providing in the
PXONRXC and PXONXCNT as seperate macros. This patch ensures the
correct address is read, avoiding reading garbage values.

Also PXON2OFFCNT doesn't exist in 82598, so it is not read for
that MAC.

This issue has existed since the drivers were imported into DPDK,
but was not easily discoverable as xstats were not available.
Tested using testpmd> show port xstats all

Fixes: af75078fece3 ("first public release")

Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
---
 drivers/net/ixgbe/ixgbe_ethdev.c | 20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index ec2918c..e950a91 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -2039,19 +2039,25 @@ ixgbe_read_stats_registers(struct ixgbe_hw *hw, struct ixgbe_hw_stats
 		hw_stats->mpc[i] += mp;
 		/* Running comprehensive total for stats display */
 		*total_missed_rx += hw_stats->mpc[i];
-		if (hw->mac.type == ixgbe_mac_82598EB)
+		if (hw->mac.type == ixgbe_mac_82598EB) {
 			hw_stats->rnbc[i] +=
 			    IXGBE_READ_REG(hw, IXGBE_RNBC(i));
+			hw_stats->pxonrxc[i] +=
+				IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
+			hw_stats->pxoffrxc[i] +=
+				IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
+		} else {
+			hw_stats->pxonrxc[i] +=
+				IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
+			hw_stats->pxoffrxc[i] +=
+				IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
+			hw_stats->pxon2offc[i] +=
+				IXGBE_READ_REG(hw, IXGBE_PXON2OFFCNT(i));
+		}
 		hw_stats->pxontxc[i] +=
 		    IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
-		hw_stats->pxonrxc[i] +=
-		    IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
 		hw_stats->pxofftxc[i] +=
 		    IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
-		hw_stats->pxoffrxc[i] +=
-		    IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
-		hw_stats->pxon2offc[i] +=
-		    IXGBE_READ_REG(hw, IXGBE_PXON2OFFCNT(i));
 	}
 	for (i = 0; i < IXGBE_QUEUE_STAT_COUNTERS; i++) {
 		hw_stats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
-- 
1.9.1