From: Jan Viktorin <viktorin@rehivetech.com>
To: Thomas Monjalon <thomas.monjalon@6wind.com>,
David Hunt <david.hunt@intel.com>,
dev@dpdk.org
Cc: Vlastimil Kosar <kosar@rehivetech.com>
Subject: [dpdk-dev] [PATCH v2 02/16] eal/arm: atomic operations for ARM
Date: Mon, 26 Oct 2015 17:37:24 +0100 [thread overview]
Message-ID: <1445877458-31052-3-git-send-email-viktorin@rehivetech.com> (raw)
In-Reply-To: <1445877458-31052-1-git-send-email-viktorin@rehivetech.com>
From: Vlastimil Kosar <kosar@rehivetech.com>
This patch adds architecture specific atomic operation file
for ARM architecture. It utilizes compiler intrinsics only.
Signed-off-by: Vlastimil Kosar <kosar@rehivetech.com>
Signed-off-by: Jan Viktorin <viktorin@rehivetech.com>
---
v1 -> v2:
* improve rte_wmb()
* use __atomic_* or __sync_*? (may affect the required GCC version)
Signed-off-by: Jan Viktorin <viktorin@rehivetech.com>
---
.../common/include/arch/arm/rte_atomic.h | 256 +++++++++++++++++++++
1 file changed, 256 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_atomic.h
diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic.h b/lib/librte_eal/common/include/arch/arm/rte_atomic.h
new file mode 100644
index 0000000..1815766
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic.h
@@ -0,0 +1,256 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2015 RehiveTech. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of RehiveTech nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_ATOMIC_ARM_H_
+#define _RTE_ATOMIC_ARM_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_atomic.h"
+
+/**
+ * General memory barrier.
+ *
+ * Guarantees that the LOAD and STORE operations generated before the
+ * barrier occur before the LOAD and STORE operations generated after.
+ */
+#define rte_mb() __sync_synchronize()
+
+/**
+ * Write memory barrier.
+ *
+ * Guarantees that the STORE operations generated before the barrier
+ * occur before the STORE operations generated after.
+ */
+#define rte_wmb() do { asm volatile ("dmb st" : : : "memory"); } while(0)
+
+/**
+ * Read memory barrier.
+ *
+ * Guarantees that the LOAD operations generated before the barrier
+ * occur before the LOAD operations generated after.
+ */
+#define rte_rmb() __sync_synchronize()
+
+/*------------------------- 16 bit atomic operations -------------------------*/
+
+#ifndef RTE_FORCE_INTRINSICS
+static inline int
+rte_atomic16_cmpset(volatile uint16_t *dst, uint16_t exp, uint16_t src)
+{
+ return __atomic_compare_exchange(dst, &exp, &src, 0, __ATOMIC_ACQUIRE,
+ __ATOMIC_ACQUIRE) ? 1 : 0;
+}
+
+static inline int rte_atomic16_test_and_set(rte_atomic16_t *v)
+{
+ return rte_atomic16_cmpset((volatile uint16_t *)&v->cnt, 0, 1);
+}
+
+static inline void
+rte_atomic16_inc(rte_atomic16_t *v)
+{
+ __atomic_add_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE);
+}
+
+static inline void
+rte_atomic16_dec(rte_atomic16_t *v)
+{
+ __atomic_sub_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE);
+}
+
+static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)
+{
+ return (__atomic_add_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE) == 0);
+}
+
+static inline int rte_atomic16_dec_and_test(rte_atomic16_t *v)
+{
+ return (__atomic_sub_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE) == 0);
+}
+
+/*------------------------- 32 bit atomic operations -------------------------*/
+
+static inline int
+rte_atomic32_cmpset(volatile uint32_t *dst, uint32_t exp, uint32_t src)
+{
+ return __atomic_compare_exchange(dst, &exp, &src, 0, __ATOMIC_ACQUIRE,
+ __ATOMIC_ACQUIRE) ? 1 : 0;
+}
+
+static inline int rte_atomic32_test_and_set(rte_atomic32_t *v)
+{
+ return rte_atomic32_cmpset((volatile uint32_t *)&v->cnt, 0, 1);
+}
+
+static inline void
+rte_atomic32_inc(rte_atomic32_t *v)
+{
+ __atomic_add_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE);
+}
+
+static inline void
+rte_atomic32_dec(rte_atomic32_t *v)
+{
+ __atomic_sub_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE);
+}
+
+static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)
+{
+ return (__atomic_add_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE) == 0);
+}
+
+static inline int rte_atomic32_dec_and_test(rte_atomic32_t *v)
+{
+ return (__atomic_sub_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE) == 0);
+}
+
+/*------------------------- 64 bit atomic operations -------------------------*/
+
+static inline int
+rte_atomic64_cmpset(volatile uint64_t *dst, uint64_t exp, uint64_t src)
+{
+ return __atomic_compare_exchange(dst, &exp, &src, 0, __ATOMIC_ACQUIRE,
+ __ATOMIC_ACQUIRE) ? 1 : 0;
+}
+
+static inline void
+rte_atomic64_init(rte_atomic64_t *v)
+{
+ int success = 0;
+ uint64_t tmp;
+
+ while (success == 0) {
+ tmp = v->cnt;
+ success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
+ tmp, 0);
+ }
+}
+
+static inline int64_t
+rte_atomic64_read(rte_atomic64_t *v)
+{
+ int success = 0;
+ uint64_t tmp;
+
+ while (success == 0) {
+ tmp = v->cnt;
+ /* replace the value by itself */
+ success = rte_atomic64_cmpset((volatile uint64_t *) &v->cnt,
+ tmp, tmp);
+ }
+ return tmp;
+}
+
+static inline void
+rte_atomic64_set(rte_atomic64_t *v, int64_t new_value)
+{
+ int success = 0;
+ uint64_t tmp;
+
+ while (success == 0) {
+ tmp = v->cnt;
+ success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
+ tmp, new_value);
+ }
+}
+
+static inline void
+rte_atomic64_add(rte_atomic64_t *v, int64_t inc)
+{
+ __atomic_fetch_add(&v->cnt, inc, __ATOMIC_ACQUIRE);
+}
+
+static inline void
+rte_atomic64_sub(rte_atomic64_t *v, int64_t dec)
+{
+ __atomic_fetch_sub(&v->cnt, dec, __ATOMIC_ACQUIRE);
+}
+
+static inline void
+rte_atomic64_inc(rte_atomic64_t *v)
+{
+ __atomic_fetch_add(&v->cnt, 1, __ATOMIC_ACQUIRE);
+}
+
+static inline void
+rte_atomic64_dec(rte_atomic64_t *v)
+{
+ __atomic_fetch_sub(&v->cnt, 1, __ATOMIC_ACQUIRE);
+}
+
+static inline int64_t
+rte_atomic64_add_return(rte_atomic64_t *v, int64_t inc)
+{
+ return __atomic_add_fetch(&v->cnt, inc, __ATOMIC_ACQUIRE);
+}
+
+static inline int64_t
+rte_atomic64_sub_return(rte_atomic64_t *v, int64_t dec)
+{
+ return __atomic_sub_fetch(&v->cnt, dec, __ATOMIC_ACQUIRE);
+}
+
+static inline int rte_atomic64_inc_and_test(rte_atomic64_t *v)
+{
+ return (__atomic_add_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE) == 0);
+}
+
+static inline int rte_atomic64_dec_and_test(rte_atomic64_t *v)
+{
+ return (__atomic_sub_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE) == 0);
+}
+
+static inline int rte_atomic64_test_and_set(rte_atomic64_t *v)
+{
+ return rte_atomic64_cmpset((volatile uint64_t *)&v->cnt, 0, 1);
+}
+
+/**
+ * Atomically set a 64-bit counter to 0.
+ *
+ * @param v
+ * A pointer to the atomic counter.
+ */
+static inline void rte_atomic64_clear(rte_atomic64_t *v)
+{
+ rte_atomic64_set(v, 0);
+}
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_ATOMIC_ARM_H_ */
--
2.6.1
next prev parent reply other threads:[~2015-10-26 16:39 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-26 16:37 [dpdk-dev] [PATCH v2 00/16] Support ARMv7 architecture Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 01/16] mk: Introduce " Jan Viktorin
2015-10-28 13:34 ` David Marchand
2015-10-28 17:32 ` Jan Viktorin
2015-10-28 17:36 ` Richardson, Bruce
2015-10-28 13:39 ` David Marchand
2015-10-28 17:32 ` Jan Viktorin
2015-10-26 16:37 ` Jan Viktorin [this message]
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 03/16] eal/arm: byte order operations for ARM Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 04/16] eal/arm: cpu cycle " Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 05/16] eal/arm: implement rdtsc by PMU or clock_gettime Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 06/16] eal/arm: prefetch operations for ARM Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 07/16] eal/arm: spinlock operations for ARM (without HTM) Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 08/16] eal/arm: vector memcpy for ARM Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 09/16] eal/arm: use vector memcpy only when NEON is enabled Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 10/16] eal/arm: cpu flag checks for ARM Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 11/16] eal/arm: detect arm architecture in cpu flags Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 12/16] eal/arm: rwlock support for ARM Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 13/16] gcc/arm: avoid alignment errors to break build Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 14/16] maintainers: claim responsibility for ARMv7 Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 15/16] lpm/arm: implement rte_lpm_lookupx4 using rte_lpm_lookup_bulk on for-x86 Jan Viktorin
2015-10-27 15:31 ` Ananyev, Konstantin
2015-10-27 15:38 ` Jan Viktorin
2015-10-26 16:37 ` [dpdk-dev] [PATCH v2 16/16] acl: check for SSE 4.1 support Jan Viktorin
2015-10-27 15:55 ` Ananyev, Konstantin
2015-10-27 17:10 ` Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 00/17] Support ARMv7 architecture Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 01/17] mk: Introduce " Jan Viktorin
2015-10-28 10:09 ` David Marchand
2015-10-28 10:56 ` Jan Viktorin
2015-10-28 13:40 ` David Marchand
2015-10-28 13:44 ` Hunt, David
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 02/17] eal/arm: atomic operations for ARM Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 03/17] eal/arm: byte order " Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 04/17] eal/arm: cpu cycle " Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 05/17] eal/arm: implement rdtsc by PMU or clock_gettime Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 06/17] eal/arm: prefetch operations for ARM Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 07/17] eal/arm: spinlock operations for ARM (without HTM) Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 08/17] eal/arm: vector memcpy for ARM Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 09/17] eal/arm: use vector memcpy only when NEON is enabled Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 10/17] eal/arm: cpu flag checks for ARM Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 11/17] eal/arm: detect arm architecture in cpu flags Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 12/17] eal/arm: rwlock support for ARM Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 13/17] gcc/arm: avoid alignment errors to break build Jan Viktorin
2015-10-28 12:16 ` David Marchand
2015-10-28 17:34 ` Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 14/17] maintainers: claim responsibility for ARMv7 Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 15/17] eal/arm: add very incomplete rte_vect Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 16/17] lpm/arm: implement rte_lpm_lookupx4 using rte_lpm_lookup_bulk for non-x86 Jan Viktorin
2015-10-27 19:13 ` [dpdk-dev] [PATCH v3 17/17] acl: handle when SSE 4.1 is unsupported Jan Viktorin
2015-10-28 14:54 ` [dpdk-dev] [PATCH v3 00/17] Support ARMv7 architecture David Marchand
2015-10-28 17:38 ` Jan Viktorin
2015-10-28 17:58 ` David Marchand
2015-10-29 14:02 ` Thomas Monjalon
2015-10-29 14:09 ` Jan Viktorin
2015-10-29 15:02 ` Thomas Monjalon
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 00/15] " Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 01/15] eal/arm: atomic operations for ARM Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 02/15] eal/arm: byte order " Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 03/15] eal/arm: cpu cycle " Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 04/15] eal/arm: implement rdtsc by PMU or clock_gettime Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 05/15] eal/arm: prefetch operations for ARM Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 06/15] eal/arm: spinlock operations for ARM (without HTM) Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 07/15] eal/arm: vector memcpy for ARM Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 08/15] eal/arm: use vector memcpy only when NEON is enabled Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 09/15] eal/arm: cpu flag checks for ARM Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 10/15] eal/arm: detect arm architecture in cpu flags Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 11/15] eal/arm: rwlock support for ARM Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 12/15] eal/arm: add very incomplete rte_vect Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 13/15] gcc/arm: avoid alignment errors to break build Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 14/15] mk: Introduce ARMv7 architecture Jan Viktorin
2015-10-29 12:43 ` [dpdk-dev] [PATCH v4 15/15] maintainers: claim responsibility for ARMv7 Jan Viktorin
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