From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id A7B3E91FA for ; Thu, 29 Oct 2015 10:19:05 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP; 29 Oct 2015 02:19:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,213,1444719600"; d="scan'208";a="674169104" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga003.jf.intel.com with ESMTP; 29 Oct 2015 02:19:04 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t9T9J2gp001726; Thu, 29 Oct 2015 17:19:02 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t9T9J0sJ014293; Thu, 29 Oct 2015 17:19:02 +0800 Received: (from yliu84x@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t9T9IxIO014286; Thu, 29 Oct 2015 17:18:59 +0800 From: Yong Liu To: dev@dpdk.org Date: Thu, 29 Oct 2015 17:18:43 +0800 Message-Id: <1446110325-14148-7-git-send-email-yong.liu@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1446110325-14148-1-git-send-email-yong.liu@intel.com> References: <1446110325-14148-1-git-send-email-yong.liu@intel.com> Subject: [dpdk-dev] [PATCH v3 6/8] e1000: lsc interrupt setup function only enable itself X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 29 Oct 2015 09:19:06 -0000 Only mask lsc interrupt bit when setup device interrupt. Signed-off-by: Marvin Liu diff --git a/drivers/net/e1000/em_ethdev.c b/drivers/net/e1000/em_ethdev.c index b1e0c3c..d2d017c 100644 --- a/drivers/net/e1000/em_ethdev.c +++ b/drivers/net/e1000/em_ethdev.c @@ -1343,11 +1343,14 @@ eth_em_vlan_offload_set(struct rte_eth_dev *dev, int mask) static int eth_em_interrupt_setup(struct rte_eth_dev *dev) { + uint32_t regval; struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); - E1000_WRITE_REG(hw, E1000_IMS, E1000_ICR_LSC); - rte_intr_enable(&(dev->pci_dev->intr_handle)); + /* clear interrupt */ + E1000_READ_REG(hw, E1000_ICR); + regval = E1000_READ_REG(hw, E1000_IMS); + E1000_WRITE_REG(hw, E1000_IMS, regval | E1000_ICR_LSC); return (0); } -- 1.9.3