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From: Jerin Jacob <jerin.jacob@caviumnetworks.com>
To: <dev@dpdk.org>
Subject: [dpdk-dev] [PATCH 01/12] eal: arm64: add armv8-a version of rte_atomic_64.h
Date: Tue, 3 Nov 2015 18:39:02 +0530	[thread overview]
Message-ID: <1446556153-18845-2-git-send-email-jerin.jacob@caviumnetworks.com> (raw)
In-Reply-To: <1446556153-18845-1-git-send-email-jerin.jacob@caviumnetworks.com>

except rte_?wb() functions other functions are used from
RTE_FORCE_INTRINSICS=y scheme

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 .../common/include/arch/arm/rte_atomic.h           |  4 +
 .../common/include/arch/arm/rte_atomic_64.h        | 88 ++++++++++++++++++++++
 2 files changed, 92 insertions(+)
 create mode 100644 lib/librte_eal/common/include/arch/arm/rte_atomic_64.h

diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic.h b/lib/librte_eal/common/include/arch/arm/rte_atomic.h
index f4f5783..f3f3b6e 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic.h
@@ -33,6 +33,10 @@
 #ifndef _RTE_ATOMIC_ARM_H_
 #define _RTE_ATOMIC_ARM_H_
 
+#ifdef RTE_ARCH_64
+#include <rte_atomic_64.h>
+#else
 #include <rte_atomic_32.h>
+#endif
 
 #endif /* _RTE_ATOMIC_ARM_H_ */
diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
new file mode 100644
index 0000000..671caa7
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -0,0 +1,88 @@
+/*
+ *   BSD LICENSE
+ *
+ *   Copyright (C) Cavium networks Ltd. 2015.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Cavium networks nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _RTE_ATOMIC_ARM64_H_
+#define _RTE_ATOMIC_ARM64_H_
+
+#ifndef RTE_FORCE_INTRINSICS
+#  error Platform must be built with CONFIG_RTE_FORCE_INTRINSICS
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_atomic.h"
+
+#define dmb(opt)  do { asm volatile("dmb " #opt : : : "memory"); } while (0)
+
+/**
+ * General memory barrier.
+ *
+ * Guarantees that the LOAD and STORE operations generated before the
+ * barrier occur before the LOAD and STORE operations generated after.
+ * This function is architecture dependent.
+ */
+static inline void rte_mb(void)
+{
+	dmb(ish);
+}
+
+/**
+ * Write memory barrier.
+ *
+ * Guarantees that the STORE operations generated before the barrier
+ * occur before the STORE operations generated after.
+ * This function is architecture dependent.
+ */
+static inline void rte_wmb(void)
+{
+	dmb(ishst);
+}
+
+/**
+ * Read memory barrier.
+ *
+ * Guarantees that the LOAD operations generated before the barrier
+ * occur before the LOAD operations generated after.
+ * This function is architecture dependent.
+ */
+static inline void rte_rmb(void)
+{
+	dmb(ishld);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_ATOMIC_ARM64_H_ */
-- 
2.1.0

  reply	other threads:[~2015-11-03 13:10 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-03 13:09 [dpdk-dev] [PATCH 00/12] DPDK armv8-a support Jerin Jacob
2015-11-03 13:09 ` Jerin Jacob [this message]
2015-11-03 13:09   ` [dpdk-dev] [PATCH 02/12] eal: arm64: add armv8-a version of rte_cpuflags_64.h Jerin Jacob
2015-11-03 13:09     ` [dpdk-dev] [PATCH 03/12] eal: arm64: add armv8-a version of rte_prefetch_64.h Jerin Jacob
2015-11-03 13:09       ` [dpdk-dev] [PATCH 04/12] eal: arm64: add armv8-a version of rte_cycles_64.h Jerin Jacob
2015-11-03 13:09         ` [dpdk-dev] [PATCH 05/12] eal: arm64: rte_memcpy_64.h version based libc memcpy Jerin Jacob
2015-11-03 13:09           ` [dpdk-dev] [PATCH 06/12] eal: arm: ret_vector.h improvements Jerin Jacob
2015-11-03 13:09             ` [dpdk-dev] [PATCH 07/12] app: test: added the new cpu flags of arm64 in test_cpuflags test case Jerin Jacob
2015-11-03 13:09               ` [dpdk-dev] [PATCH 08/12] acl: arm64: acl implementation using NEON gcc intrinsic Jerin Jacob
2015-11-03 13:09                 ` [dpdk-dev] [PATCH 09/12] mk: add support for armv8 on top of armv7 Jerin Jacob
2015-11-03 13:09                   ` [dpdk-dev] [PATCH 10/12] mk: add support for thunderx machine target based armv8-a Jerin Jacob
2015-11-03 13:09                     ` [dpdk-dev] [PATCH 11/12] updated release note for armv8 support for DPDK 2.2 Jerin Jacob
2015-11-03 13:09                       ` [dpdk-dev] [PATCH 12/12] maintainers: claim responsibility for ARMv8 Jerin Jacob
2015-11-03 14:17 ` [dpdk-dev] [PATCH 00/12] DPDK armv8-a support Hunt, David
2015-11-03 16:38   ` Jerin Jacob
2015-11-05 14:39     ` Hunt, David

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