From mboxrd@z Thu Jan 1 00:00:00 1970
Return-Path: <Jerin.Jacob@caviumnetworks.com>
Received: from na01-bn1-obe.outbound.protection.outlook.com
(mail-bn1on0069.outbound.protection.outlook.com [157.56.110.69])
by dpdk.org (Postfix) with ESMTP id 0C3BF91A9
for <dev@dpdk.org>; Fri, 6 Nov 2015 10:41:46 +0100 (CET)
Received: from BLUPR0701MB1969.namprd07.prod.outlook.com (10.163.121.20) by
BLUPR0701MB1890.namprd07.prod.outlook.com (10.162.88.151) with Microsoft SMTP
Server (TLS) id 15.1.312.18; Fri, 6 Nov 2015 09:41:45 +0000
Authentication-Results: spf=none (sender IP is )
smtp.mailfrom=Jerin.Jacob@caviumnetworks.com;
Received: from jerin.caveonetworks.com (111.93.218.67) by
BLUPR0701MB1969.namprd07.prod.outlook.com (10.163.121.20) with Microsoft SMTP
Server (TLS) id 15.1.318.15; Fri, 6 Nov 2015 09:41:41 +0000
From: Jerin Jacob <jerin.jacob@caviumnetworks.com>
To: <dev@dpdk.org>
Date: Fri, 6 Nov 2015 15:10:27 +0530
Message-ID: <1446802833-22265-9-git-send-email-jerin.jacob@caviumnetworks.com>
X-Mailer: git-send-email 1.9.3
In-Reply-To: <1446802833-22265-1-git-send-email-jerin.jacob@caviumnetworks.com>
References: <1446802833-22265-1-git-send-email-jerin.jacob@caviumnetworks.com>
MIME-Version: 1.0
Content-Type: text/plain
X-Originating-IP: [111.93.218.67]
X-ClientProxiedBy: MA1PR01CA0066.INDPRD01.PROD.OUTLOOK.COM (25.164.116.166) To
BLUPR0701MB1969.namprd07.prod.outlook.com (25.163.121.20)
X-Microsoft-Exchange-Diagnostics: 1; BLUPR0701MB1969;
2:e5UyCJRKSKvWeJvUhgpIoxebWXdrJu1rAoTmOszc5l6oExA0uBWQpE4ASS5ms/zeM+IFJiOcb2FeAeqb0S/xGsozZaQixMI8+zL/VTwO4RzvJjXKyt3ujVhuZjS5WQHjAaWRTJ2EhvPlHXDA0hRSrdktwyhXxyrJSk8YpB1QQxU=;
3:M6DTpQjuoQu6Cm7pPsb5EGVPJ9c+RlpAgRNxWqIRKOKPgfv+QZtw1ulHOAsOXGWwxffV/Rd2ux9yYoqNkx/giRJMLm6I2+/i1gXKfhCFxCKWtougS8WJd4bYPjbLlcsxyt5X9GYBvZ/kndWfAxQSlg==;
25:J0ATAf0Lo61w2+xEoevyExpgMos++qfI5uvAMMp6MWPjQl5DN7FWYJKiRRxd6QElpVrytmJKjMJoWrH4vQPvMIN6zFvWhHPlsgnMBDVxhi/3hBWCjH5WfFFeR80WpkzLFMXkOsS0wam1sHlMMyIDa5bUwi6mJsSuf9eyOGmik80pcvYX9o2KtyhHk5GeJivJdPJpyJfgh1WtPa1jUJA8eULz8s2LVVrLKEmyj4Bwp5m89M8z2fb+qyl1MNJi8HpwJvVXr06mcXHpmwDXdVWq/g==
X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR0701MB1969;
X-Microsoft-Exchange-Diagnostics: 1; BLUPR0701MB1969;
20:f0MHAI8Sxi8O27VjhpomOYruiw7Aj7YoBDT/I/BEzUke188vvkC+PjdAVqONhLtJtL3mC6OOr0pRXFt4y3VlUCDvNXQcEOIWMnQeiXOyagiwvaJkFtRFUccj+PYZSMRR77n/HjbJOJ+1NtGqNG/UARFT5FlvXXostZ2UgxSDGsF4hgqVOSb8ygdC0zx18Ly/1njHF+ijHZv85iJZq2xfP1jgs7ZnOSFO6lyAwpu8N3ogzb0CrOf+uLy52rKss6NmeelZr+tvhYpAhczN9nS6/fP/kuZqwYADO0OPl8G8Ldoh04uLUoVMBt5f8NYrkDG7JESQIT1rS45PzU+I7IdTkYllmLmCfiOiRM+mBT6eqC+DVhBAB+CjfGQDYxD5ANgwx/d7W5bunnMrwvXCpbCIlxhIHYSwpctj3d9+v+/1fh/S2XpDaRRCau08Ca4Zt5CPhZ71vBp13vkazw24nTZ8Enniwt9hAzhWkXm4OFK2nh6e2M8VS0IMQJpWaF6KWoEiniknNyeXtIdmT3vRTjP34uaUyCGtyk/5A1qEv4NabDu5gHu1Hdoes269bwJg06D0e+JBU0E9XT9RdLsvLqZPf2TvDQE+9+euS74tFPRG1GA=
X-Microsoft-Antispam-PRVS: <BLUPR0701MB19693DC21DA7978085726BEB8C280@BLUPR0701MB1969.namprd07.prod.outlook.com>
X-Exchange-Antispam-Report-Test: UriScan:(236414709691187);
X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0;
RULEID:(601004)(2401047)(5005006)(520078)(8121501046)(3002001)(10201501046);
SRVR:BLUPR0701MB1969; BCL:0; PCL:0; RULEID:; SRVR:BLUPR0701MB1969;
X-Microsoft-Exchange-Diagnostics: 1; BLUPR0701MB1969;
4:PqstJ8F0Y5U8KJyKSf0o6chv/oFceAJKEaajChaGDsV5P9EIbNvyFkkM+sIrWy5Czlccv+ZWg1DR/fjuZHrM+eJZnDwRMHxCGwHhW7cBYqn5xyayV4Xo5k1TVU9cQ9t/tUapt/3Dbdkikbtg/3A6ZB24Ueuxyc+PrT/S/7nyfQ1x6jurdASQFOi+ekU4392U74pfur4ESOqodYH+03zRxnuBj4mFl7PrlhiAsmrTSXmExZsraY13Mk7LM7BGvRnqyc0yRPAHn4251hdW7ln+pHLxQyTbVyPgxAbl0qqjbbtyGw0lkaYo3YxgqNZe5c23Qd8T9Z3N1r6bZz4uWNzCS4iAO/l2E8v1ut781PLRICOdb8F7Q1J3STsAVdQiheaw
X-Forefront-PRVS: 07521929C1
X-Forefront-Antispam-Report: SFV:NSPM;
SFS:(10009020)(6009001)(189002)(199003)(50226001)(122386002)(48376002)(50986999)(50466002)(106356001)(229853001)(110136002)(19580405001)(40100003)(76176999)(87976001)(105586002)(5004730100002)(77096005)(19580395003)(2351001)(5003940100001)(92566002)(107886002)(189998001)(5007970100001)(33646002)(5001960100002)(66066001)(5009440100003)(42186005)(2950100001)(4001430100002)(97736004)(575784001)(101416001)(69596002)(47776003)(36756003)(5008740100001)(53416004)(81156007)(86362001)(7099028);
DIR:OUT; SFP:1101; SCL:1; SRVR:BLUPR0701MB1969; H:jerin.caveonetworks.com;
FPR:; SPF:None; PTR:InfoNoRecords; MX:1; A:1; LANG:en;
Received-SPF: None (protection.outlook.com: caviumnetworks.com does not
designate permitted sender hosts)
X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; BLUPR0701MB1969;
23:8Sx4WyKGoRNGg/XAr5ld/gCJuofxfJf7pP9jHbk?=
=?us-ascii?Q?P3dFAWSHQjFpVK/Gid2EGx68Mn3G9kPUU6cr1DdFvTVpyJmuJg08iNU+jVBz?=
=?us-ascii?Q?6yDB53Ca3KBDwt+Fb7CZkkoZP1s/jjYGjLs+9IcHvAVkiKe/IGG9/Kj+nUiK?=
=?us-ascii?Q?pZCFxIXDXXnlQx2g9O8j9YpGG0UsklF7OmJfU91+abfo/1lEMcYrufWPtHzD?=
=?us-ascii?Q?qILTvWsIF3q1tuLtaGY6M5Gsic3tosyKKRjY/F0hYSexA1fXuUBSviFRPxC7?=
=?us-ascii?Q?PhEK5CbDXJKh915/WKfhAjti0G53He9sZBwuq7J+FQx4YSnqlQeBXM5q9V4Q?=
=?us-ascii?Q?bCycQHgXVaaqvANnRGPkWRsVTC4kwPRWu+atpAkNvoR0guBbN6GoPJG7ZmEJ?=
=?us-ascii?Q?eLHD3DPlnpIPSrauG2C5mdApfrifYQQ23qCLTojnAFRAtYq6r++nmc39UYXH?=
=?us-ascii?Q?Zg4jbizbcR9WfzFmjHwyVH8taq5RUUa60i54x6Fj/LdvkKuOXhBWRLGYZYLu?=
=?us-ascii?Q?hYJA5lbBXYPBLgPu1KKp5mpWtmAHVmET+Sm/RKhpJdan4o2slN5fZnixjDvH?=
=?us-ascii?Q?2+Tuye8k+2RowgsKSqOoi0PUpGl/S1BXKD6rhdbP/4ayp6/V7dlp1znmA4Zq?=
=?us-ascii?Q?Fuo7/C6G0DiY9DmIb3PgQDvUiW1cBWx6p0mtPta2YWgmnRLagktjn+w11W2w?=
=?us-ascii?Q?TR/4TjHT3v1v/VH1s72oY9PRnuF3FYCTKw/8j18AhMtNJCKZKj9axkaVuQrB?=
=?us-ascii?Q?k6ybkHCpuRTuuzobqPtcYCUmvkameNrRu3wXg7Poxdf73HdAKNhigiE/G0R4?=
=?us-ascii?Q?lVb+Y0ClrMBmqHdC/FIfrc54D+v0Rl3FIfvqbSsRllfLczZMLNH70A/rIYMt?=
=?us-ascii?Q?V6TAzMX6QmXpgQ2ERW2hyKSpYQu1xNHuf92tu5gKI577qa2JalxYyhQU/7Zb?=
=?us-ascii?Q?Rc9WkIivvolWatITHEpVslSd7pUprUttHwSYXaoXiedjtFGkMFK1BFwjtTnd?=
=?us-ascii?Q?RIsmPGcx258RuzeJc5gpYh8BHcTg7aAjwe+4azETvIpZwTfuC0+1VK5vdpn3?=
=?us-ascii?Q?a5Nh0TwORXmD4OD+0PMyByz0kBP2sruspt0RtMU0aY1rJ26XdhMmcTm8SG+n?=
=?us-ascii?Q?1mvCz3iiVbJfy6KYQFXdM0GPJ29hTEKLFe9W53FZ51Yfh6ThsTDKa9w=3D?=
=?us-ascii?Q?=3D?=
X-Microsoft-Exchange-Diagnostics: 1; BLUPR0701MB1969;
5:mpQbZ8lfl3EaqA4wYoWNNGcNhsrpPLkbs9hNiVpKfMyNiuJ3XR98Wd4leGuofcTElmMQaQTD3tuZ5iOwQsecJBKr05nbrbNZdGyEr9DRwo0VU8vlz9vZ871+W2JSHpRZZa2VIBMmYUIy2zREIOFoVQ==;
24:67nz5bk5ogPSpeyvXI7LZ+R/QqLb+hUyTvSDr88ORWGSTvRuuLcc1nkcQ5fmjc3uiKLqOcXL5FZQdGQKO0Tl/LGQiE2I2kePrJ4QVtSDdPk=;
20:ZWvJxZ1MB04X/NPdoDbojbbK9/yN/haOJNfQLO+9WfmlruTS+C3Fi0r5Q2MbEejHt4lQl/HDbIsmkLJQ+ngmYA==
SpamDiagnosticOutput: 1:23
SpamDiagnosticMetadata: NSPM
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Nov 2015 09:41:41.7260 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR0701MB1969
X-Microsoft-Exchange-Diagnostics: 1; BLUPR0701MB1890;
2:uLI3BgWl5euCUorH/DIhx28/iFnhPl0KtUmqJbS8OF++3hv1ddqSZ3XyatqO64vMI6qvRBQZ3TfXiJ11l09s+lKyoAUiRU58tUV1JxIVKbmwOCuxp4DV6Lelvy+f4TkO/R+KyPVkEXWu3jxSWfY7LHrG8xuyBa8qDv+/UlTEeEE=;
23:3mnAq2jkjIlRp9Dhq6M2L52tPJkS/ThmpW0Hsz6Rg6FRUeneBt1ZzdoJWlfwLMmw2Z0cJ1UqbnBm2M/UC2t1DNfxBsoGWTnIwjhsmSGg+ZoFAsuzRReBM2fqraYXj0QrVHG50YhoO6Obd1NZ2OfN5u8zSJRPGDRrBHelbH+JCAqvP5I30YvTg3Y9Ksc00xW+
X-OriginatorOrg: caviumnetworks.com
Subject: [dpdk-dev] [PATCH v3 08/14] acl: arm64: acl implementation using
NEON gcc intrinsic
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: patches and discussions about DPDK <dev.dpdk.org>
List-Unsubscribe: <http://dpdk.org/ml/options/dev>,
<mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://dpdk.org/ml/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <http://dpdk.org/ml/listinfo/dev>,
<mailto:dev-request@dpdk.org?subject=subscribe>
X-List-Received-Date: Fri, 06 Nov 2015 09:41:46 -0000
verified with testacl and acl_autotest applications on arm64 architecture.
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
app/test-acl/main.c | 4 +
lib/librte_acl/Makefile | 5 +
lib/librte_acl/acl.h | 4 +
lib/librte_acl/acl_run_neon.c | 46 +++++++
lib/librte_acl/acl_run_neon.h | 289 ++++++++++++++++++++++++++++++++++++++++++
lib/librte_acl/rte_acl.c | 25 ++++
lib/librte_acl/rte_acl.h | 1 +
7 files changed, 374 insertions(+)
create mode 100644 lib/librte_acl/acl_run_neon.c
create mode 100644 lib/librte_acl/acl_run_neon.h
diff --git a/app/test-acl/main.c b/app/test-acl/main.c
index 72ce83c..0b0c093 100644
--- a/app/test-acl/main.c
+++ b/app/test-acl/main.c
@@ -101,6 +101,10 @@ static const struct acl_alg acl_alg[] = {
.name = "avx2",
.alg = RTE_ACL_CLASSIFY_AVX2,
},
+ {
+ .name = "neon",
+ .alg = RTE_ACL_CLASSIFY_NEON,
+ },
};
static struct {
diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile
index 7a1cf8a..27f91d5 100644
--- a/lib/librte_acl/Makefile
+++ b/lib/librte_acl/Makefile
@@ -48,9 +48,14 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += rte_acl.c
SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_bld.c
SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_gen.c
SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c
+ifeq ($(CONFIG_RTE_ARCH_ARM64),y)
+SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_neon.c
+else
SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_sse.c
+endif
CFLAGS_acl_run_sse.o += -msse4.1
+CFLAGS_acl_run_neon.o += -flax-vector-conversions -Wno-maybe-uninitialized
#
# If the compiler supports AVX2 instructions,
diff --git a/lib/librte_acl/acl.h b/lib/librte_acl/acl.h
index eb4930c..09d6784 100644
--- a/lib/librte_acl/acl.h
+++ b/lib/librte_acl/acl.h
@@ -230,6 +230,10 @@ int
rte_acl_classify_avx2(const struct rte_acl_ctx *ctx, const uint8_t **data,
uint32_t *results, uint32_t num, uint32_t categories);
+int
+rte_acl_classify_neon(const struct rte_acl_ctx *ctx, const uint8_t **data,
+ uint32_t *results, uint32_t num, uint32_t categories);
+
#ifdef __cplusplus
}
#endif /* __cplusplus */
diff --git a/lib/librte_acl/acl_run_neon.c b/lib/librte_acl/acl_run_neon.c
new file mode 100644
index 0000000..b014451
--- /dev/null
+++ b/lib/librte_acl/acl_run_neon.c
@@ -0,0 +1,46 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright (C) Cavium networks Ltd. 2015.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Cavium networks nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#include "acl_run_neon.h"
+
+int
+rte_acl_classify_neon(const struct rte_acl_ctx *ctx, const uint8_t **data,
+ uint32_t *results, uint32_t num, uint32_t categories)
+{
+ if (likely(num >= 8))
+ return search_neon_8(ctx, data, results, num, categories);
+ else if (num >= 4)
+ return search_neon_4(ctx, data, results, num, categories);
+ else
+ return rte_acl_classify_scalar(ctx, data, results, num,
+ categories);
+}
diff --git a/lib/librte_acl/acl_run_neon.h b/lib/librte_acl/acl_run_neon.h
new file mode 100644
index 0000000..cf7c57f
--- /dev/null
+++ b/lib/librte_acl/acl_run_neon.h
@@ -0,0 +1,289 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright (C) Cavium networks Ltd. 2015.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Cavium networks nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#include "acl_run.h"
+#include "acl_vect.h"
+
+struct _neon_acl_const {
+ rte_xmm_t xmm_shuffle_input;
+ rte_xmm_t xmm_index_mask;
+ rte_xmm_t range_base;
+} neon_acl_const __attribute__((aligned(RTE_CACHE_LINE_SIZE))) = {
+ {
+ .u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
+ },
+ {
+ .u32 = {RTE_ACL_NODE_INDEX, RTE_ACL_NODE_INDEX,
+ RTE_ACL_NODE_INDEX, RTE_ACL_NODE_INDEX}
+ },
+ {
+ .u32 = {0xffffff00, 0xffffff04, 0xffffff08, 0xffffff0c}
+ },
+};
+
+/*
+ * Resolve priority for multiple results (neon version).
+ * This consists comparing the priority of the current traversal with the
+ * running set of results for the packet.
+ * For each result, keep a running array of the result (rule number) and
+ * its priority for each category.
+ */
+static inline void
+resolve_priority_neon(uint64_t transition, int n, const struct rte_acl_ctx *ctx,
+ struct parms *parms,
+ const struct rte_acl_match_results *p,
+ uint32_t categories)
+{
+ uint32_t x;
+ int32x4_t results, priority, results1, priority1;
+ uint32x4_t selector;
+ int32_t *saved_results, *saved_priority;
+
+ for (x = 0; x < categories; x += RTE_ACL_RESULTS_MULTIPLIER) {
+ saved_results = (int32_t *)(&parms[n].cmplt->results[x]);
+ saved_priority = (int32_t *)(&parms[n].cmplt->priority[x]);
+
+ /* get results and priorities for completed trie */
+ results = vld1q_s32(
+ (const int32_t *)&p[transition].results[x]);
+ priority = vld1q_s32(
+ (const int32_t *)&p[transition].priority[x]);
+
+ /* if this is not the first completed trie */
+ if (parms[n].cmplt->count != ctx->num_tries) {
+ /* get running best results and their priorities */
+ results1 = vld1q_s32(saved_results);
+ priority1 = vld1q_s32(saved_priority);
+
+ /* select results that are highest priority */
+ selector = vcgtq_s32(priority1, priority);
+ results = vbslq_s32(selector, results1, results);
+ priority = vbslq_s32(selector, priority1, priority);
+ }
+
+ /* save running best results and their priorities */
+ vst1q_s32(saved_results, results);
+ vst1q_s32(saved_priority, priority);
+ }
+}
+
+/*
+ * Check for any match in 4 transitions
+ */
+static inline __attribute__((always_inline)) uint32_t
+check_any_match_x4(uint64_t val[])
+{
+ return ((val[0] | val[1] | val[2] | val[3]) & RTE_ACL_NODE_MATCH);
+}
+
+static inline __attribute__((always_inline)) void
+acl_match_check_x4(int slot, const struct rte_acl_ctx *ctx, struct parms *parms,
+ struct acl_flow_data *flows, uint64_t transitions[])
+{
+ while (check_any_match_x4(transitions)) {
+ transitions[0] = acl_match_check(transitions[0], slot, ctx,
+ parms, flows, resolve_priority_neon);
+ transitions[1] = acl_match_check(transitions[1], slot + 1, ctx,
+ parms, flows, resolve_priority_neon);
+ transitions[2] = acl_match_check(transitions[2], slot + 2, ctx,
+ parms, flows, resolve_priority_neon);
+ transitions[3] = acl_match_check(transitions[3], slot + 3, ctx,
+ parms, flows, resolve_priority_neon);
+ }
+}
+
+/*
+ * Process 4 transitions (in 2 NEON Q registers) in parallel
+ */
+static inline __attribute__((always_inline)) int32x4_t
+transition4(int32x4_t next_input, const uint64_t *trans, uint64_t transitions[])
+{
+ int32x4x2_t tr_hi_lo;
+ int32x4_t t, in, r;
+ uint32x4_t index_msk, node_type, addr;
+ uint32x4_t dfa_msk, mask, quad_ofs, dfa_ofs;
+
+ /* Move low 32 into tr_hi_lo.val[0] and high 32 into tr_hi_lo.val[1] */
+ tr_hi_lo = vld2q_s32((const int32_t *)transitions);
+
+ /* Calculate the address (array index) for all 4 transitions. */
+
+ index_msk = vld1q_u32((const uint32_t *)&neon_acl_const.xmm_index_mask);
+
+ /* Calc node type and node addr */
+ node_type = vbicq_s32(tr_hi_lo.val[0], index_msk);
+ addr = vandq_s32(tr_hi_lo.val[0], index_msk);
+
+ /* t = 0 */
+ t = veorq_s32(node_type, node_type);
+
+ /* mask for DFA type(0) nodes */
+ dfa_msk = vceqq_u32(node_type, t);
+
+ mask = vld1q_s32((const int32_t *)&neon_acl_const.xmm_shuffle_input);
+ in = vqtbl1q_u8((uint8x16_t)next_input, (uint8x16_t)mask);
+
+ /* DFA calculations. */
+ r = vshrq_n_u32(in, 30); /* div by 64 */
+ mask = vld1q_s32((const int32_t *)&neon_acl_const.range_base);
+ r = vaddq_u8(r, mask);
+ t = vshrq_n_u32(in, 24);
+ r = vqtbl1q_u8((uint8x16_t)tr_hi_lo.val[1], (uint8x16_t)r);
+ dfa_ofs = vsubq_s32(t, r);
+
+ /* QUAD/SINGLE calculations. */
+ t = vcgtq_s8(in, tr_hi_lo.val[1]);
+ t = vabsq_s8(t);
+ t = vpaddlq_u8(t);
+ quad_ofs = vpaddlq_u16(t);
+
+ /* blend DFA and QUAD/SINGLE. */
+ t = vbslq_u8(dfa_msk, dfa_ofs, quad_ofs);
+
+ /* calculate address for next transitions */
+ addr = vaddq_u32(addr, t);
+
+ /* Fill next transitions */
+ transitions[0] = trans[vgetq_lane_u32(addr, 0)];
+ transitions[1] = trans[vgetq_lane_u32(addr, 1)];
+ transitions[2] = trans[vgetq_lane_u32(addr, 2)];
+ transitions[3] = trans[vgetq_lane_u32(addr, 3)];
+
+ return vshrq_n_u32(next_input, CHAR_BIT);
+}
+
+/*
+ * Execute trie traversal with 8 traversals in parallel
+ */
+static inline int
+search_neon_8(const struct rte_acl_ctx *ctx, const uint8_t **data,
+ uint32_t *results, uint32_t total_packets, uint32_t categories)
+{
+ int n;
+ struct acl_flow_data flows;
+ uint64_t index_array[8];
+ struct completion cmplt[8];
+ struct parms parms[8];
+ int32x4_t input0, input1;
+
+ acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results,
+ total_packets, categories, ctx->trans_table);
+
+ for (n = 0; n < 8; n++) {
+ cmplt[n].count = 0;
+ index_array[n] = acl_start_next_trie(&flows, parms, n, ctx);
+ }
+
+ /* Check for any matches. */
+ acl_match_check_x4(0, ctx, parms, &flows, &index_array[0]);
+ acl_match_check_x4(4, ctx, parms, &flows, &index_array[4]);
+
+ while (flows.started > 0) {
+ /* Gather 4 bytes of input data for each stream. */
+ input0 = vsetq_lane_s32(GET_NEXT_4BYTES(parms, 0), input0, 0);
+ input1 = vsetq_lane_s32(GET_NEXT_4BYTES(parms, 4), input1, 0);
+
+ input0 = vsetq_lane_s32(GET_NEXT_4BYTES(parms, 1), input0, 1);
+ input1 = vsetq_lane_s32(GET_NEXT_4BYTES(parms, 5), input1, 1);
+
+ input0 = vsetq_lane_s32(GET_NEXT_4BYTES(parms, 2), input0, 2);
+ input1 = vsetq_lane_s32(GET_NEXT_4BYTES(parms, 6), input1, 2);
+
+ input0 = vsetq_lane_s32(GET_NEXT_4BYTES(parms, 3), input0, 3);
+ input1 = vsetq_lane_s32(GET_NEXT_4BYTES(parms, 7), input1, 3);
+
+ /* Process the 4 bytes of input on each stream. */
+
+ input0 = transition4(input0, flows.trans, &index_array[0]);
+ input1 = transition4(input1, flows.trans, &index_array[4]);
+
+ input0 = transition4(input0, flows.trans, &index_array[0]);
+ input1 = transition4(input1, flows.trans, &index_array[4]);
+
+ input0 = transition4(input0, flows.trans, &index_array[0]);
+ input1 = transition4(input1, flows.trans, &index_array[4]);
+
+ input0 = transition4(input0, flows.trans, &index_array[0]);
+ input1 = transition4(input1, flows.trans, &index_array[4]);
+
+ /* Check for any matches. */
+ acl_match_check_x4(0, ctx, parms, &flows, &index_array[0]);
+ acl_match_check_x4(4, ctx, parms, &flows, &index_array[4]);
+ }
+
+ return 0;
+}
+
+/*
+ * Execute trie traversal with 4 traversals in parallel
+ */
+static inline int
+search_neon_4(const struct rte_acl_ctx *ctx, const uint8_t **data,
+ uint32_t *results, int total_packets, uint32_t categories)
+{
+ int n;
+ struct acl_flow_data flows;
+ uint64_t index_array[4];
+ struct completion cmplt[4];
+ struct parms parms[4];
+ int32x4_t input;
+
+ acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results,
+ total_packets, categories, ctx->trans_table);
+
+ for (n = 0; n < 4; n++) {
+ cmplt[n].count = 0;
+ index_array[n] = acl_start_next_trie(&flows, parms, n, ctx);
+ }
+
+ /* Check for any matches. */
+ acl_match_check_x4(0, ctx, parms, &flows, index_array);
+
+ while (flows.started > 0) {
+ /* Gather 4 bytes of input data for each stream. */
+ input = vsetq_lane_s32(GET_NEXT_4BYTES(parms, 0), input, 0);
+ input = vsetq_lane_s32(GET_NEXT_4BYTES(parms, 1), input, 1);
+ input = vsetq_lane_s32(GET_NEXT_4BYTES(parms, 2), input, 2);
+ input = vsetq_lane_s32(GET_NEXT_4BYTES(parms, 3), input, 3);
+
+ /* Process the 4 bytes of input on each stream. */
+ input = transition4(input, flows.trans, index_array);
+ input = transition4(input, flows.trans, index_array);
+ input = transition4(input, flows.trans, index_array);
+ input = transition4(input, flows.trans, index_array);
+
+ /* Check for any matches. */
+ acl_match_check_x4(0, ctx, parms, &flows, index_array);
+ }
+
+ return 0;
+}
diff --git a/lib/librte_acl/rte_acl.c b/lib/librte_acl/rte_acl.c
index d60219f..e2fdebd 100644
--- a/lib/librte_acl/rte_acl.c
+++ b/lib/librte_acl/rte_acl.c
@@ -55,11 +55,32 @@ rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,
return -ENOTSUP;
}
+int __attribute__ ((weak))
+rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
+ __rte_unused const uint8_t **data,
+ __rte_unused uint32_t *results,
+ __rte_unused uint32_t num,
+ __rte_unused uint32_t categories)
+{
+ return -ENOTSUP;
+}
+
+int __attribute__ ((weak))
+rte_acl_classify_neon(__rte_unused const struct rte_acl_ctx *ctx,
+ __rte_unused const uint8_t **data,
+ __rte_unused uint32_t *results,
+ __rte_unused uint32_t num,
+ __rte_unused uint32_t categories)
+{
+ return -ENOTSUP;
+}
+
static const rte_acl_classify_t classify_fns[] = {
[RTE_ACL_CLASSIFY_DEFAULT] = rte_acl_classify_scalar,
[RTE_ACL_CLASSIFY_SCALAR] = rte_acl_classify_scalar,
[RTE_ACL_CLASSIFY_SSE] = rte_acl_classify_sse,
[RTE_ACL_CLASSIFY_AVX2] = rte_acl_classify_avx2,
+ [RTE_ACL_CLASSIFY_NEON] = rte_acl_classify_neon,
};
/* by default, use always available scalar code path. */
@@ -93,6 +114,9 @@ rte_acl_init(void)
{
enum rte_acl_classify_alg alg = RTE_ACL_CLASSIFY_DEFAULT;
+#ifdef RTE_ARCH_ARM64
+ alg = RTE_ACL_CLASSIFY_NEON;
+#else
#ifdef CC_AVX2_SUPPORT
if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
alg = RTE_ACL_CLASSIFY_AVX2;
@@ -102,6 +126,7 @@ rte_acl_init(void)
#endif
alg = RTE_ACL_CLASSIFY_SSE;
+#endif
rte_acl_set_default_classify(alg);
}
diff --git a/lib/librte_acl/rte_acl.h b/lib/librte_acl/rte_acl.h
index 98ef2fc..0979a09 100644
--- a/lib/librte_acl/rte_acl.h
+++ b/lib/librte_acl/rte_acl.h
@@ -270,6 +270,7 @@ enum rte_acl_classify_alg {
RTE_ACL_CLASSIFY_SCALAR = 1, /**< generic implementation. */
RTE_ACL_CLASSIFY_SSE = 2, /**< requires SSE4.1 support. */
RTE_ACL_CLASSIFY_AVX2 = 3, /**< requires AVX2 support. */
+ RTE_ACL_CLASSIFY_NEON = 4, /**< requires NEON support. */
RTE_ACL_CLASSIFY_NUM /* should always be the last one. */
};
--
1.9.3