From: <harish.patil@qlogic.com>
To: <dev@dpdk.org>
Subject: [dpdk-dev] [PATCH] l3fwd: Fix l3fwd crash due to unaligned load/store intrinsics
Date: Sun, 8 Nov 2015 11:39:56 -0800 [thread overview]
Message-ID: <1447011596-2993-1-git-send-email-harish.patil@qlogic.com> (raw)
From: Harish Patil <harish.patil@qlogic.com>
l3fwd app expects PMDs to return packets whose L2 header is
16-byte aligned due to usage of _mm_load_si128()/_mm_store_si128()
intrinsics in the app. However, most of the protocol stacks expects
packets such that its IP/L3 header be aligned on a 16-byte boundary.
Based on the recommendations received on dpdk-dev, we are changing
the l3fwd app to use _mm_loadu_si128()/_mm_loadu_si128() so that the
address need not be 16-byte aligned and thereby preventing crash.
We have tested that there is no performance impact due to this
change.
Signed-off-by: Harish Patil <harish.patil@qlogic.com>
---
examples/l3fwd/main.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/examples/l3fwd/main.c b/examples/l3fwd/main.c
index 1f3e5c6..4b8b754 100644
--- a/examples/l3fwd/main.c
+++ b/examples/l3fwd/main.c
@@ -1220,14 +1220,14 @@ process_packet(struct lcore_conf *qconf, struct rte_mbuf *pkt,
dst_ipv4 = rte_be_to_cpu_32(dst_ipv4);
dp = get_dst_port(qconf, pkt, dst_ipv4, portid);
- te = _mm_load_si128((__m128i *)eth_hdr);
+ te = _mm_loadu_si128((__m128i *)eth_hdr);
ve = val_eth[dp];
dst_port[0] = dp;
rfc1812_process(ipv4_hdr, dst_port, pkt->packet_type);
te = _mm_blend_epi16(te, ve, MASK_ETH);
- _mm_store_si128((__m128i *)eth_hdr, te);
+ _mm_storeu_si128((__m128i *)eth_hdr, te);
}
/*
@@ -1313,16 +1313,16 @@ processx4_step3(struct rte_mbuf *pkt[FWDSTEP], uint16_t dst_port[FWDSTEP])
p[3] = rte_pktmbuf_mtod(pkt[3], __m128i *);
ve[0] = val_eth[dst_port[0]];
- te[0] = _mm_load_si128(p[0]);
+ te[0] = _mm_loadu_si128(p[0]);
ve[1] = val_eth[dst_port[1]];
- te[1] = _mm_load_si128(p[1]);
+ te[1] = _mm_loadu_si128(p[1]);
ve[2] = val_eth[dst_port[2]];
- te[2] = _mm_load_si128(p[2]);
+ te[2] = _mm_loadu_si128(p[2]);
ve[3] = val_eth[dst_port[3]];
- te[3] = _mm_load_si128(p[3]);
+ te[3] = _mm_loadu_si128(p[3]);
/* Update first 12 bytes, keep rest bytes intact. */
te[0] = _mm_blend_epi16(te[0], ve[0], MASK_ETH);
@@ -1330,10 +1330,10 @@ processx4_step3(struct rte_mbuf *pkt[FWDSTEP], uint16_t dst_port[FWDSTEP])
te[2] = _mm_blend_epi16(te[2], ve[2], MASK_ETH);
te[3] = _mm_blend_epi16(te[3], ve[3], MASK_ETH);
- _mm_store_si128(p[0], te[0]);
- _mm_store_si128(p[1], te[1]);
- _mm_store_si128(p[2], te[2]);
- _mm_store_si128(p[3], te[3]);
+ _mm_storeu_si128(p[0], te[0]);
+ _mm_storeu_si128(p[1], te[1]);
+ _mm_storeu_si128(p[2], te[2]);
+ _mm_storeu_si128(p[3], te[3]);
rfc1812_process((struct ipv4_hdr *)((struct ether_hdr *)p[0] + 1),
&dst_port[0], pkt[0]->packet_type);
--
1.8.3.1
next reply other threads:[~2015-11-08 19:40 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-08 19:39 harish.patil [this message]
2015-11-13 10:35 ` Ananyev, Konstantin
2015-11-16 18:16 ` Harish Patil
2015-12-07 2:16 ` Thomas Monjalon
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