From: Jingjing Wu <jingjing.wu@intel.com>
To: dev@dpdk.org
Subject: [dpdk-dev] [PATCH] i40e: fix the write flush in vf driver
Date: Mon, 16 Nov 2015 15:08:30 +0800 [thread overview]
Message-ID: <1447657710-10563-1-git-send-email-jingjing.wu@intel.com> (raw)
For i40e vf driver, should use I40EVF_WRITE_FLUSH to flush
configuration but not I40E_WRITE_FLUSH. This patch fixed this issue.
Fixes: be6c228d4da3 (i40evf: support Rx interrupt)
Reported-by: Qian Xu <qian.q.xu@intel.com>
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/i40e_ethdev_vf.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c
index 7ce8687..ea96f85 100644
--- a/drivers/net/i40e/i40e_ethdev_vf.c
+++ b/drivers/net/i40e/i40e_ethdev_vf.c
@@ -1700,7 +1700,7 @@ i40evf_enable_queues_intr(struct rte_eth_dev *dev)
I40E_VFINT_DYN_CTL01,
I40E_VFINT_DYN_CTL01_INTENA_MASK |
I40E_VFINT_DYN_CTL01_CLEARPBA_MASK);
- I40E_WRITE_FLUSH(hw);
+ I40EVF_WRITE_FLUSH(hw);
return;
}
@@ -1716,7 +1716,7 @@ i40evf_enable_queues_intr(struct rte_eth_dev *dev)
I40E_VFINT_DYN_CTL01_INTENA_MASK |
I40E_VFINT_DYN_CTL01_CLEARPBA_MASK);
- I40E_WRITE_FLUSH(hw);
+ I40EVF_WRITE_FLUSH(hw);
}
static inline void
@@ -1728,7 +1728,7 @@ i40evf_disable_queues_intr(struct rte_eth_dev *dev)
if (!rte_intr_allow_others(intr_handle)) {
I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
- I40E_WRITE_FLUSH(hw);
+ I40EVF_WRITE_FLUSH(hw);
return;
}
@@ -1740,7 +1740,7 @@ i40evf_disable_queues_intr(struct rte_eth_dev *dev)
else
I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
- I40E_WRITE_FLUSH(hw);
+ I40EVF_WRITE_FLUSH(hw);
}
static int
@@ -1770,7 +1770,7 @@ i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
(interval <<
I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
- I40E_WRITE_FLUSH(hw);
+ I40EVF_WRITE_FLUSH(hw);
rte_intr_enable(&dev->pci_dev->intr_handle);
@@ -1793,7 +1793,7 @@ i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
I40E_RX_VEC_START),
0);
- I40E_WRITE_FLUSH(hw);
+ I40EVF_WRITE_FLUSH(hw);
return 0;
}
--
2.4.0
next reply other threads:[~2015-11-16 7:08 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-16 7:08 Jingjing Wu [this message]
2015-11-16 7:19 ` Zhang, Helin
2015-11-23 22:29 ` Thomas Monjalon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1447657710-10563-1-git-send-email-jingjing.wu@intel.com \
--to=jingjing.wu@intel.com \
--cc=dev@dpdk.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).