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BY1PR0701MB1722; 5:Ld4yb/7USTY6IoR1WQFCEuhgokp1AeEPzK9yNvDBj17sczapkWOv6GK1zfh3WYvrBGgHGzmbLyz0LyEg3YXeW0dSse/lr04m7pqOLdxqH5NbJiCnLzRrzjZEwo7sWZ8TutXuqugYLW4Q0X+GfXIv1g==; 24:6mTaLR72D2AfqpI9AkxGZtE4ro/a5kYxhCv8G6KcRq3uY1Hhb4mkkfMU48c8b14xesFwNrvp06aMc3RFp1u1srg+BjyEzxgdmgFOBeMZBFk= SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Nov 2015 13:35:04.7734 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY1PR0701MB1722 Subject: [dpdk-dev] [PATCH v3 2/2] config: disable CONFIG_RTE_SCHED_VECTOR for arm X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 27 Nov 2015 13:35:08 -0000 Commit 42ec27a0178a causes compiling error on arm, as RTE_SCHED_VECTOR does support only SSE intrinsic, so disable it till we have neon support. Fixes: 42ec27a0178a ("sched: enable SSE optimizations in config") Signed-off-by: Jerin Jacob --- config/common_arm64 | 1 + config/defconfig_arm-armv7a-linuxapp-gcc | 1 + 2 files changed, 2 insertions(+) diff --git a/config/common_arm64 b/config/common_arm64 index 5e5e303..d6a9cb9 100644 --- a/config/common_arm64 +++ b/config/common_arm64 @@ -46,3 +46,4 @@ CONFIG_RTE_LIBRTE_I40E_PMD=n CONFIG_RTE_LIBRTE_LPM=n CONFIG_RTE_LIBRTE_TABLE=n CONFIG_RTE_LIBRTE_PIPELINE=n +CONFIG_RTE_SCHED_VECTOR=n diff --git a/config/defconfig_arm-armv7a-linuxapp-gcc b/config/defconfig_arm-armv7a-linuxapp-gcc index 82143af..9924ff9 100644 --- a/config/defconfig_arm-armv7a-linuxapp-gcc +++ b/config/defconfig_arm-armv7a-linuxapp-gcc @@ -57,6 +57,7 @@ CONFIG_RTE_LIBRTE_ACL=n CONFIG_RTE_LIBRTE_LPM=n CONFIG_RTE_LIBRTE_TABLE=n CONFIG_RTE_LIBRTE_PIPELINE=n +CONFIG_RTE_SCHED_VECTOR=n # cannot use those on ARM CONFIG_RTE_KNI_KMOD=n -- 2.1.0