From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f51.google.com (mail-wm0-f51.google.com [74.125.82.51]) by dpdk.org (Postfix) with ESMTP id 8BF4ADE0 for ; Tue, 1 Dec 2015 11:41:41 +0100 (CET) Received: by wmec201 with SMTP id c201so7236240wme.1 for ; Tue, 01 Dec 2015 02:41:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=o677fakvw0FzRPYnZIpmliG9Cdhw3L87FWE+PudH/bI=; b=fHwouMvZl2oWPQujv/PvBmPBGAbWnOQ/2JtHdYkAfSAJAQty7FbkJpDsCBl/yj0JO+ Zzcnp9yhKQPsUpS2U2g4e/1hhjZZyo5TO9GTmSpuqgOJxYvHrhm4DbROJ3A0R+YG2S5+ VNxsGARx+LZGaabCqizFjDFJs/BtjfDcF3t4zxKUfqgS8sZLcmbKnFqW8+HaUAGrcxW/ EJKa4AfslXhmb1Z23JYTnzbTaSd8eBeORkjTyGH+qpZYasMxUOrWznCXjWjmgjjX9S/i crtd9v9PEIr0/V1/qF46hvBB+WnIc4C1qzq87tpViJBEIQSlAujdLmABYMcdkEW2PBL0 L0+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=o677fakvw0FzRPYnZIpmliG9Cdhw3L87FWE+PudH/bI=; b=e5IIFz65KiO7nMoj3lC87pk1OXIlEmZUccgoejmMrTiOY6MXA+xDp4LOVusB4tYJBt nUG0S92RrV11GGUUf/UxqbbtzlmuhcrZVxa75OHkxoQREoRFteTtJpBm9CoxA/QBf6gD 73XhPJ5N4lsSuW+gMtwghOOUQWicAoImB3ejJvFPMmYR+Vutlz9KOwu12FeUD8WB5IKP lqFUReJjdYZaG+v+Gd7g5OhGpCt5wPx+FRA1Wo8s34ZB3DLQa7gqetPq0hDHKx6wS+48 0+fUsnUUxjOtm/Qtf+K+uqxWfhSxCtYZnDGp7eLZVd8asXHQINPQSURgMyTteFSzj/Yn 3MXA== X-Gm-Message-State: ALoCoQl8G/HmgueLtERelIUxPxEcrnSWae7m/0y3cfZpy4DnwZfMPeqEOkEmHl/xNQ2tp8fZ/j2P X-Received: by 10.194.92.4 with SMTP id ci4mr93087379wjb.175.1448966501461; Tue, 01 Dec 2015 02:41:41 -0800 (PST) Received: from localhost ([112.65.63.41]) by smtp.gmail.com with ESMTPSA id v196sm25523494wmv.10.2015.12.01.02.41.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Dec 2015 02:41:41 -0800 (PST) From: Jianbo Liu To: dev@dpdk.org Date: Tue, 1 Dec 2015 13:41:14 -0500 Message-Id: <1448995276-9599-3-git-send-email-jianbo.liu@linaro.org> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1448995276-9599-1-git-send-email-jianbo.liu@linaro.org> References: <1448995276-9599-1-git-send-email-jianbo.liu@linaro.org> Subject: [dpdk-dev] [PATCH 2/4] eal/acl: enable acl for armv7-a X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 01 Dec 2015 10:41:41 -0000 Implement vqtbl1q_u8 intrinsic function, which is not support in armv7-a. Signed-off-by: Jianbo Liu --- config/defconfig_arm-armv7a-linuxapp-gcc | 1 - lib/librte_acl/Makefile | 2 +- lib/librte_acl/rte_acl.c | 2 +- lib/librte_eal/common/include/arch/arm/rte_vect.h | 23 +++++++++++++++++++++++ 4 files changed, 25 insertions(+), 3 deletions(-) diff --git a/config/defconfig_arm-armv7a-linuxapp-gcc b/config/defconfig_arm-armv7a-linuxapp-gcc index 9924ff9..cbebd64 100644 --- a/config/defconfig_arm-armv7a-linuxapp-gcc +++ b/config/defconfig_arm-armv7a-linuxapp-gcc @@ -53,7 +53,6 @@ CONFIG_RTE_LIBRTE_KNI=n CONFIG_RTE_EAL_IGB_UIO=n # fails to compile on ARM -CONFIG_RTE_LIBRTE_ACL=n CONFIG_RTE_LIBRTE_LPM=n CONFIG_RTE_LIBRTE_TABLE=n CONFIG_RTE_LIBRTE_PIPELINE=n diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile index 897237d..2e394c9 100644 --- a/lib/librte_acl/Makefile +++ b/lib/librte_acl/Makefile @@ -49,7 +49,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_bld.c SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_gen.c SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c -ifeq ($(CONFIG_RTE_ARCH_ARM64),y) +ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),) SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_neon.c CFLAGS_acl_run_neon.o += -flax-vector-conversions -Wno-maybe-uninitialized else diff --git a/lib/librte_acl/rte_acl.c b/lib/librte_acl/rte_acl.c index e2fdebd..339aace 100644 --- a/lib/librte_acl/rte_acl.c +++ b/lib/librte_acl/rte_acl.c @@ -114,7 +114,7 @@ rte_acl_init(void) { enum rte_acl_classify_alg alg = RTE_ACL_CLASSIFY_DEFAULT; -#ifdef RTE_ARCH_ARM64 +#if defined(RTE_ARCH_ARM) || defined(RTE_ARCH_ARM64) alg = RTE_ACL_CLASSIFY_NEON; #else #ifdef CC_AVX2_SUPPORT diff --git a/lib/librte_eal/common/include/arch/arm/rte_vect.h b/lib/librte_eal/common/include/arch/arm/rte_vect.h index 21cdb4d..a33c054 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_vect.h +++ b/lib/librte_eal/common/include/arch/arm/rte_vect.h @@ -53,6 +53,29 @@ typedef union rte_xmm { double pd[XMM_SIZE / sizeof(double)]; } __attribute__((aligned(16))) rte_xmm_t; +#ifdef RTE_ARCH_ARM +/* NEON intrinsic vqtbl1q_u8() is not supported in ARMv7-A(AArch32) */ +static __inline uint8x16_t +vqtbl1q_u8(uint8x16_t a, uint8x16_t b) +{ + uint8_t i, pos; + rte_xmm_t rte_a, rte_b, rte_ret; + + vst1q_u8(rte_a.u8, a); + vst1q_u8(rte_b.u8, b); + + for (i = 0; i < 16; i++) { + pos = rte_b.u8[i]; + if (pos < 16) + rte_ret.u8[i] = rte_a.u8[pos]; + else + rte_ret.u8[i] = 0; + } + + return vld1q_u8(rte_ret.u8); +} +#endif + #ifdef __cplusplus } #endif -- 1.8.3.1