From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f52.google.com (mail-wm0-f52.google.com [74.125.82.52]) by dpdk.org (Postfix) with ESMTP id 0EB018D3C for ; Sun, 10 Jan 2016 13:51:09 +0100 (CET) Received: by mail-wm0-f52.google.com with SMTP id f206so231617632wmf.0 for ; Sun, 10 Jan 2016 04:51:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=46f52gnjYHVCukPZAUgHK8fSaCsjbUjjaKqH9+Hb+GY=; b=d9eqyIS8TNz/+LvU65Wfs9voGcpAOpp3nBvk6ZFiW7fAnRV7E1ILg7MxnNq02I1xk6 eC+4jEHceIiVuroRWb0uigRx+IyhcTQzLl2U/Hnza0+yHCALkKiYaQi95KADjegVQoZ4 M4/kbodFEgAedwUGhckdwuGOs5Le60HC+M4OgjPdX70pscB2g3HmOuHcP/KzOTfulp6Y uoXrIH3tQyhy7OEPOKsvL2Jk0ewcxhNkdCJ978xsmOE9gjHLgt/nopmkXd3tkP9Wwqry +vV+uoh+2BXl7oT4ggzb2ZVF2lc20TSlabuQDe42voOkTjbRCY1Que5nVsKWvCjr/MQC Ra6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=46f52gnjYHVCukPZAUgHK8fSaCsjbUjjaKqH9+Hb+GY=; b=XDOctNBltUFe2rluCzGDOSILUChZwo8Lb5c14s68awXVl4mxt/0mrrmwbzSbkmGR63 beTbHM9XWtMAPkCzkGmLbon2QKlfeJ7jFqMWc8ExoJf7hOcG5Z2UqQZTfQZCC7IkKRQs kWppoPj2F9lPRaRKl1MzPiDCOsuW66A+QOcTdzU+CPsTMKhycu63Fbi40sE388AKKxei /sH/KpRCg7dKAyqdLaJ+Hb6K3oxtMlPyBChx4tkmz9bfmh++zXjffuhCX9vZbGSJygw6 a8gHfRk3LYdywloG9VXgs14dVj6d5eBbbNJh9zV7KXXylfj2HBgdT33goDe8b6J25Fbt 6amA== X-Gm-Message-State: ALoCoQnqlRVTK0fbQ6JpPhMvfqKmMCTXGBAJ0cy9URjuwrlWtqrnJsBEeDyPM+Y1UUaha4JBCKnhiGUiMZ/nPf4oYjeXIcowIQ== X-Received: by 10.28.6.201 with SMTP id 192mr9011256wmg.0.1452430268892; Sun, 10 Jan 2016 04:51:08 -0800 (PST) Received: from gloops.dev.6wind.com (144.77.126.78.rev.sfr.net. [78.126.77.144]) by smtp.gmail.com with ESMTPSA id u12sm8088011wmu.10.2016.01.10.04.51.07 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 10 Jan 2016 04:51:08 -0800 (PST) From: David Marchand To: dev@dpdk.org Date: Sun, 10 Jan 2016 13:50:46 +0100 Message-Id: <1452430254-30390-4-git-send-email-david.marchand@6wind.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1452430254-30390-1-git-send-email-david.marchand@6wind.com> References: <1452430254-30390-1-git-send-email-david.marchand@6wind.com> Cc: thomas.monjalon@dpdk.org Subject: [dpdk-dev] [PATCH 03/11] i40e: move pci device ids to driver X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 10 Jan 2016 12:51:09 -0000 Since the base driver already defines all pci device ids, no need to redefine them, let's just drop the previous RTE_PCI_DEV_ID_DECL* stuff. Signed-off-by: David Marchand --- drivers/net/i40e/i40e_ethdev.c | 18 +++++++- drivers/net/i40e/i40e_ethdev_vf.c | 6 ++- lib/librte_eal/common/include/rte_pci_dev_ids.h | 60 ------------------------- 3 files changed, 20 insertions(+), 64 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index bf6220d..3213264 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -416,8 +416,22 @@ static int i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, static const struct rte_pci_id pci_id_i40e_map[] = { -#define RTE_PCI_DEV_ID_DECL_I40E(vend, dev) {RTE_PCI_DEVICE(vend, dev)}, -#include "rte_pci_dev_ids.h" +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_XL710) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QEMU) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_A) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_B) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_C) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_A) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_B) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_C) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_20G_KR2) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_20G_KR2_A) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T4) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_X722) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_1G_BASE_T_X722) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T_X722) }, { .vendor_id = 0, /* sentinel */ }, }; diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c index 14d2a50..fd963fd 100644 --- a/drivers/net/i40e/i40e_ethdev_vf.c +++ b/drivers/net/i40e/i40e_ethdev_vf.c @@ -1117,8 +1117,10 @@ i40evf_get_link_status(struct rte_eth_dev *dev, struct rte_eth_link *link) } static const struct rte_pci_id pci_id_i40evf_map[] = { -#define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)}, -#include "rte_pci_dev_ids.h" +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) }, +{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF_HV) }, { .vendor_id = 0, /* sentinel */ }, }; diff --git a/lib/librte_eal/common/include/rte_pci_dev_ids.h b/lib/librte_eal/common/include/rte_pci_dev_ids.h index ab6c4fb..f1f3e13 100644 --- a/lib/librte_eal/common/include/rte_pci_dev_ids.h +++ b/lib/librte_eal/common/include/rte_pci_dev_ids.h @@ -68,8 +68,6 @@ * driver which is a para virtualization driver running in guest virtual machine. * The inclusion of these in an array built using this file depends on the * definition of - * RTE_PCI_DEV_ID_DECL_I40E - * RTE_PCI_DEV_ID_DECL_I40EVF * RTE_PCI_DEV_ID_DECL_VIRTIO * at the time when this file is included. * @@ -91,14 +89,6 @@ * Note that this file can be included multiple times within the same file. */ -#ifndef RTE_PCI_DEV_ID_DECL_I40E -#define RTE_PCI_DEV_ID_DECL_I40E(vend, dev) -#endif - -#ifndef RTE_PCI_DEV_ID_DECL_I40EVF -#define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev) -#endif - #ifndef RTE_PCI_DEV_ID_DECL_VIRTIO #define RTE_PCI_DEV_ID_DECL_VIRTIO(vend, dev) #endif @@ -152,42 +142,6 @@ #define PCI_VENDOR_ID_BROADCOM 0x14E4 #endif -/*************** Physical I40E devices from i40e_type.h *****************/ - -#define I40E_DEV_ID_SFP_XL710 0x1572 -#define I40E_DEV_ID_QEMU 0x1574 -#define I40E_DEV_ID_KX_A 0x157F -#define I40E_DEV_ID_KX_B 0x1580 -#define I40E_DEV_ID_KX_C 0x1581 -#define I40E_DEV_ID_QSFP_A 0x1583 -#define I40E_DEV_ID_QSFP_B 0x1584 -#define I40E_DEV_ID_QSFP_C 0x1585 -#define I40E_DEV_ID_10G_BASE_T 0x1586 -#define I40E_DEV_ID_20G_KR2 0x1587 -#define I40E_DEV_ID_20G_KR2_A 0x1588 -#define I40E_DEV_ID_10G_BASE_T4 0x1589 -#define I40E_DEV_ID_X722_A0 0x374C -#define I40E_DEV_ID_SFP_X722 0x37D0 -#define I40E_DEV_ID_1G_BASE_T_X722 0x37D1 -#define I40E_DEV_ID_10G_BASE_T_X722 0x37D2 - -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_SFP_XL710) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QEMU) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_KX_A) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_KX_B) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_KX_C) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_A) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_B) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_C) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_10G_BASE_T) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_20G_KR2) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_20G_KR2_A) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_10G_BASE_T4) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_X722_A0) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_SFP_X722) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_1G_BASE_T_X722) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_10G_BASE_T_X722) - /*************** Physical FM10K devices from fm10k_type.h ***************/ #define FM10K_DEV_ID_PF 0x15A4 @@ -196,18 +150,6 @@ RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_10G_BASE_T_X722) RTE_PCI_DEV_ID_DECL_FM10K(PCI_VENDOR_ID_INTEL, FM10K_DEV_ID_PF) RTE_PCI_DEV_ID_DECL_FM10K(PCI_VENDOR_ID_INTEL, FM10K_DEV_ID_SDI_FM10420_QDA2) -/****************** Virtual I40E devices from i40e_type.h ********************/ - -#define I40E_DEV_ID_VF 0x154C -#define I40E_DEV_ID_VF_HV 0x1571 -#define I40E_DEV_ID_X722_VF 0x37CD -#define I40E_DEV_ID_X722_VF_HV 0x37D9 - -RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_VF) -RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_VF_HV) -RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_X722_VF) -RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_X722_VF_HV) - /****************** Virtio devices from virtio.h ******************/ #define QUMRANET_DEV_ID_VIRTIO 0x1000 @@ -284,8 +226,6 @@ RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57840_MF) */ #undef RTE_PCI_DEV_ID_DECL_BNX2X #undef RTE_PCI_DEV_ID_DECL_BNX2XVF -#undef RTE_PCI_DEV_ID_DECL_I40E -#undef RTE_PCI_DEV_ID_DECL_I40EVF #undef RTE_PCI_DEV_ID_DECL_VIRTIO #undef RTE_PCI_DEV_ID_DECL_VMXNET3 #undef RTE_PCI_DEV_ID_DECL_FM10K -- 1.9.1