From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-f175.google.com (mail-pf0-f175.google.com [209.85.192.175]) by dpdk.org (Postfix) with ESMTP id E5B8E8F9C for ; Thu, 14 Jan 2016 14:29:05 +0100 (CET) Received: by mail-pf0-f175.google.com with SMTP id 65so99913240pff.2 for ; Thu, 14 Jan 2016 05:29:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mvista-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=c+Mu9dwjmS03MMtW7cn08TVKTSz7u4zHIHQn4xQSmtA=; b=w6YGYGhOVXtjfV38tXAs3MCDsQzGzwM0WvkJPUjxZ7OrlZP6mRuEU1XILxJiFA6cIL bSsAhbNwsEpLXmSbpgMXxWYKCC8xuaeLpRRxlttgaiKDqkgdg9Rb/t9Yc1kb4CWHKumC AauzqU18jzr4rx6PI1IBXkYiCLrvRyX3Jc7/l7JxTjTh22fP/BC6tBdEnKhwmQeNuJbp 3mLJs9PLepavKasn3e9wDrU5d6w75jTwWly9/4x5wsmZrwZJq/4vCh5S5CX7pbO2lC19 CWkNBepT/9kJxOg0wjiLReNcwHDf8IBa/MkzRqHZC9CvoDDKt+6j1zB+BUBcFqUH1OPF Talw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=c+Mu9dwjmS03MMtW7cn08TVKTSz7u4zHIHQn4xQSmtA=; b=JzA5Mot9TtLc/GVAxFmH1Ca3ZO2sOeEsbltSopp6K3EPxHeLByWRMgqhIEElJPbORN c1scvUXodJKD/wk7rWLsUzPV+pBEK1hNSZXlT0qnEPfDnmTaHfPuK9tv4twoCDLAVsJC 5X+GYPtvo0CG5ZhqazNriqnKOf/WFRA9+dWp/UT3/G+2eyeUfotrjQeq3upAV7ijfZuv BRvxJsX6g29g7J3o1FC5bAh7RrZWiKU4uDyKgKXSTsLjkY+pZf+CIGdkzAkNlVdNZSXs p7/PwURuy72zRMdh6NRsJjABrL8hbCpYHJ7xc6UOR7qKuHh2Tvvk/MqofcsAJIMjbGKh Z+Kg== X-Gm-Message-State: ALoCoQnL9sG+Hb8c20zDluvuOd2yLOSixKB/6Bsl+wp3VN2sGo011ER9dJks8hzUtIL27uej9+HIA3/eu0mkuYvesrPf9AUD6A== X-Received: by 10.98.66.139 with SMTP id h11mr5789206pfd.121.1452778145310; Thu, 14 Jan 2016 05:29:05 -0800 (PST) Received: from santosh-Latitude-E5530-non-vPro.mvista.com ([111.93.218.67]) by smtp.gmail.com with ESMTPSA id v71sm9438472pfi.91.2016.01.14.05.29.02 (version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 14 Jan 2016 05:29:04 -0800 (PST) From: Santosh Shukla To: dev@dpdk.org Date: Thu, 14 Jan 2016 18:58:29 +0530 Message-Id: <1452778117-30178-7-git-send-email-sshukla@mvista.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1452778117-30178-1-git-send-email-sshukla@mvista.com> References: <1452778117-30178-1-git-send-email-sshukla@mvista.com> Subject: [dpdk-dev] [PATCH v4 06/14] eal: pci: vfio: add rd/wr func for pci bar space X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 14 Jan 2016 13:29:06 -0000 Introducing below api for pci bar space rd/wr. Currently used for pci iobar rd/wr. Api's are: - rte_eal_pci_read_bar - rte_eal_pci_write_bar virtio when used for vfio-mode then virtio driver will use these api to do rd/wr operation on ioport pci bar. Signed-off-by: Santosh Shukla --- v3->v4: - Using RTE_SET_USED(_var_) for unused variable for !VFIO_PRESENT case. As per v3 review comment from Bruce. lib/librte_eal/common/include/rte_pci.h | 38 ++++++++++++++++++++++++++++ lib/librte_eal/linuxapp/eal/eal_pci.c | 37 +++++++++++++++++++++++++++ lib/librte_eal/linuxapp/eal/eal_pci_init.h | 6 +++++ lib/librte_eal/linuxapp/eal/eal_pci_vfio.c | 28 ++++++++++++++++++++ 4 files changed, 109 insertions(+) diff --git a/lib/librte_eal/common/include/rte_pci.h b/lib/librte_eal/common/include/rte_pci.h index 334c12e..53437cc 100644 --- a/lib/librte_eal/common/include/rte_pci.h +++ b/lib/librte_eal/common/include/rte_pci.h @@ -471,6 +471,44 @@ int rte_eal_pci_read_config(const struct rte_pci_device *device, void *buf, size_t len, off_t offset); /** + * Read PCI bar space. + * + * @param device + * A pointer to a rte_pci_device structure describing the device + * to use + * @param buf + * A data buffer where the bytes should be read into + * @param len + * The length of the data buffer. + * @param offset + * The offset into PCI bar space + * @param bar_idx + * The pci bar index (valid range is 0..5) + */ +int rte_eal_pci_read_bar(const struct rte_pci_device *device, + void *buf, size_t len, off_t offset, int bar_idx); + +/** + * Write PCI bar space. + * + * @param device + * A pointer to a rte_pci_device structure describing the device + * to use + * @param buf + * A data buffer containing the bytes should be written + * @param len + * The length of the data buffer. + * @param offset + * The offset into PCI config space + * @param bar_idx + * The pci bar index (valid range is 0..5) +*/ +int rte_eal_pci_write_bar(const struct rte_pci_device *device, + const void *buf, size_t len, off_t offset, + int bar_idx); + + +/** * Write PCI config space. * * @param device diff --git a/lib/librte_eal/linuxapp/eal/eal_pci.c b/lib/librte_eal/linuxapp/eal/eal_pci.c index bc5b5be..8c1a49d 100644 --- a/lib/librte_eal/linuxapp/eal/eal_pci.c +++ b/lib/librte_eal/linuxapp/eal/eal_pci.c @@ -621,6 +621,43 @@ int rte_eal_pci_write_config(const struct rte_pci_device *device, } } +int rte_eal_pci_read_bar(const struct rte_pci_device *device, + void *buf, size_t len, off_t offset, + int bar_idx) + +{ +#ifdef VFIO_PRESENT + const struct rte_intr_handle *intr_handle = &device->intr_handle; + return pci_vfio_read_bar(intr_handle, buf, len, offset, bar_idx); +#else + /* UIO's not applicable */ + RTE_SET_USED(device); + RTE_SET_USED(buf); + RTE_SET_USED(len); + RTE_SET_USED(offset); + RTE_SET_USED(bar_idx); + return 0; +#endif +} + +int rte_eal_pci_write_bar(const struct rte_pci_device *device, + const void *buf, size_t len, off_t offset, + int bar_idx) +{ +#ifdef VFIO_PRESENT + const struct rte_intr_handle *intr_handle = &device->intr_handle; + return pci_vfio_write_bar(intr_handle, buf, len, offset, bar_idx); +#else + /* UIO's not applicable */ + RTE_SET_USED(device); + RTE_SET_USED(buf); + RTE_SET_USED(len); + RTE_SET_USED(offset); + RTE_SET_USED(bar_idx); + return 0; +#endif +} + /* Init the PCI EAL subsystem */ int rte_eal_pci_init(void) diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_init.h b/lib/librte_eal/linuxapp/eal/eal_pci_init.h index a17c708..3bc592b 100644 --- a/lib/librte_eal/linuxapp/eal/eal_pci_init.h +++ b/lib/librte_eal/linuxapp/eal/eal_pci_init.h @@ -68,6 +68,12 @@ int pci_vfio_read_config(const struct rte_intr_handle *intr_handle, int pci_vfio_write_config(const struct rte_intr_handle *intr_handle, const void *buf, size_t len, off_t offs); +int pci_vfio_read_bar(const struct rte_intr_handle *intr_handle, + void *buf, size_t len, off_t offs, int bar_idx); + +int pci_vfio_write_bar(const struct rte_intr_handle *intr_handle, + const void *buf, size_t len, off_t offs, int bar_idx); + /* map VFIO resource prototype */ int pci_vfio_map_resource(struct rte_pci_device *dev); int pci_vfio_get_group_fd(int iommu_group_fd); diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c b/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c index abde779..df407ef 100644 --- a/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c +++ b/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c @@ -93,6 +93,34 @@ pci_vfio_write_config(const struct rte_intr_handle *intr_handle, VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs); } +int +pci_vfio_read_bar(const struct rte_intr_handle *intr_handle, + void *buf, size_t len, off_t offs, int bar_idx) +{ + if (bar_idx < VFIO_PCI_BAR0_REGION_INDEX + || bar_idx > VFIO_PCI_BAR5_REGION_INDEX) { + RTE_LOG(ERR, EAL, "invalid bar_idx!\n"); + return -1; + } + + return pread64(intr_handle->vfio_dev_fd, buf, len, + VFIO_GET_REGION_ADDR(bar_idx) + offs); +} + +int +pci_vfio_write_bar(const struct rte_intr_handle *intr_handle, + const void *buf, size_t len, off_t offs, int bar_idx) +{ + if (bar_idx < VFIO_PCI_BAR0_REGION_INDEX + || bar_idx > VFIO_PCI_BAR5_REGION_INDEX) { + RTE_LOG(ERR, EAL, "invalid bar_idx!\n"); + return -1; + } + + return pwrite64(intr_handle->vfio_dev_fd, buf, len, + VFIO_GET_REGION_ADDR(bar_idx) + offs); +} + /* get PCI BAR number where MSI-X interrupts are */ static int pci_vfio_get_msix_bar(int fd, int *msix_bar, uint32_t *msix_table_offset, -- 1.7.9.5