From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pa0-f43.google.com (mail-pa0-f43.google.com [209.85.220.43]) by dpdk.org (Postfix) with ESMTP id 4D57B8E9A for ; Tue, 19 Jan 2016 12:46:49 +0100 (CET) Received: by mail-pa0-f43.google.com with SMTP id uo6so436575915pac.1 for ; Tue, 19 Jan 2016 03:46:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mvista-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=A9TEP8KQ0d0I1AuMPhReaBIqEsPmEDuNiF0WNCfJ6Xs=; b=SHtkIvsRdMbra+tNQH2mvnz398V4kWdUU2DrxauFpX8T/+mD8iLoVHP/oukEI2DWwd lxaLms4lYk/CphskGK0zUOVBSBfOszIeqgiiSLQq20DrAxdieeZVMb6BHKrDGYbQFtI7 qvmr1FDdmtgkFZ/QxR65MuWxunBvm0cymrOwSr7xpX8ctK+QrjtKSN7ha906BSrTEkZs FxPN/XJ1/czYZulXM7lniDgRLSZKJr6zR1XMrz7pYQZKShcQAWIXux4PfImc2YPcCIhn prwaPXfenDc/GuiHnkAhu13t+k6R44qU2wyl+8v+K6KaiCT7FpPLmMxxMK9bRNiOum0e GZgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=A9TEP8KQ0d0I1AuMPhReaBIqEsPmEDuNiF0WNCfJ6Xs=; b=e9jRAZ6qjh9c4iviSLO5zoLlZfvCSW+vk5azx8Cepns8GuCmlNYpo782fGG3jw6YRw iav4KshzdnEbsUiTHzE8SaIfWwA08RtHkrw3ITnCcHfOiwgNoecSUrAbu9r6tqs6RGyz xuqwk1kpxpXQbcX/IzrgFhZmmYyU9FU7CMi/s8bzq3kuji2Bu5AhXc+6jMrrzATtwtbi i32A+WwjbemBqremsgUZXispd0ghlDLmDtjJ217c15ZuUzIP54mzXYNaQhOjdp/sljQh 1TXR5Tmupx6k9Fkeb37sktYQzG6VH3EkG18iOmvhmjAMxDKPlgdyj8Y5aLqh/QZEwrEp uwzQ== X-Gm-Message-State: ALoCoQlTqXm03PIM6wW5CFjx3v+LI43pjmFOd0dd78LULtLjl0+mB9sMb+carWKF41EUvk8BB1ul1HLoVF0rMfhgj7l0WZSb2g== X-Received: by 10.66.232.74 with SMTP id tm10mr44016443pac.128.1453204008729; Tue, 19 Jan 2016 03:46:48 -0800 (PST) Received: from santosh-Latitude-E5530-non-vPro.mvista.com ([111.93.218.67]) by smtp.gmail.com with ESMTPSA id 75sm41014170pfj.20.2016.01.19.03.46.45 (version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Jan 2016 03:46:47 -0800 (PST) From: Santosh Shukla To: dev@dpdk.org Date: Tue, 19 Jan 2016 17:16:06 +0530 Message-Id: <1453203972-24855-6-git-send-email-sshukla@mvista.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1453203972-24855-1-git-send-email-sshukla@mvista.com> References: <1453203972-24855-1-git-send-email-sshukla@mvista.com> Subject: [dpdk-dev] [PATCH v5 05/11] eal: pci: vfio: add rd/wr func for pci bar space X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 19 Jan 2016 11:46:49 -0000 Introducing below api for pci bar space rd/wr. Currently used for pci iobar rd/wr. Api's are: - rte_eal_pci_read_bar - rte_eal_pci_write_bar virtio when used for vfio-mode then virtio driver will use these api to do rd/wr operation on ioport pci bar. Signed-off-by: Santosh Shukla --- v4--> v5: - added switch case in rd/wr pci_bar routine, as per Yuan comment lib/librte_eal/common/include/rte_pci.h | 38 ++++++++++++++++++++++++++++ lib/librte_eal/linuxapp/eal/eal_pci.c | 34 +++++++++++++++++++++++++ lib/librte_eal/linuxapp/eal/eal_pci_init.h | 6 +++++ lib/librte_eal/linuxapp/eal/eal_pci_vfio.c | 28 ++++++++++++++++++++ 4 files changed, 106 insertions(+) diff --git a/lib/librte_eal/common/include/rte_pci.h b/lib/librte_eal/common/include/rte_pci.h index 2224109..0c667ff 100644 --- a/lib/librte_eal/common/include/rte_pci.h +++ b/lib/librte_eal/common/include/rte_pci.h @@ -471,6 +471,44 @@ int rte_eal_pci_read_config(const struct rte_pci_device *device, void *buf, size_t len, off_t offset); /** + * Read PCI bar space. + * + * @param device + * A pointer to a rte_pci_device structure describing the device + * to use + * @param buf + * A data buffer where the bytes should be read into + * @param len + * The length of the data buffer. + * @param offset + * The offset into PCI bar space + * @param bar_idx + * The pci bar index (valid range is 0..5) + */ +int rte_eal_pci_read_bar(const struct rte_pci_device *device, + void *buf, size_t len, off_t offset, int bar_idx); + +/** + * Write PCI bar space. + * + * @param device + * A pointer to a rte_pci_device structure describing the device + * to use + * @param buf + * A data buffer containing the bytes should be written + * @param len + * The length of the data buffer. + * @param offset + * The offset into PCI config space + * @param bar_idx + * The pci bar index (valid range is 0..5) +*/ +int rte_eal_pci_write_bar(const struct rte_pci_device *device, + const void *buf, size_t len, off_t offset, + int bar_idx); + + +/** * Write PCI config space. * * @param device diff --git a/lib/librte_eal/linuxapp/eal/eal_pci.c b/lib/librte_eal/linuxapp/eal/eal_pci.c index db947da..eb503f0 100644 --- a/lib/librte_eal/linuxapp/eal/eal_pci.c +++ b/lib/librte_eal/linuxapp/eal/eal_pci.c @@ -621,6 +621,40 @@ int rte_eal_pci_write_config(const struct rte_pci_device *device, } } +int rte_eal_pci_read_bar(const struct rte_pci_device *device, + void *buf, size_t len, off_t offset, + int bar_idx) + +{ + const struct rte_intr_handle *intr_handle = &device->intr_handle; + + switch (device->kdrv) { + case RTE_KDRV_VFIO: + return pci_vfio_read_bar(intr_handle, buf, len, + offset, bar_idx); + default: + RTE_LOG(ERR, EAL, "write bar not supported by driver\n"); + return -1; + } +} + +int rte_eal_pci_write_bar(const struct rte_pci_device *device, + const void *buf, size_t len, off_t offset, + int bar_idx) +{ + + const struct rte_intr_handle *intr_handle = &device->intr_handle; + + switch (device->kdrv) { + case RTE_KDRV_VFIO: + return pci_vfio_write_bar(intr_handle, buf, len, + offset, bar_idx); + default: + RTE_LOG(ERR, EAL, "write bar not supported by driver\n"); + return -1; + } +} + /* Init the PCI EAL subsystem */ int rte_eal_pci_init(void) diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_init.h b/lib/librte_eal/linuxapp/eal/eal_pci_init.h index a17c708..3bc592b 100644 --- a/lib/librte_eal/linuxapp/eal/eal_pci_init.h +++ b/lib/librte_eal/linuxapp/eal/eal_pci_init.h @@ -68,6 +68,12 @@ int pci_vfio_read_config(const struct rte_intr_handle *intr_handle, int pci_vfio_write_config(const struct rte_intr_handle *intr_handle, const void *buf, size_t len, off_t offs); +int pci_vfio_read_bar(const struct rte_intr_handle *intr_handle, + void *buf, size_t len, off_t offs, int bar_idx); + +int pci_vfio_write_bar(const struct rte_intr_handle *intr_handle, + const void *buf, size_t len, off_t offs, int bar_idx); + /* map VFIO resource prototype */ int pci_vfio_map_resource(struct rte_pci_device *dev); int pci_vfio_get_group_fd(int iommu_group_fd); diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c b/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c index abde779..df407ef 100644 --- a/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c +++ b/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c @@ -93,6 +93,34 @@ pci_vfio_write_config(const struct rte_intr_handle *intr_handle, VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs); } +int +pci_vfio_read_bar(const struct rte_intr_handle *intr_handle, + void *buf, size_t len, off_t offs, int bar_idx) +{ + if (bar_idx < VFIO_PCI_BAR0_REGION_INDEX + || bar_idx > VFIO_PCI_BAR5_REGION_INDEX) { + RTE_LOG(ERR, EAL, "invalid bar_idx!\n"); + return -1; + } + + return pread64(intr_handle->vfio_dev_fd, buf, len, + VFIO_GET_REGION_ADDR(bar_idx) + offs); +} + +int +pci_vfio_write_bar(const struct rte_intr_handle *intr_handle, + const void *buf, size_t len, off_t offs, int bar_idx) +{ + if (bar_idx < VFIO_PCI_BAR0_REGION_INDEX + || bar_idx > VFIO_PCI_BAR5_REGION_INDEX) { + RTE_LOG(ERR, EAL, "invalid bar_idx!\n"); + return -1; + } + + return pwrite64(intr_handle->vfio_dev_fd, buf, len, + VFIO_GET_REGION_ADDR(bar_idx) + offs); +} + /* get PCI BAR number where MSI-X interrupts are */ static int pci_vfio_get_msix_bar(int fd, int *msix_bar, uint32_t *msix_table_offset, -- 1.7.9.5