From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pa0-f48.google.com (mail-pa0-f48.google.com [209.85.220.48]) by dpdk.org (Postfix) with ESMTP id 235B38E98 for ; Thu, 21 Jan 2016 11:26:29 +0100 (CET) Received: by mail-pa0-f48.google.com with SMTP id ho8so21133900pac.2 for ; Thu, 21 Jan 2016 02:26:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mvista-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SWRlU1MeFD4Rod5P38QQzeG2dUXg9SknrWnMZUS7plU=; b=Y7K5xJkCmpr6COsPaxQR43HksM1xy4lHdmhSsvVqB220aIJ/CsDgboiy9FfGXxuwIA DnfSu0SYrq0mXjoccRhvomUBCFre5Dmm3NGmOckfV1vcQNUD6WUHUmevIALGkcMpUCDf rEkufDlRymlo1/lXF0pN8B6T6r0YTS4gvZJIVu4z1cBlOWz42nUElte1201/R3gDtod9 edsLywPmn65Ojf6SRDtVlHCt0PodV5KXu6dOBsDXctqq4Oe8rLR5cBJaM4idlvUZchBP V5dVHS9B0dFcGDOxP8Dod94czb2t+KWgboyLOfFi/oZzZdTLlAm35eQgpVoRfH6aPZmm 3cDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SWRlU1MeFD4Rod5P38QQzeG2dUXg9SknrWnMZUS7plU=; b=bXPgKmOiMe5OY8QoquQG1KuYp17ZB+Xh4A6QmBJxC9pYyqC9Aue39XDCd24WkQqVCe j726pBvgQeTJ0TT52jTGz7Q2+EbFtKzRfaUHX9HPPb2rV6dUGvCH03Wna5E8FJv6Ckv3 q6IZBoCoTiU+MA0tbNMb8rwNJ2q1jmuit631ojtN866D2uD6iD3/7PKokOlnGMXLDhiK G/ORjDGLQP0NggbVTTGSY3LDWzssbODw1KrzxWYQMh0x1BhNpd8DJ7Qi4FOxAMYHhOMn deQgoS7rloKSeQj2F/rl4WucGuMnpVDgHuwFVc4cYThgDziQIw82yNUvOY49IsroSlrj wKvw== X-Gm-Message-State: AG10YOTrscsZI7iVHe8owAUrXkfsKdgvCqdkBmklHcF3nDjwtmFfciVKSoOoyGedbs+rOZzl X-Received: by 10.66.62.195 with SMTP id a3mr41932837pas.8.1453371988381; Thu, 21 Jan 2016 02:26:28 -0800 (PST) Received: from santosh-Latitude-E5530-non-vPro.mvista.com ([111.93.218.67]) by smtp.gmail.com with ESMTPSA id uk10sm1495384pab.31.2016.01.21.02.26.25 (version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Jan 2016 02:26:27 -0800 (PST) From: Santosh Shukla To: dev@dpdk.org Date: Thu, 21 Jan 2016 15:56:04 +0530 Message-Id: <1453371964-3354-2-git-send-email-sshukla@mvista.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1453371964-3354-1-git-send-email-sshukla@mvista.com> References: <1453371964-3354-1-git-send-email-sshukla@mvista.com> Subject: [dpdk-dev] [PATCH v6 05/11] eal: pci: vfio: add rd/wr func for pci bar space X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Jan 2016 10:26:29 -0000 Introducing below api for pci bar space rd/wr. Currently used for pci iobar rd/wr. Api's are: - rte_eal_pci_read_bar - rte_eal_pci_write_bar virtio when used for vfio-mode then virtio driver will use these api to do rd/wr operation on ioport pci bar. Signed-off-by: Santosh Shukla --- v5-->v6: - included dummy implementation for rte_eal_pci_read/write_bar() api in bsdapp. - Added api entry in rte_eal_version.map lib/librte_eal/bsdapp/eal/eal_pci.c | 19 ++++++++++++ lib/librte_eal/bsdapp/eal/rte_eal_version.map | 3 ++ lib/librte_eal/common/include/rte_pci.h | 38 +++++++++++++++++++++++ lib/librte_eal/linuxapp/eal/eal_pci.c | 34 ++++++++++++++++++++ lib/librte_eal/linuxapp/eal/eal_pci_init.h | 6 ++++ lib/librte_eal/linuxapp/eal/eal_pci_vfio.c | 28 +++++++++++++++++ lib/librte_eal/linuxapp/eal/rte_eal_version.map | 3 ++ 7 files changed, 131 insertions(+) diff --git a/lib/librte_eal/bsdapp/eal/eal_pci.c b/lib/librte_eal/bsdapp/eal/eal_pci.c index 95c32c1..2e535ea 100644 --- a/lib/librte_eal/bsdapp/eal/eal_pci.c +++ b/lib/librte_eal/bsdapp/eal/eal_pci.c @@ -479,6 +479,25 @@ int rte_eal_pci_write_config(const struct rte_pci_device *dev, return -1; } +int rte_eal_pci_read_bar(const struct rte_pci_device *device __rte_unused, + void *buf __rte_unused, size_t len __rte_unused, + off_t offset __rte_unused, + int bar_idx __rte_unused) + +{ + /* NA */ + return 1; +} + +int rte_eal_pci_write_bar(const struct rte_pci_device *device __rte_unused, + const void *buf __rte_unused, size_t len __rte_unused, + off_t offset __rte_unused, + int bar_idx __rte_unused) +{ + /* NA */ + return 1; +} + /* Init the PCI EAL subsystem */ int rte_eal_pci_init(void) diff --git a/lib/librte_eal/bsdapp/eal/rte_eal_version.map b/lib/librte_eal/bsdapp/eal/rte_eal_version.map index 1b28170..7c7dcf0 100644 --- a/lib/librte_eal/bsdapp/eal/rte_eal_version.map +++ b/lib/librte_eal/bsdapp/eal/rte_eal_version.map @@ -141,4 +141,7 @@ DPDK_2.3 { rte_eal_pci_map_device; rte_eal_pci_unmap_device; + rte_eal_pci_read_bar; + rte_eal_pci_write_bar; + } DPDK_2.2; diff --git a/lib/librte_eal/common/include/rte_pci.h b/lib/librte_eal/common/include/rte_pci.h index 2224109..0c667ff 100644 --- a/lib/librte_eal/common/include/rte_pci.h +++ b/lib/librte_eal/common/include/rte_pci.h @@ -471,6 +471,44 @@ int rte_eal_pci_read_config(const struct rte_pci_device *device, void *buf, size_t len, off_t offset); /** + * Read PCI bar space. + * + * @param device + * A pointer to a rte_pci_device structure describing the device + * to use + * @param buf + * A data buffer where the bytes should be read into + * @param len + * The length of the data buffer. + * @param offset + * The offset into PCI bar space + * @param bar_idx + * The pci bar index (valid range is 0..5) + */ +int rte_eal_pci_read_bar(const struct rte_pci_device *device, + void *buf, size_t len, off_t offset, int bar_idx); + +/** + * Write PCI bar space. + * + * @param device + * A pointer to a rte_pci_device structure describing the device + * to use + * @param buf + * A data buffer containing the bytes should be written + * @param len + * The length of the data buffer. + * @param offset + * The offset into PCI config space + * @param bar_idx + * The pci bar index (valid range is 0..5) +*/ +int rte_eal_pci_write_bar(const struct rte_pci_device *device, + const void *buf, size_t len, off_t offset, + int bar_idx); + + +/** * Write PCI config space. * * @param device diff --git a/lib/librte_eal/linuxapp/eal/eal_pci.c b/lib/librte_eal/linuxapp/eal/eal_pci.c index db947da..eb503f0 100644 --- a/lib/librte_eal/linuxapp/eal/eal_pci.c +++ b/lib/librte_eal/linuxapp/eal/eal_pci.c @@ -621,6 +621,40 @@ int rte_eal_pci_write_config(const struct rte_pci_device *device, } } +int rte_eal_pci_read_bar(const struct rte_pci_device *device, + void *buf, size_t len, off_t offset, + int bar_idx) + +{ + const struct rte_intr_handle *intr_handle = &device->intr_handle; + + switch (device->kdrv) { + case RTE_KDRV_VFIO: + return pci_vfio_read_bar(intr_handle, buf, len, + offset, bar_idx); + default: + RTE_LOG(ERR, EAL, "write bar not supported by driver\n"); + return -1; + } +} + +int rte_eal_pci_write_bar(const struct rte_pci_device *device, + const void *buf, size_t len, off_t offset, + int bar_idx) +{ + + const struct rte_intr_handle *intr_handle = &device->intr_handle; + + switch (device->kdrv) { + case RTE_KDRV_VFIO: + return pci_vfio_write_bar(intr_handle, buf, len, + offset, bar_idx); + default: + RTE_LOG(ERR, EAL, "write bar not supported by driver\n"); + return -1; + } +} + /* Init the PCI EAL subsystem */ int rte_eal_pci_init(void) diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_init.h b/lib/librte_eal/linuxapp/eal/eal_pci_init.h index a17c708..3bc592b 100644 --- a/lib/librte_eal/linuxapp/eal/eal_pci_init.h +++ b/lib/librte_eal/linuxapp/eal/eal_pci_init.h @@ -68,6 +68,12 @@ int pci_vfio_read_config(const struct rte_intr_handle *intr_handle, int pci_vfio_write_config(const struct rte_intr_handle *intr_handle, const void *buf, size_t len, off_t offs); +int pci_vfio_read_bar(const struct rte_intr_handle *intr_handle, + void *buf, size_t len, off_t offs, int bar_idx); + +int pci_vfio_write_bar(const struct rte_intr_handle *intr_handle, + const void *buf, size_t len, off_t offs, int bar_idx); + /* map VFIO resource prototype */ int pci_vfio_map_resource(struct rte_pci_device *dev); int pci_vfio_get_group_fd(int iommu_group_fd); diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c b/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c index abde779..df407ef 100644 --- a/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c +++ b/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c @@ -93,6 +93,34 @@ pci_vfio_write_config(const struct rte_intr_handle *intr_handle, VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs); } +int +pci_vfio_read_bar(const struct rte_intr_handle *intr_handle, + void *buf, size_t len, off_t offs, int bar_idx) +{ + if (bar_idx < VFIO_PCI_BAR0_REGION_INDEX + || bar_idx > VFIO_PCI_BAR5_REGION_INDEX) { + RTE_LOG(ERR, EAL, "invalid bar_idx!\n"); + return -1; + } + + return pread64(intr_handle->vfio_dev_fd, buf, len, + VFIO_GET_REGION_ADDR(bar_idx) + offs); +} + +int +pci_vfio_write_bar(const struct rte_intr_handle *intr_handle, + const void *buf, size_t len, off_t offs, int bar_idx) +{ + if (bar_idx < VFIO_PCI_BAR0_REGION_INDEX + || bar_idx > VFIO_PCI_BAR5_REGION_INDEX) { + RTE_LOG(ERR, EAL, "invalid bar_idx!\n"); + return -1; + } + + return pwrite64(intr_handle->vfio_dev_fd, buf, len, + VFIO_GET_REGION_ADDR(bar_idx) + offs); +} + /* get PCI BAR number where MSI-X interrupts are */ static int pci_vfio_get_msix_bar(int fd, int *msix_bar, uint32_t *msix_table_offset, diff --git a/lib/librte_eal/linuxapp/eal/rte_eal_version.map b/lib/librte_eal/linuxapp/eal/rte_eal_version.map index b9937c4..371b6c1 100644 --- a/lib/librte_eal/linuxapp/eal/rte_eal_version.map +++ b/lib/librte_eal/linuxapp/eal/rte_eal_version.map @@ -144,4 +144,7 @@ DPDK_2.3 { rte_eal_pci_map_device; rte_eal_pci_unmap_device; + rte_eal_pci_read_bar; + rte_eal_pci_write_bar; + } DPDK_2.2; -- 1.7.9.5