From: Deepak Kumar JAIN <deepak.k.jain@intel.com>
To: dev@dpdk.org
Subject: [dpdk-dev] [PATCH 2/3] qat: add Snow3G UEA2 support
Date: Thu, 28 Jan 2016 17:46:15 +0000 [thread overview]
Message-ID: <1454003176-59256-3-git-send-email-deepak.k.jain@intel.com> (raw)
In-Reply-To: <1454003176-59256-1-git-send-email-deepak.k.jain@intel.com>
Added support for wireless Snow3G cipher only,
for the Intel Quick Assist device.
Signed-off-by: Deepak Kumar JAIN <deepak.k.jain@intel.com>
---
doc/guides/cryptodevs/qat.rst | 5 +++--
doc/guides/rel_notes/release_2_3.rst | 1 +
drivers/crypto/qat/qat_adf/qat_algs.h | 1 +
drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 12 ++++++++++++
drivers/crypto/qat/qat_crypto.c | 8 ++++++++
5 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index 1901842..eda5de2 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -1,5 +1,5 @@
.. BSD LICENSE
- Copyright(c) 2015 Intel Corporation. All rights reserved.
+ Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
@@ -47,6 +47,7 @@ Cipher algorithms:
* ``RTE_CRYPTO_SYM_CIPHER_AES128_CBC``
* ``RTE_CRYPTO_SYM_CIPHER_AES192_CBC``
* ``RTE_CRYPTO_SYM_CIPHER_AES256_CBC``
+* ``RTE_CRYPTO_SYM_CIPHER_SNOW3G_UEA2``
Hash algorithms:
@@ -61,7 +62,7 @@ Limitations
* Chained mbufs are not supported.
* Hash only is not supported.
-* Cipher only is not supported.
+* Cipher only is not supported except Snow3G UEA2.
* Only in-place is currently supported (destination address is the same as source address).
* Only supports the session-oriented API implementation (session-less APIs are not supported).
* Not performance tuned.
diff --git a/doc/guides/rel_notes/release_2_3.rst b/doc/guides/rel_notes/release_2_3.rst
index 99de186..0e1f1ff 100644
--- a/doc/guides/rel_notes/release_2_3.rst
+++ b/doc/guides/rel_notes/release_2_3.rst
@@ -3,6 +3,7 @@ DPDK Release 2.3
New Features
------------
+* **Added the support of Snow3g UEA2 Cipher operation for Intel Quick Assist Devices.*
Resolved Issues
diff --git a/drivers/crypto/qat/qat_adf/qat_algs.h b/drivers/crypto/qat/qat_adf/qat_algs.h
index d4aa087..54eeb23 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs.h
+++ b/drivers/crypto/qat/qat_adf/qat_algs.h
@@ -127,5 +127,6 @@ void qat_alg_ablkcipher_init_dec(struct qat_alg_ablkcipher_cd *cd,
unsigned int keylen);
int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
+int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
#endif
diff --git a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
index 88fd803..200371d 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
+++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
@@ -755,3 +755,15 @@ int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
}
return 0;
}
+
+int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
+{
+ switch (key_len) {
+ case ICP_QAT_HW_SNOW_3G_UEA2_KEY_SZ:
+ *alg = ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2;
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c
index e524638..9ae6715 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_crypto.c
@@ -168,6 +168,14 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
}
session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
break;
+ case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
+ if (qat_alg_validate_snow3g_key(cipher_xform->key.length,
+ &session->qat_cipher_alg) != 0) {
+ PMD_DRV_LOG(ERR, "Invalid SNOW3G cipher key size");
+ goto error_out;
+ }
+ session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
+ break;
case RTE_CRYPTO_CIPHER_NULL:
case RTE_CRYPTO_CIPHER_3DES_ECB:
case RTE_CRYPTO_CIPHER_3DES_CBC:
--
2.1.0
next prev parent reply other threads:[~2016-01-28 16:48 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-28 17:46 [dpdk-dev] [PATCH 0/3] Snow3G UEA2 support for Intel Quick Assist Devices Deepak Kumar JAIN
2016-01-28 17:46 ` [dpdk-dev] [PATCH 1/3] crypto: add cipher/auth only support Deepak Kumar JAIN
2016-01-28 17:46 ` Deepak Kumar JAIN [this message]
2016-01-28 17:46 ` [dpdk-dev] [PATCH 3/3] app/test: add Snow3G UEA2 tests Deepak Kumar JAIN
2016-02-23 14:02 ` [dpdk-dev] [PATCH v2 0/3] Snow3G support for Intel Quick Assist Devices Deepak Kumar JAIN
2016-02-23 14:02 ` [dpdk-dev] [PATCH v2 1/3] crypto: add cipher/auth only support Deepak Kumar JAIN
2016-02-23 14:02 ` [dpdk-dev] [PATCH v2 2/3] qat: add support for Snow3G Deepak Kumar JAIN
2016-02-23 14:02 ` [dpdk-dev] [PATCH v2 3/3] app/test: add Snow3G tests Deepak Kumar JAIN
2016-03-16 5:15 ` [dpdk-dev] [PATCH v2 0/3] Snow3G support for Intel Quick Assist Devices Cao, Min
2016-03-03 13:01 ` [dpdk-dev] [PATCH v3 " Deepak Kumar JAIN
2016-03-03 13:01 ` [dpdk-dev] [PATCH v3 1/3] crypto: add cipher/auth only support Deepak Kumar JAIN
2016-03-03 13:01 ` [dpdk-dev] [PATCH v3 2/3] qat: add support for Snow3G Deepak Kumar JAIN
2016-03-03 13:01 ` [dpdk-dev] [PATCH v3 3/3] app/test: add Snow3G tests Deepak Kumar JAIN
2016-03-07 13:55 ` [dpdk-dev] [PATCH v3 0/3] Snow3G support for Intel Quick Assist Devices De Lara Guarch, Pablo
2016-03-10 17:12 ` [dpdk-dev] [PATCH v4 " Deepak Kumar JAIN
2016-03-10 16:25 ` De Lara Guarch, Pablo
2016-03-10 20:37 ` Thomas Monjalon
2016-03-10 17:12 ` [dpdk-dev] [PATCH v4 1/3] crypto: add cipher/auth only support Deepak Kumar JAIN
2016-03-10 17:12 ` [dpdk-dev] [PATCH v4 2/3] qat: add support for Snow3G Deepak Kumar JAIN
2016-03-10 17:12 ` [dpdk-dev] [PATCH v4 3/3] app/test: add Snow3G tests Deepak Kumar JAIN
2016-03-16 3:27 ` [dpdk-dev] [PATCH v4 0/3] Snow3G support for Intel Quick Assist Devices Cao, Min
2016-03-16 5:05 ` [dpdk-dev] [PATCH v3 " Cao, Min
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1454003176-59256-3-git-send-email-deepak.k.jain@intel.com \
--to=deepak.k.jain@intel.com \
--cc=dev@dpdk.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).