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From: Marc Sune <marcdevel@gmail.com>
To: dev@dpdk.org, Wenzhuo Lu <wenzhuo.lu@intel.com>,
Helin Zhang <helin.zhang@intel.com>,
Harish Patil <harish.patil@qlogic.com>, Jing Chen <jing.d.chen@intel.com>
Date: Fri, 29 Jan 2016 01:42:03 +0100
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Subject: [dpdk-dev] [PATCH v7 1/5] ethdev: Added ETH_SPEED_CAP bitmap for
ports
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Added constants and bitmap to struct rte_eth_dev_info to be used by PMDs.
Signed-off-by: Marc Sune <marcdevel@gmail.com>
---
lib/librte_ether/rte_ethdev.h | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index 8710dd7..dbc1599 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -824,6 +824,29 @@ struct rte_eth_conf {
#define DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000080 /**< Used for tunneling packet. */
#define DEV_TX_OFFLOAD_QINQ_INSERT 0x00000100
+/**
+ * Device supported speeds
+ */
+#define ETH_SPEED_CAP_NOT_PHY (0) /*< No phy media > */
+#define ETH_SPEED_CAP_10M_HD (1 << 0) /*< 10 Mbps half-duplex> */
+#define ETH_SPEED_CAP_10M_FD (1 << 1) /*< 10 Mbps full-duplex> */
+#define ETH_SPEED_CAP_100M_HD (1 << 2) /*< 100 Mbps half-duplex> */
+#define ETH_SPEED_CAP_100M_FD (1 << 3) /*< 100 Mbps full-duplex> */
+#define ETH_SPEED_CAP_1G (1 << 4) /*< 1 Gbps > */
+#define ETH_SPEED_CAP_2_5G (1 << 5) /*< 2.5 Gbps > */
+#define ETH_SPEED_CAP_5G (1 << 6) /*< 5 Gbps > */
+#define ETH_SPEED_CAP_10G (1 << 7) /*< 10 Mbps > */
+#define ETH_SPEED_CAP_20G (1 << 8) /*< 20 Gbps > */
+#define ETH_SPEED_CAP_25G (1 << 9) /*< 25 Gbps > */
+#define ETH_SPEED_CAP_40G (1 << 10) /*< 40 Gbps > */
+#define ETH_SPEED_CAP_50G (1 << 11) /*< 50 Gbps > */
+#define ETH_SPEED_CAP_56G (1 << 12) /*< 56 Gbps > */
+#define ETH_SPEED_CAP_100G (1 << 13) /*< 100 Gbps > */
+
+
+/**
+ * Ethernet device information
+ */
struct rte_eth_dev_info {
struct rte_pci_device *pci_dev; /**< Device PCI information. */
const char *driver_name; /**< Device Driver name. */
@@ -852,6 +875,7 @@ struct rte_eth_dev_info {
uint16_t vmdq_pool_base; /**< First ID of VMDQ pools. */
struct rte_eth_desc_lim rx_desc_lim; /**< RX descriptors limits */
struct rte_eth_desc_lim tx_desc_lim; /**< TX descriptors limits */
+ uint32_t speed_capa; /**< Supported speeds bitmap (ETH_SPEED_CAP_). */
};
/**
--
2.1.4