From: Harish Patil <harish.patil@qlogic.com>
To: <dev@dpdk.org>
Cc: Sony Chacko <sony.chacko@qlogic.com>
Subject: [dpdk-dev] [PATCH 3/6] qede: add QLogic PCI ids
Date: Sat, 20 Feb 2016 07:40:28 -0800 [thread overview]
Message-ID: <1455982831-21682-4-git-send-email-harish.patil@qlogic.com> (raw)
In-Reply-To: <1455982831-21682-1-git-send-email-harish.patil@qlogic.com>
Signed-off-by: Harish Patil <harish.patil@qlogic.com>
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
Signed-off-by: Sony Chacko <sony.chacko@qlogic.com>
---
lib/librte_eal/common/include/rte_pci_dev_ids.h | 44 +++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/lib/librte_eal/common/include/rte_pci_dev_ids.h b/lib/librte_eal/common/include/rte_pci_dev_ids.h
index d088191..0c1a3fe 100644
--- a/lib/librte_eal/common/include/rte_pci_dev_ids.h
+++ b/lib/librte_eal/common/include/rte_pci_dev_ids.h
@@ -152,6 +152,14 @@
#define RTE_PCI_DEV_ID_DECL_BNX2XVF(vend, dev)
#endif
+#ifndef RTE_PCI_DEV_ID_DECL_QEDE
+#define RTE_PCI_DEV_ID_DECL_QEDE(vend, dev)
+#endif
+
+#ifndef RTE_PCI_DEV_ID_DECL_QEDEVF
+#define RTE_PCI_DEV_ID_DECL_QEDEVF(vend, dev)
+#endif
+
#ifndef PCI_VENDOR_ID_INTEL
/** Vendor ID used by Intel devices */
#define PCI_VENDOR_ID_INTEL 0x8086
@@ -177,6 +185,11 @@
#define PCI_VENDOR_ID_BROADCOM 0x14E4
#endif
+#ifndef PCI_VENDOR_ID_QLOGIC
+/** Vendor ID used by QLogic devices */
+#define PCI_VENDOR_ID_QLOGIC 0x1077
+#endif
+
/******************** Physical EM devices from e1000_hw.h ********************/
#define E1000_DEV_ID_82542 0x1000
@@ -651,6 +664,35 @@ RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57811_MF)
RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57840_MF)
#endif
+/****************** QLogic 25G/40G devices ******************/
+#define CHIP_NUM_57980E 0x1634
+#define CHIP_NUM_57980S 0x1629
+#define CHIP_NUM_VF 0x1630
+#define CHIP_NUM_57980S_40 0x1634
+#define CHIP_NUM_57980S_VF 0x1637 /* will change to 1664 */
+#define CHIP_NUM_57980S_25 0x1656
+#define CHIP_NUM_57980S_IOV 0x1664
+#define CHIP_NUM_AH 0x8070
+
+#ifndef PCI_DEVICE_ID_NX2_57980E
+#define PCI_DEVICE_ID_NX2_57980E CHIP_NUM_57980E
+#define PCI_DEVICE_ID_NX2_57980S CHIP_NUM_57980S
+#define PCI_DEVICE_ID_NX2_VF CHIP_NUM_VF
+#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
+#define PCI_DEVICE_ID_57980S_VF CHIP_NUM_57980S_VF
+#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
+#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
+#define PCI_DEVICE_ID_AH CHIP_NUM_AH
+#endif
+
+RTE_PCI_DEV_ID_DECL_QEDE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_NX2_57980E)
+RTE_PCI_DEV_ID_DECL_QEDE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_NX2_57980S)
+RTE_PCI_DEV_ID_DECL_QEDE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_57980S_40)
+RTE_PCI_DEV_ID_DECL_QEDE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_57980S_25)
+RTE_PCI_DEV_ID_DECL_QEDEVF(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_NX2_VF)
+RTE_PCI_DEV_ID_DECL_QEDEVF(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_57980S_VF)
+RTE_PCI_DEV_ID_DECL_QEDEVF(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_57980S_IOV)
+
/*
* Undef all RTE_PCI_DEV_ID_DECL_* here.
*/
@@ -667,3 +709,5 @@ RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57840_MF)
#undef RTE_PCI_DEV_ID_DECL_VMXNET3
#undef RTE_PCI_DEV_ID_DECL_FM10K
#undef RTE_PCI_DEV_ID_DECL_FM10KVF
+#undef RTE_PCI_DEV_ID_DECL_QEDE
+#undef RTE_PCI_DEV_ID_DECL_QEDEVF
--
1.8.3.1
next prev parent reply other threads:[~2016-02-20 15:40 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-20 15:40 [dpdk-dev] [PATCH 0/6] DPDK PMD for new QLogic FastLinQ QL4xxxx 25G/40G CNAs Harish Patil
2016-02-20 15:40 ` [dpdk-dev] [PATCH 1/6] qede: add maintainers Harish Patil
2016-02-20 15:40 ` [dpdk-dev] [PATCH 2/6] qede: add documentation Harish Patil
2016-02-22 16:52 ` Mcnamara, John
2016-02-24 7:17 ` Harish Patil
2016-02-24 9:26 ` Mcnamara, John
2016-02-22 17:38 ` Mcnamara, John
2016-02-20 15:40 ` Harish Patil [this message]
2016-02-21 1:17 ` [dpdk-dev] [PATCH 3/6] qede: add QLogic PCI ids Stephen Hemminger
2016-02-22 23:23 ` Harish Patil
2016-02-20 15:40 ` [dpdk-dev] [PATCH 5/6] qede: add driver Harish Patil
2016-02-21 1:26 ` Stephen Hemminger
2016-02-23 2:28 ` Harish Patil
2016-02-23 5:30 ` Stephen Hemminger
2016-02-23 5:33 ` Stephen Hemminger
2016-02-23 19:04 ` Harish Patil
2016-02-23 19:06 ` Harish Patil
2016-02-20 15:40 ` [dpdk-dev] [PATCH 6/6] qede: enable PMD build Harish Patil
2016-02-20 20:49 ` [dpdk-dev] [PATCH 0/6] DPDK PMD for new QLogic FastLinQ QL4xxxx 25G/40G CNAs Thomas Monjalon
2016-02-22 16:47 ` Harish Patil
2016-02-22 17:35 ` Thomas Monjalon
2016-02-23 18:13 ` Harish Patil
2016-03-08 14:01 ` Bruce Richardson
2016-03-08 14:24 ` Harish Patil
2016-03-10 17:22 ` Harish Patil
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1455982831-21682-4-git-send-email-harish.patil@qlogic.com \
--to=harish.patil@qlogic.com \
--cc=dev@dpdk.org \
--cc=sony.chacko@qlogic.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).