From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 7FAE22C65 for ; Thu, 24 Mar 2016 16:21:59 +0100 (CET) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP; 24 Mar 2016 08:21:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,385,1455004800"; d="scan'208";a="930974934" Received: from sie-lab-214-036.ir.intel.com (HELO sie-lab-214-36.ir.intel.com) ([10.237.214.36]) by fmsmga001.fm.intel.com with ESMTP; 24 Mar 2016 08:21:58 -0700 From: Pablo de Lara To: dev@dpdk.org Cc: wenzhuo.lu@intel.com, bruce.richardson@intel.com, Pablo de Lara Date: Thu, 24 Mar 2016 15:22:04 +0000 Message-Id: <1458832924-1489-4-git-send-email-pablo.de.lara.guarch@intel.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1458832924-1489-1-git-send-email-pablo.de.lara.guarch@intel.com> References: <1458832675-666-1-git-send-email-pablo.de.lara.guarch@intel.com> <1458832924-1489-1-git-send-email-pablo.de.lara.guarch@intel.com> Subject: [dpdk-dev] [PATCH v4 3/3] ixgbe: fix incorrect max tx queue number X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Mar 2016 15:22:00 -0000 From: Wenzhuo Lu IXGBE supports 128 TX queues. However, the full 128 queues are only available in VT and DCB mode. In normal default "none" mode (VT/DCB off) the maximum number of available queues is only 64. IXGBE doesn't check the mode when reporting the available number of queues. If a queue larger than 64 is used in default mode, the TX packets will be dropped silently. This change adds a check to forbid using a queue number larger than 64 during device configuration (in default mode), so that the problem is reported as early as possible. Signed-off-by: Wenzhuo Lu Signed-off-by: Pablo de Lara --- doc/guides/rel_notes/release_16_04.rst | 6 ++++++ drivers/net/ixgbe/ixgbe_ethdev.c | 26 ++++++++++++++++++++++++++ drivers/net/ixgbe/ixgbe_ethdev.h | 1 + 3 files changed, 33 insertions(+) diff --git a/doc/guides/rel_notes/release_16_04.rst b/doc/guides/rel_notes/release_16_04.rst index 9922bcb..d0d5c89 100644 --- a/doc/guides/rel_notes/release_16_04.rst +++ b/doc/guides/rel_notes/release_16_04.rst @@ -302,6 +302,12 @@ Drivers The driver now set the MDIO clock speed prior to initializing PHY ops and again after the MAC reset. +* **ixgbe: Fixed maximum number of available TX queues.** + + In IXGBE, the maximum number of TX queues varies depending on the NIC operating + mode. This was not being updated in the device information, providing + an incorrect number in some cases. + * **i40e: Generated MAC address for each VFs.** It generates a MAC address for each VFs during PF host initialization, diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index 0d867fc..bfd8cb3 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -1861,6 +1861,7 @@ static int ixgbe_check_mq_mode(struct rte_eth_dev *dev) { struct rte_eth_conf *dev_conf = &dev->data->dev_conf; + struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); uint16_t nb_rx_q = dev->data->nb_rx_queues; uint16_t nb_tx_q = dev->data->nb_tx_queues; @@ -2002,6 +2003,21 @@ ixgbe_check_mq_mode(struct rte_eth_dev *dev) return -EINVAL; } } + + /* + * When DCB/VT is off, maximum number of queues changes, + * except for 82598EB, which remains constant. + */ + if (dev_conf->txmode.mq_mode == ETH_MQ_TX_NONE && + hw->mac.type != ixgbe_mac_82598EB) { + if (nb_tx_q > IXGBE_NONE_MODE_TX_NB_QUEUES) { + PMD_INIT_LOG(ERR, + "Neither VT nor DCB are enabled, " + "nb_tx_q > %d.", + IXGBE_NONE_MODE_TX_NB_QUEUES); + return -EINVAL; + } + } } return 0; } @@ -2856,9 +2872,19 @@ static void ixgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) { struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + struct rte_eth_conf *dev_conf = &dev->data->dev_conf; dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues; dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues; + if (RTE_ETH_DEV_SRIOV(dev).active == 0) { + /* + * When DCB/VT is off, maximum number of queues changes, + * except for 82598EB, which remains constant. + */ + if (dev_conf->txmode.mq_mode == ETH_MQ_TX_NONE && + hw->mac.type != ixgbe_mac_82598EB) + dev_info->max_tx_queues = IXGBE_NONE_MODE_TX_NB_QUEUES; + } dev_info->min_rx_bufsize = 1024; /* cf BSIZEPACKET in SRRCTL register */ dev_info->max_rx_pktlen = 15872; /* includes CRC, cf MAXFRS register */ dev_info->max_mac_addrs = hw->mac.num_rar_entries; diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h b/drivers/net/ixgbe/ixgbe_ethdev.h index 5c3aa16..691c62f 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.h +++ b/drivers/net/ixgbe/ixgbe_ethdev.h @@ -61,6 +61,7 @@ #define IXGBE_MAX_RX_QUEUE_NUM 128 #define IXGBE_VMDQ_DCB_NB_QUEUES IXGBE_MAX_RX_QUEUE_NUM #define IXGBE_DCB_NB_QUEUES IXGBE_MAX_RX_QUEUE_NUM +#define IXGBE_NONE_MODE_TX_NB_QUEUES 64 #ifndef NBBY #define NBBY 8 /* number of bits in a byte */ -- 2.5.5