[dpdk-dev] [PATCH 0/2] Add AES Counter mode support for AES-NI MB PMD

[dpdk-dev] [PATCH 0/2] Add AES Counter mode support for AES-NI MB PMD

[Fan Zhang]

This patchset adds counter mode support to AES-NI multi-buffer library
and appropriate test cases. 

This patchset depends on "doc: fix supported AES-CBC key lengths"
(http://dpdk.org/ml/archives/dev/2016-May/038358.html)
and "Added AES counter mode capability"
(http://dpdk.org/ml/archives/dev/2016-May/038364.html)

Fan Zhang (2):
  aesni_mb: add counter mode support
  app/test: add aes-ni multi-buffer pmd test cases for AES CTR

 app/test/test_cryptodev.c                      | 13 +++++++++++++
 doc/guides/cryptodevs/aesni_mb.rst             |  3 +++
 doc/guides/cryptodevs/overview.rst             |  6 +++---
 doc/guides/rel_notes/release_16_07.rst         |  5 +++++
 drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c     |  3 +++
 drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c | 20 ++++++++++++++++++++
 6 files changed, 47 insertions(+), 3 deletions(-)

-- 
2.5.5

[dpdk-dev] [PATCH 1/2] aesni_mb: add counter mode support

[Fan Zhang]

This patch provides counter mode support to AES-NI multi-buffer library.

The following cipher algorithm is enabled:
- RTE_CRYPTO_CIPHER_AES_CTR

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
---
 doc/guides/cryptodevs/aesni_mb.rst             |  3 +++
 doc/guides/cryptodevs/overview.rst             |  6 +++---
 doc/guides/rel_notes/release_16_07.rst         |  5 +++++
 drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c     |  3 +++
 drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c | 20 ++++++++++++++++++++
 5 files changed, 34 insertions(+), 3 deletions(-)

diff --git a/doc/guides/cryptodevs/aesni_mb.rst b/doc/guides/cryptodevs/aesni_mb.rst
index fd5414d..60a8914 100644
--- a/doc/guides/cryptodevs/aesni_mb.rst
+++ b/doc/guides/cryptodevs/aesni_mb.rst
@@ -48,6 +48,9 @@ Cipher algorithms:
 * RTE_CRYPTO_SYM_CIPHER_AES128_CBC
 * RTE_CRYPTO_SYM_CIPHER_AES192_CBC
 * RTE_CRYPTO_SYM_CIPHER_AES256_CBC
+* RTE_CRYPTO_SYM_CIPHER_AES128_CTR
+* RTE_CRYPTO_SYM_CIPHER_AES192_CTR
+* RTE_CRYPTO_SYM_CIPHER_AES256_CTR
 
 Hash algorithms:
 
diff --git a/doc/guides/cryptodevs/overview.rst b/doc/guides/cryptodevs/overview.rst
index e1f33e1..4a84146 100644
--- a/doc/guides/cryptodevs/overview.rst
+++ b/doc/guides/cryptodevs/overview.rst
@@ -55,9 +55,9 @@ Supported Cipher Algorithms
    "AES_CBC_128",x,,x,,
    "AES_CBC_192",x,,x,,
    "AES_CBC_256",x,,x,,
-   "AES_CTR_128",x,,,,
-   "AES_CTR_192",x,,,,
-   "AES_CTR_256",x,,,,
+   "AES_CTR_128",x,,x,,
+   "AES_CTR_192",x,,x,,
+   "AES_CTR_256",x,,x,,
    "SNOW3G_UEA2",x,,,,x
 
 Supported Authentication Algorithms
diff --git a/doc/guides/rel_notes/release_16_07.rst b/doc/guides/rel_notes/release_16_07.rst
index 84e61c0..4600e81 100644
--- a/doc/guides/rel_notes/release_16_07.rst
+++ b/doc/guides/rel_notes/release_16_07.rst
@@ -34,6 +34,11 @@ This section should contain new features added in this release. Sample format:
 
   Refer to the previous release notes for examples.
 
+* **Added AES-CTR support to AESNI MB PMD.**
+
+  Now AESNI MB PMD supports 128/192/256-bit counter mode AES encryption and
+  decryption.
+
 * **Added support of AES counter mode for Intel QuickAssist devices.**
 
   Enabled support for the AES CTR algorithm for IntelQuick Assist devices.
diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
index 3415ac1..ce763bf 100644
--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
@@ -222,6 +222,9 @@ aesni_mb_set_session_cipher_parameters(const struct aesni_mb_ops *mb_ops,
 	case RTE_CRYPTO_CIPHER_AES_CBC:
 		sess->cipher.mode = CBC;
 		break;
+	case RTE_CRYPTO_CIPHER_AES_CTR:
+		sess->cipher.mode = CNTR;
+		break;
 	default:
 		MB_LOG_ERR("Unsupported cipher mode parameter");
 		return -1;
diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c
index 3806a66..d3c46ac 100644
--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c
+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c
@@ -207,6 +207,26 @@ static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
 			}, }
 		}, }
 	},
+	{	/* AES CTR */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+			{.cipher = {
+				.algo = RTE_CRYPTO_CIPHER_AES_CTR,
+				.block_size = 16,
+				.key_size = {
+					.min = 16,
+					.max = 32,
+					.increment = 8
+				},
+				.iv_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
-- 
2.5.5

[dpdk-dev] [PATCH 2/2] app/test: add aes-ni multi-buffer pmd test cases for AES CTR

[Fan Zhang]

Added tests cases for AES-NI MB PMD working in counter mode.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
---
 app/test/test_cryptodev.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 03d6f02..45e6daa 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -4649,6 +4649,19 @@ static struct unit_test_suite cryptodev_aesni_mb_testsuite  = {
 			test_AES_CBC_HMAC_SHA1_encrypt_digest_sessionless),
 
 		TEST_CASE_ST(ut_setup, ut_teardown,
+				test_AES_CTR_encrypt_digest_case_1),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+				test_AES_CTR_encrypt_digest_case_2),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+				test_AES_CTR_encrypt_digest_case_3),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+				test_AES_CTR_digest_verify_decrypt_case_1),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+				test_AES_CTR_digest_verify_decrypt_case_2),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+				test_AES_CTR_digest_verify_decrypt_case_3),
+
+		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_not_in_place_crypto),
 
 		TEST_CASES_END() /**< NULL terminate unit test array */
-- 
2.5.5

[dpdk-dev] [PATCH v2 0/3] Add AES Counter mode support for AES-NI MB PMD

[Fan Zhang]

This patchset adds counter mode support to AES-NI multi-buffer library
and appropriate test cases. 

This patchset depends on the following patch/patchsets
"doc: fix supported AES-CBC key lengths"
(http://dpdk.org/dev/patchwork/patch/12398/)
and "Added AES counter mode capability"
(http://dpdk.org/ml/archives/dev/2016-May/038364.html)

v2:
*added AES counter mode support to l2fwd-crypto sample application

Fan Zhang (3):
  aesni_mb: add counter mode support
  app/test: add aes-ni multi-buffer pmd test cases for AES CTR
  examples/l2fwd-crypto: enable AES counter mode cipher algorithm

 app/test/test_cryptodev.c                      | 13 +++++++++++++
 doc/guides/cryptodevs/aesni_mb.rst             |  3 +++
 doc/guides/cryptodevs/overview.rst             |  6 +++---
 doc/guides/rel_notes/release_16_07.rst         |  5 +++++
 drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c     |  3 +++
 drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c | 20 ++++++++++++++++++++
 examples/l2fwd-crypto/main.c                   |  1 +
 7 files changed, 48 insertions(+), 3 deletions(-)

-- 
2.5.5

[dpdk-dev] [PATCH v2 1/3] aesni_mb: add counter mode support

[Fan Zhang]

This patch provides counter mode support to AES-NI multi-buffer library.

The following cipher algorithm is enabled:
- RTE_CRYPTO_CIPHER_AES_CTR

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
---
 doc/guides/cryptodevs/aesni_mb.rst             |  3 +++
 doc/guides/cryptodevs/overview.rst             |  6 +++---
 doc/guides/rel_notes/release_16_07.rst         |  5 +++++
 drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c     |  3 +++
 drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c | 20 ++++++++++++++++++++
 5 files changed, 34 insertions(+), 3 deletions(-)

diff --git a/doc/guides/cryptodevs/aesni_mb.rst b/doc/guides/cryptodevs/aesni_mb.rst
index fd5414d..60a8914 100644
--- a/doc/guides/cryptodevs/aesni_mb.rst
+++ b/doc/guides/cryptodevs/aesni_mb.rst
@@ -48,6 +48,9 @@ Cipher algorithms:
 * RTE_CRYPTO_SYM_CIPHER_AES128_CBC
 * RTE_CRYPTO_SYM_CIPHER_AES192_CBC
 * RTE_CRYPTO_SYM_CIPHER_AES256_CBC
+* RTE_CRYPTO_SYM_CIPHER_AES128_CTR
+* RTE_CRYPTO_SYM_CIPHER_AES192_CTR
+* RTE_CRYPTO_SYM_CIPHER_AES256_CTR
 
 Hash algorithms:
 
diff --git a/doc/guides/cryptodevs/overview.rst b/doc/guides/cryptodevs/overview.rst
index e1f33e1..4a84146 100644
--- a/doc/guides/cryptodevs/overview.rst
+++ b/doc/guides/cryptodevs/overview.rst
@@ -55,9 +55,9 @@ Supported Cipher Algorithms
    "AES_CBC_128",x,,x,,
    "AES_CBC_192",x,,x,,
    "AES_CBC_256",x,,x,,
-   "AES_CTR_128",x,,,,
-   "AES_CTR_192",x,,,,
-   "AES_CTR_256",x,,,,
+   "AES_CTR_128",x,,x,,
+   "AES_CTR_192",x,,x,,
+   "AES_CTR_256",x,,x,,
    "SNOW3G_UEA2",x,,,,x
 
 Supported Authentication Algorithms
diff --git a/doc/guides/rel_notes/release_16_07.rst b/doc/guides/rel_notes/release_16_07.rst
index 565055e..307e7c4 100644
--- a/doc/guides/rel_notes/release_16_07.rst
+++ b/doc/guides/rel_notes/release_16_07.rst
@@ -47,6 +47,11 @@ New Features
   * Dropped specific Xen Dom0 code.
   * Dropped specific anonymous mempool code in testpmd.
 
+* **Added AES-CTR support to AESNI MB PMD.**
+
+  Now AESNI MB PMD supports 128/192/256-bit counter mode AES encryption and
+  decryption.
+
 * **Added support of AES counter mode for Intel QuickAssist devices.**
 
   Enabled support for the AES CTR algorithm for Intel QuickAssist devices.
diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
index 3415ac1..ce763bf 100644
--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
@@ -222,6 +222,9 @@ aesni_mb_set_session_cipher_parameters(const struct aesni_mb_ops *mb_ops,
 	case RTE_CRYPTO_CIPHER_AES_CBC:
 		sess->cipher.mode = CBC;
 		break;
+	case RTE_CRYPTO_CIPHER_AES_CTR:
+		sess->cipher.mode = CNTR;
+		break;
 	default:
 		MB_LOG_ERR("Unsupported cipher mode parameter");
 		return -1;
diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c
index 3806a66..d3c46ac 100644
--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c
+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c
@@ -207,6 +207,26 @@ static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
 			}, }
 		}, }
 	},
+	{	/* AES CTR */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+			{.cipher = {
+				.algo = RTE_CRYPTO_CIPHER_AES_CTR,
+				.block_size = 16,
+				.key_size = {
+					.min = 16,
+					.max = 32,
+					.increment = 8
+				},
+				.iv_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
-- 
2.5.5

[dpdk-dev] [PATCH v2 2/3] app/test: add aes-ni multi-buffer pmd test cases for AES CTR

[Fan Zhang]

Added tests cases for AES-NI MB PMD working in counter mode.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
---
 app/test/test_cryptodev.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 03d6f02..45e6daa 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -4649,6 +4649,19 @@ static struct unit_test_suite cryptodev_aesni_mb_testsuite  = {
 			test_AES_CBC_HMAC_SHA1_encrypt_digest_sessionless),
 
 		TEST_CASE_ST(ut_setup, ut_teardown,
+				test_AES_CTR_encrypt_digest_case_1),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+				test_AES_CTR_encrypt_digest_case_2),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+				test_AES_CTR_encrypt_digest_case_3),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+				test_AES_CTR_digest_verify_decrypt_case_1),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+				test_AES_CTR_digest_verify_decrypt_case_2),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+				test_AES_CTR_digest_verify_decrypt_case_3),
+
+		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_not_in_place_crypto),
 
 		TEST_CASES_END() /**< NULL terminate unit test array */
-- 
2.5.5

[dpdk-dev] [PATCH v2 3/3] examples/l2fwd-crypto: enable AES counter mode cipher algorithm

[Fan Zhang]

This patch enables AES counter mode algorithm support to l2fwd-crypto
sample application.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
---
 examples/l2fwd-crypto/main.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/examples/l2fwd-crypto/main.c b/examples/l2fwd-crypto/main.c
index d18c813..66fc874 100644
--- a/examples/l2fwd-crypto/main.c
+++ b/examples/l2fwd-crypto/main.c
@@ -352,6 +352,7 @@ fill_supported_algorithm_tables(void)
 		strcpy(supported_cipher_algo[i], "NOT_SUPPORTED");
 
 	strcpy(supported_cipher_algo[RTE_CRYPTO_CIPHER_AES_CBC], "AES_CBC");
+	strcpy(supported_cipher_algo[RTE_CRYPTO_CIPHER_AES_CTR], "AES_CTR");
 	strcpy(supported_cipher_algo[RTE_CRYPTO_CIPHER_AES_GCM], "AES_GCM");
 	strcpy(supported_cipher_algo[RTE_CRYPTO_CIPHER_NULL], "NULL");
 	strcpy(supported_cipher_algo[RTE_CRYPTO_CIPHER_SNOW3G_UEA2], "SNOW3G_UEA2");
-- 
2.5.5

Re: [dpdk-dev] [PATCH v2 0/3] Add AES Counter mode support for AES-NI MB PMD

[Thomas Monjalon]

2016-06-03 11:11, Fan Zhang:
> This patchset adds counter mode support to AES-NI multi-buffer library
> and appropriate test cases. 
> 
> Fan Zhang (3):
>   aesni_mb: add counter mode support
>   app/test: add aes-ni multi-buffer pmd test cases for AES CTR
>   examples/l2fwd-crypto: enable AES counter mode cipher algorithm

I think the patches can be squashed into one.

Re: [dpdk-dev] [PATCH v2 0/3] Add AES Counter mode support for AES-NI MB PMD

[De Lara Guarch, Pablo]

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Fan Zhang
> Sent: Friday, June 03, 2016 11:12 AM
> To: dev@dpdk.org
> Cc: Doherty, Declan
> Subject: [dpdk-dev] [PATCH v2 0/3] Add AES Counter mode support for AES-
> NI MB PMD
> 
> This patchset adds counter mode support to AES-NI multi-buffer library
> and appropriate test cases.
> 
> This patchset depends on the following patch/patchsets
> "doc: fix supported AES-CBC key lengths"
> (http://dpdk.org/dev/patchwork/patch/12398/)
> and "Added AES counter mode capability"
> (http://dpdk.org/ml/archives/dev/2016-May/038364.html)
> 
> v2:
> *added AES counter mode support to l2fwd-crypto sample application
> 
> Fan Zhang (3):
>   aesni_mb: add counter mode support
>   app/test: add aes-ni multi-buffer pmd test cases for AES CTR
>   examples/l2fwd-crypto: enable AES counter mode cipher algorithm
> 
>  app/test/test_cryptodev.c                      | 13 +++++++++++++
>  doc/guides/cryptodevs/aesni_mb.rst             |  3 +++
>  doc/guides/cryptodevs/overview.rst             |  6 +++---
>  doc/guides/rel_notes/release_16_07.rst         |  5 +++++
>  drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c     |  3 +++
>  drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c | 20
> ++++++++++++++++++++
>  examples/l2fwd-crypto/main.c                   |  1 +
>  7 files changed, 48 insertions(+), 3 deletions(-)
> 
> --
> 2.5.5

Series-acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

Re: [dpdk-dev] [PATCH v2 0/3] Add AES Counter mode support for AES-NI MB PMD

[Thomas Monjalon]

> > This patchset adds counter mode support to AES-NI multi-buffer library
> > and appropriate test cases.
> > 
> > This patchset depends on the following patch/patchsets
> > "doc: fix supported AES-CBC key lengths"
> > (http://dpdk.org/dev/patchwork/patch/12398/)
> > and "Added AES counter mode capability"
> > (http://dpdk.org/ml/archives/dev/2016-May/038364.html)
> > 
> > v2:
> > *added AES counter mode support to l2fwd-crypto sample application
> > 
> > Fan Zhang (3):
> >   aesni_mb: add counter mode support
> >   app/test: add aes-ni multi-buffer pmd test cases for AES CTR
> >   examples/l2fwd-crypto: enable AES counter mode cipher algorithm
> 
> Series-acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

Applied, thanks