From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-gw3-out.broadcom.com (mail-gw3-out.broadcom.com [216.31.210.64]) by dpdk.org (Postfix) with ESMTP id 6ECD15A13 for ; Fri, 6 May 2016 21:26:54 +0200 (CEST) X-IronPort-AV: E=Sophos;i="5.24,587,1455004800"; d="scan'208";a="94346001" Received: from mail-irv-18.broadcom.com ([10.15.198.37]) by mail-gw3-out.broadcom.com with ESMTP; 06 May 2016 12:41:11 -0700 Received: from mail-irva-12.broadcom.com (mail-irva-12.broadcom.com [10.11.16.101]) by mail-irv-18.broadcom.com (Postfix) with ESMTP id 9D30982025 for ; Fri, 6 May 2016 12:26:53 -0700 (PDT) Received: from DPDK-C1.broadcom.com (dhcp-10-13-115-104.irv.broadcom.com [10.13.115.104]) by mail-irva-12.broadcom.com (Postfix) with ESMTP id D9F60127621 for ; Fri, 6 May 2016 12:26:49 -0700 (PDT) From: Stephen Hurd To: dev@dpdk.org Date: Fri, 6 May 2016 12:25:56 -0700 Message-Id: <1462562780-47991-16-git-send-email-stephen.hurd@broadcom.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1462562780-47991-1-git-send-email-stephen.hurd@broadcom.com> References: <20160421100005.GA976@bricha3-MOBL3> <1462562780-47991-1-git-send-email-stephen.hurd@broadcom.com> Subject: [dpdk-dev] [PATCH 16/40] bnxt: add HWRM function reset command X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 06 May 2016 19:26:55 -0000 Add bnxt_hwrm_func_reset() function and supporting structs and macros. Signed-off-by: Stephen Hurd Reviewed-by: Ajit Kumar Khaparde --- drivers/net/bnxt/bnxt_hwrm.c | 17 +++++ drivers/net/bnxt/bnxt_hwrm.h | 1 + drivers/net/bnxt/hsi_struct_def_dpdk.h | 129 +++++++++++++++++++++++++++++++++ 3 files changed, 147 insertions(+) diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index 50d8b89..922c92a 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -221,6 +221,23 @@ int bnxt_hwrm_func_qcaps(struct bnxt *bp) return rc; } +int bnxt_hwrm_func_reset(struct bnxt *bp) +{ + int rc = 0; + struct hwrm_func_reset_input req = {.req_type = 0 }; + struct hwrm_func_reset_output *resp = bp->hwrm_cmd_resp_addr; + + HWRM_PREP(req, FUNC_RESET, -1, resp); + + req.enables = rte_cpu_to_le_32(0); + + rc = bnxt_hwrm_send_message(bp, &req, sizeof(req)); + + HWRM_CHECK_RESULT; + + return rc; +} + int bnxt_hwrm_func_driver_register(struct bnxt *bp, uint32_t flags, uint32_t *vf_req_fwd) { diff --git a/drivers/net/bnxt/bnxt_hwrm.h b/drivers/net/bnxt/bnxt_hwrm.h index 0861417..4fa94aa 100644 --- a/drivers/net/bnxt/bnxt_hwrm.h +++ b/drivers/net/bnxt/bnxt_hwrm.h @@ -50,6 +50,7 @@ int bnxt_hwrm_exec_fwd_resp(struct bnxt *bp, void *fwd_cmd); int bnxt_hwrm_func_driver_register(struct bnxt *bp, uint32_t flags, uint32_t *vf_req_fwd); int bnxt_hwrm_func_qcaps(struct bnxt *bp); +int bnxt_hwrm_func_reset(struct bnxt *bp); int bnxt_hwrm_func_driver_unregister(struct bnxt *bp, uint32_t flags); int bnxt_hwrm_queue_qportcfg(struct bnxt *bp); diff --git a/drivers/net/bnxt/hsi_struct_def_dpdk.h b/drivers/net/bnxt/hsi_struct_def_dpdk.h index fd9eb62..9c82d13 100644 --- a/drivers/net/bnxt/hsi_struct_def_dpdk.h +++ b/drivers/net/bnxt/hsi_struct_def_dpdk.h @@ -83,6 +83,7 @@ typedef struct ctx_hw_stats64 { * Request types */ #define HWRM_VER_GET (UINT32_C(0x0)) +#define HWRM_FUNC_RESET (UINT32_C(0x11)) #define HWRM_FUNC_QCAPS (UINT32_C(0x15)) #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a)) #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d)) @@ -2097,6 +2098,134 @@ struct hwrm_func_qcaps_output { uint8_t valid; } __attribute__((packed)); +/* hwrm_func_reset */ +/* + * Description: This command resets a hardware function (PCIe function) and + * frees any resources used by the function. This command shall be initiated by + * the driver after an FLR has occurred to prepare the function for re-use. This + * command may also be initiated by a driver prior to doing it's own + * configuration. This command puts the function into the reset state. In the + * reset state, global and port related features of the chip are not available. + */ +/* + * Note: This command will reset a function that has already been disabled or + * idled. The command returns all the resources owned by the function so a new + * driver may allocate and configure resources normally. + */ + +/* Input (24 bytes) */ +struct hwrm_func_reset_input { + /* + * This value indicates what type of request this is. The format for the + * rest of the command is determined by this field. + */ + uint16_t req_type; + + /* + * This value indicates the what completion ring the request will be + * optionally completed on. If the value is -1, then no CR completion + * will be generated. Any other value must be a valid CR ring_id value + * for this function. + */ + uint16_t cmpl_ring; + + /* This value indicates the command sequence number. */ + uint16_t seq_id; + + /* + * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids + * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM + */ + uint16_t target_id; + + /* + * This is the host address where the response will be written when the + * request is complete. This area must be 16B aligned and must be + * cleared to zero before the request is made. + */ + uint64_t resp_addr; + + /* This bit must be '1' for the vf_id_valid field to be configured. */ + #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID \ + UINT32_C(0x1) + uint32_t enables; + + /* + * The ID of the VF that this PF is trying to reset. Only the parent PF + * shall be allowed to reset a child VF. A parent PF driver shall use + * this field only when a specific child VF is requested to be reset. + */ + uint16_t vf_id; + + /* This value indicates the level of a function reset. */ + /* + * Reset the caller function and its children VFs (if any). If + * no children functions exist, then reset the caller function + * only. + */ + #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL \ + (UINT32_C(0x0) << 0) + /* Reset the caller function only */ + #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME \ + (UINT32_C(0x1) << 0) + /* + * Reset all children VFs of the caller function driver if the + * caller is a PF driver. It is an error to specify this level + * by a VF driver. It is an error to specify this level by a PF + * driver with no children VFs. + */ + #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \ + (UINT32_C(0x2) << 0) + /* + * Reset a specific VF of the caller function driver if the + * caller is the parent PF driver. It is an error to specify + * this level by a VF driver. It is an error to specify this + * level by a PF driver that is not the parent of the VF that is + * being requested to reset. + */ + #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF \ + (UINT32_C(0x3) << 0) + uint8_t func_reset_level; + + uint8_t unused_0; +} __attribute__((packed)); + +/* Output (16 bytes) */ +struct hwrm_func_reset_output { + /* + * Pass/Fail or error type Note: receiver to verify the in parameters, + * and fail the call with an error when appropriate + */ + uint16_t error_code; + + /* This field returns the type of original request. */ + uint16_t req_type; + + /* This field provides original sequence number of the command. */ + uint16_t seq_id; + + /* + * This field is the length of the response in bytes. The last byte of + * the response is a valid flag that will read as '1' when the command + * has been completely written to memory. + */ + uint16_t resp_len; + + uint32_t unused_0; + uint8_t unused_1; + uint8_t unused_2; + uint8_t unused_3; + + /* + * This field is used in Output records to indicate that the output is + * completely written to RAM. This field should be read as '1' to + * indicate that the output has been completely written. When writing a + * command completion or response to an internal processor, the order of + * writes has to be such that this field is written last. + */ + uint8_t valid; +} __attribute__((packed)); + /* hwrm_port_phy_cfg */ /* * Description: This command configures the PHY device for the port. It allows -- 1.9.1