From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 3D2FB377E for ; Thu, 26 May 2016 16:16:00 +0200 (CEST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP; 26 May 2016 07:16:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,367,1459839600"; d="scan'208";a="709291975" Received: from sie-lab-214-251.ir.intel.com (HELO silpixa373510.ir.intel.com) ([10.237.214.251]) by FMSMGA003.fm.intel.com with ESMTP; 26 May 2016 07:15:58 -0700 From: David Hunt To: dev@dpdk.org Cc: olivier.matz@6wind.com, David Hunt Date: Thu, 26 May 2016 15:15:54 +0100 Message-Id: <1464272154-94512-1-git-send-email-david.hunt@intel.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1464267068-56805-1-git-send-email-david.hunt@intel.com> References: <1464267068-56805-1-git-send-email-david.hunt@intel.com> Subject: [dpdk-dev] [PATCH v2] test: fix mempool perf test enq_count wraparound of 32-bit uint X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 May 2016 14:16:00 -0000 recent CPU's can easily wrap around a 32-bit unsigned int in the mempool perf test. Increase to a 64-bit uint. v2: change from %lu to %"PRIu64" Signed-off-by: David Hunt --- app/test/test_mempool_perf.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/app/test/test_mempool_perf.c b/app/test/test_mempool_perf.c index cdc02a0..0fc8110 100644 --- a/app/test/test_mempool_perf.c +++ b/app/test/test_mempool_perf.c @@ -110,7 +110,7 @@ static unsigned n_keep; /* number of enqueues / dequeues */ struct mempool_test_stats { - unsigned enq_count; + uint64_t enq_count; } __rte_cache_aligned; static struct mempool_test_stats stats[RTE_MAX_LCORE]; @@ -189,7 +189,7 @@ static int launch_cores(unsigned cores) { unsigned lcore_id; - unsigned rate; + uint64_t rate; int ret; unsigned cores_save = cores; @@ -238,7 +238,7 @@ launch_cores(unsigned cores) for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) rate += (stats[lcore_id].enq_count / TIME_S); - printf("rate_persec=%u\n", rate); + printf("rate_persec=%"PRIu64"\n", rate); return 0; } -- 2.5.5