From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf0-f41.google.com (mail-lf0-f41.google.com [209.85.215.41]) by dpdk.org (Postfix) with ESMTP id 672DF2C30 for ; Thu, 30 Jun 2016 17:05:14 +0200 (CEST) Received: by mail-lf0-f41.google.com with SMTP id l188so57586653lfe.2 for ; Thu, 30 Jun 2016 08:05:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Fz2b8zY4paDnU8hJO5VwWq3ozavRj/AC2PB/jpkHeKg=; b=dYdishPlpi969bXv6rrbQkeQTcBTqtz8TUN21ER6o7worUwxgDYg9iYYhioAnPk3V8 m9Kohc+XrTNoi8Eo1I1DzSKpcoHgQycwHHPknHWzJmth3bFnr78t41R+TTnnDVoc5QWL Xr8vl+kY/i2W+dHp4a3DXUL1LjzU3q0ioQowOcYgD4V9LH90osk1wW0QWB/RfzDmEi9M VqMPvDtMjCluPuGjORkH3ENbFr5Lww+84vd38BpRaFVrzxgZ9o6TgJPKkTofu+D9ISXH HklA+YZQzbXEpM5Ev3Kmv5m9NK26OPHsDmtX692o9TzNdWOrSZf6rDCm3YlDz7GBMB6m H71Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Fz2b8zY4paDnU8hJO5VwWq3ozavRj/AC2PB/jpkHeKg=; b=G7+V/4OjWkERxGUupNkc4FyOvofrLXUE6GFPnyQdBzy/NOJ9XWE9VJ1rla6WfFLqyy eKKGnC0WdK5G7jgemtBXz1THJwnr/jN2H1c64h37BAWIpGz4qrNGrk2uXm+vkgVamrEI tfVRbZ/sUBPYUa5a3rpY2aAVaH3kSeycINokFdcKCOAdX1UuOA6HXx3tkjGTlqicxgOr EU3IvL7h6Co7bMQBh3Pir5iO9n8qULgXZHYkg0MUr9us5lnNGU5f2nU1bHf4c3cq/fJj y/7KEI5Y8y63HyCdyzmi12dUVfMAsLlFgKl3E3smEGTddzwuNs8li+1gbhjLU1rN0EkR cqbA== X-Gm-Message-State: ALyK8tJ6fxJS955Tx3M0y1Fs38GlNGwLJb3gtUHczsgPOXOTSA7tC1cuF9Pp4ZxRYEfd/g== X-Received: by 10.25.167.13 with SMTP id q13mr5389259lfe.59.1467299114039; Thu, 30 Jun 2016 08:05:14 -0700 (PDT) Received: from anpa-dpdk-2.lab.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id 206sm1635339ljj.0.2016.06.30.08.05.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Jun 2016 08:05:13 -0700 (PDT) From: Jan Medala To: dev@dpdk.org Cc: ferruh.yigit@intel.com, bruce.richardson@intel.com, Jan Medala , Alexander Matushevsky , Jakub Palider Date: Thu, 30 Jun 2016 17:04:57 +0200 Message-Id: <1467299099-32498-5-git-send-email-jan@semihalf.com> X-Mailer: git-send-email 2.8.2 In-Reply-To: <1467299099-32498-1-git-send-email-jan@semihalf.com> References: <1466510763-19569-6-git-send-email-jan@semihalf.com> <1467299099-32498-1-git-send-email-jan@semihalf.com> Subject: [dpdk-dev] [PATCH v3 4/6] ena: allocate coherent memory in node-aware way X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 30 Jun 2016 15:05:14 -0000 On multi-node systems try to allocate memory possibly closest to requesting node. While allocating (coherent) memory, get information about calling node Id and basing on it reserve memzone. Signed-off-by: Alexander Matushevsky Signed-off-by: Jakub Palider Signed-off-by: Jan Medala --- drivers/net/ena/base/ena_com.c | 51 ++++++++++++++++++++++++++---------- drivers/net/ena/base/ena_plat_dpdk.h | 23 ++++++++++++++++ drivers/net/ena/ena_ethdev.c | 15 +++++++++++ 3 files changed, 75 insertions(+), 14 deletions(-) diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_com.c index b5b8cd9..a3649d8 100644 --- a/drivers/net/ena/base/ena_com.c +++ b/drivers/net/ena/base/ena_com.c @@ -329,6 +329,7 @@ static int ena_com_init_io_sq(struct ena_com_dev *ena_dev, struct ena_com_io_sq *io_sq) { size_t size; + int dev_node; ENA_TOUCH(ctx); @@ -341,15 +342,29 @@ static int ena_com_init_io_sq(struct ena_com_dev *ena_dev, size = io_sq->desc_entry_size * io_sq->q_depth; - if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) - ENA_MEM_ALLOC_COHERENT(ena_dev->dmadev, - size, - io_sq->desc_addr.virt_addr, - io_sq->desc_addr.phys_addr, - io_sq->desc_addr.mem_handle); - else - io_sq->desc_addr.virt_addr = - ENA_MEM_ALLOC(ena_dev->dmadev, size); + if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) { + ENA_MEM_ALLOC_COHERENT_NODE(ena_dev->dmadev, + size, + io_sq->desc_addr.virt_addr, + io_sq->desc_addr.phys_addr, + ctx->numa_node, + dev_node); + if (!io_sq->desc_addr.virt_addr) + ENA_MEM_ALLOC_COHERENT(ena_dev->dmadev, + size, + io_sq->desc_addr.virt_addr, + io_sq->desc_addr.phys_addr, + io_sq->desc_addr.mem_handle); + } else { + ENA_MEM_ALLOC_NODE(ena_dev->dmadev, + size, + io_sq->desc_addr.virt_addr, + ctx->numa_node, + dev_node); + if (!io_sq->desc_addr.virt_addr) + io_sq->desc_addr.virt_addr = + ENA_MEM_ALLOC(ena_dev->dmadev, size); + } if (!io_sq->desc_addr.virt_addr) { ena_trc_err("memory allocation failed"); @@ -368,6 +383,7 @@ static int ena_com_init_io_cq(struct ena_com_dev *ena_dev, struct ena_com_io_cq *io_cq) { size_t size; + int prev_node; ENA_TOUCH(ctx); memset(&io_cq->cdesc_addr, 0x0, sizeof(struct ena_com_io_desc_addr)); @@ -380,11 +396,18 @@ static int ena_com_init_io_cq(struct ena_com_dev *ena_dev, size = io_cq->cdesc_entry_size_in_bytes * io_cq->q_depth; - ENA_MEM_ALLOC_COHERENT(ena_dev->dmadev, - size, - io_cq->cdesc_addr.virt_addr, - io_cq->cdesc_addr.phys_addr, - io_cq->cdesc_addr.mem_handle); + ENA_MEM_ALLOC_COHERENT_NODE(ena_dev->dmadev, + size, + io_cq->cdesc_addr.virt_addr, + io_cq->cdesc_addr.phys_addr, + ctx->numa_node, + prev_node); + if (!io_cq->cdesc_addr.virt_addr) + ENA_MEM_ALLOC_COHERENT(ena_dev->dmadev, + size, + io_cq->cdesc_addr.virt_addr, + io_cq->cdesc_addr.phys_addr, + io_cq->cdesc_addr.mem_handle); if (!io_cq->cdesc_addr.virt_addr) { ena_trc_err("memory allocation failed"); diff --git a/drivers/net/ena/base/ena_plat_dpdk.h b/drivers/net/ena/base/ena_plat_dpdk.h index 3c0203f..b1ed80c 100644 --- a/drivers/net/ena/base/ena_plat_dpdk.h +++ b/drivers/net/ena/base/ena_plat_dpdk.h @@ -196,6 +196,29 @@ typedef uint64_t dma_addr_t; ENA_TOUCH(dmadev); \ rte_free(virt); }) +#define ENA_MEM_ALLOC_COHERENT_NODE(dmadev, size, virt, phys, node, dev_node) \ + do { \ + const struct rte_memzone *mz; \ + char z_name[RTE_MEMZONE_NAMESIZE]; \ + ENA_TOUCH(dmadev); ENA_TOUCH(dev_node); \ + snprintf(z_name, sizeof(z_name), \ + "ena_alloc_%d", ena_alloc_cnt++); \ + mz = rte_memzone_reserve(z_name, size, node, 0); \ + virt = mz->addr; \ + phys = mz->phys_addr; \ + } while (0) + +#define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node) \ + do { \ + const struct rte_memzone *mz; \ + char z_name[RTE_MEMZONE_NAMESIZE]; \ + ENA_TOUCH(dmadev); ENA_TOUCH(dev_node); \ + snprintf(z_name, sizeof(z_name), \ + "ena_alloc_%d", ena_alloc_cnt++); \ + mz = rte_memzone_reserve(z_name, size, node, 0); \ + virt = mz->addr; \ + } while (0) + #define ENA_MEM_ALLOC(dmadev, size) rte_zmalloc(NULL, size, 1) #define ENA_MEM_FREE(dmadev, ptr) ({ENA_TOUCH(dmadev); rte_free(ptr); }) diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index 25637a6..f8dbde4 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -38,6 +38,7 @@ #include #include #include +#include #include "ena_ethdev.h" #include "ena_logs.h" @@ -232,6 +233,18 @@ static struct eth_dev_ops ena_dev_ops = { .reta_query = ena_rss_reta_query, }; +#define NUMA_NO_NODE SOCKET_ID_ANY + +static inline int ena_cpu_to_node(int cpu) +{ + struct rte_config *config = rte_eal_get_configuration(); + + if (likely(cpu < RTE_MAX_MEMZONE)) + return config->mem_config->memzone[cpu].socket_id; + + return NUMA_NO_NODE; +} + static inline void ena_rx_mbuf_prepare(struct rte_mbuf *mbuf, struct ena_com_rx_ctx *ena_rx_ctx) { @@ -959,6 +972,7 @@ static int ena_tx_queue_setup(struct rte_eth_dev *dev, ctx.msix_vector = -1; /* admin interrupts not used */ ctx.mem_queue_type = ena_dev->tx_mem_queue_type; ctx.queue_size = adapter->tx_ring_size; + ctx.numa_node = ena_cpu_to_node(queue_idx); rc = ena_com_create_io_queue(ena_dev, &ctx); if (rc) { @@ -1049,6 +1063,7 @@ static int ena_rx_queue_setup(struct rte_eth_dev *dev, ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; ctx.msix_vector = -1; /* admin interrupts not used */ ctx.queue_size = adapter->rx_ring_size; + ctx.numa_node = ena_cpu_to_node(queue_idx); rc = ena_com_create_io_queue(ena_dev, &ctx); if (rc) -- 2.8.2