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From: Deepak Kumar Jain <deepak.k.jain@intel.com>
To: fiona.trahe@intel.com, john.griffin@intel.com,
	pablo.de.lara.guarch@intel.com
Cc: dev@dpdk.org, Deepak Kumar Jain <deepak.k.jain@intel.com>
Subject: [dpdk-dev] [PATCH] crypto/qat: add Intel(R) QuickAssist C3xxx device
Date: Fri, 26 Aug 2016 13:27:31 +0100	[thread overview]
Message-ID: <1472214451-163515-1-git-send-email-deepak.k.jain@intel.com> (raw)

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
 doc/guides/cryptodevs/qat.rst          | 71 ++++++++++++++++++++++++++++++++--
 drivers/crypto/qat/rte_qat_cryptodev.c |  3 ++
 2 files changed, 71 insertions(+), 3 deletions(-)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index f6cc1fa..21486cd 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -77,6 +77,7 @@ Limitations
 * Snow3g(UEA2) supported only if cipher length, cipher offset fields are byte-aligned.
 * Snow3g(UIA2) supported only if hash length, hash offset fields are byte-aligned.
 * No BSD support as BSD QAT kernel driver not available.
+* Snow3g (UIA2) not supported in the PMD of **Intel QuickAssist Technology C3xxx** device.
 
 
 Installation
@@ -89,13 +90,15 @@ If you are running on kernel 4.4 or greater, see instructions for
 `Installation using kernel.org driver`_ below. If you are on a kernel earlier
 than 4.4, see `Installation using 01.org QAT driver`_.
 
-For **Intel QuickAssist Technology C62x** device, kernel 4.5 or greater is
+For **Intel QuickAssist Technology C62x**  and **Intel QuickAssist Technology C3xxx**
+device, kernel 4.5 or greater is
 needed. See instructions for `instructions using kernel.org driver`_ below.
 
 
 Installation using 01.org QAT driver
 ------------------------------------
-NOTE: There is no driver available for **Intel QuickAssist Technology C62x** on 01.org.
+NOTE: There is no driver available for **Intel QuickAssist Technology C62x** and
+**Intel QuickAssist Technology C3xxx** devices on 01.org.
 
 Download the latest QuickAssist Technology Driver from `01.org
 <https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_
@@ -265,7 +268,7 @@ You should see output similar to::
     3d:00.0 Co-processor: Intel Corporation Device 37c8
     3f:00.0 Co-processor: Intel Corporation Device 37c8
 
-For each c62x device there are 3 PFs. 
+For each c62x device there are 3 PFs.
 Using the sysfs, for each PF, enable the 16 VFs::
 
     echo 16 > /sys/bus/pci/drivers/c6xx/0000\:1a\:00.0/sriov_numvfs
@@ -276,6 +279,48 @@ To verify that the VFs are available for use - use ``lspci -d:37c9`` to confirm
 the bdf of the 48 VF devices are available per ``C62x`` device.
 
 To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
+
+For **Intel QuickAssist Technology C3xxx**:
+Assuming you are running on at least a 4.5 kernel, you can use the stock kernel.org QAT
+driver to start the QAT hardware.
+
+The steps below assume you are:
+
+* Running DPDK on a platform with one ``C3xxx`` device.
+* On a kernel at least version 4.5.
+
+In BIOS ensure that SRIOV is enabled and VT-d is disabled.
+
+Ensure the QAT driver is loaded on your system, by executing::
+
+    lsmod | grep qat
+
+You should see the following output::
+
+    qat_c3xxx               16384  0
+    intel_qat             122880  1 qat_c3xxx
+
+Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
+
+First find the bdf of the physical function (PF) of the C3xxx device
+
+    lspci -d:19e2
+
+You should see output similar to::
+
+    01:00.0 Co-processor: Intel Corporation Device 19e2
+
+For c3xxx device there is 1 PFs.
+Using the sysfs, enable the 16 VFs::
+
+    echo 16 > /sys/bus/pci/drivers/c3xxx/0000\:01\:00.0/sriov_numvfs
+
+If you get an error, it's likely you're using a QAT kernel driver earlier than kernel 4.5.
+
+To verify that the VFs are available for use - use ``lspci -d:19e3`` to confirm
+the bdf of the 16 VF devices are available per ``C3xxx`` device.
+To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
+
 Binding the available VFs to the DPDK UIO driver
 ------------------------------------------------
 
@@ -321,3 +366,23 @@ if yours are different adjust the unbind command below::
    echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
 
 You can use ``lspci -vvd:37c9`` to confirm that all devices are now in use by igb_uio kernel driver.
+
+For **Intel(R) QuickAssist Technology C3xxx** device:
+The unbind command below assumes ``bdfs`` of ``01:01.00-01:02.07``,
+if yours are different adjust the unbind command below::
+
+   cd $RTE_SDK
+   modprobe uio
+   insmod ./build/kmod/igb_uio.ko
+
+   for device in $(seq 1 2); do \
+       for fn in $(seq 0 7); do \
+           echo -n 0000:01:0${device}.${fn} > \
+           /sys/bus/pci/devices/0000\:01\:0${device}.${fn}/driver/unbind; \
+
+       done; \
+   done
+
+   echo "8086 19e3" > /sys/bus/pci/drivers/igb_uio/new_id
+
+You can use ``lspci -vvd:19e3`` to confirm that all devices are now in use by igb_uio kernel driver.
diff --git a/drivers/crypto/qat/rte_qat_cryptodev.c b/drivers/crypto/qat/rte_qat_cryptodev.c
index e606eb5..eb929b5 100644
--- a/drivers/crypto/qat/rte_qat_cryptodev.c
+++ b/drivers/crypto/qat/rte_qat_cryptodev.c
@@ -74,6 +74,9 @@ static struct rte_pci_id pci_id_qat_map[] = {
 		{
 			RTE_PCI_DEVICE(0x8086, 0x37c9),
 		},
+		{
+			RTE_PCI_DEVICE(0x8086, 0x19e3),
+		},
 		{.device_id = 0},
 };
 
-- 
2.5.5

             reply	other threads:[~2016-08-26 12:27 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-26 12:27 Deepak Kumar Jain [this message]
2016-08-26 13:06 ` Trahe, Fiona
2016-09-07 18:07 ` De Lara Guarch, Pablo
2016-09-07 19:34   ` Jain, Deepak K
2016-09-14  9:56 ` [dpdk-dev] [PATCH v2] " Deepak Kumar Jain
2016-09-19 16:37   ` [dpdk-dev] [PATCH v3] " Deepak Kumar Jain
2016-09-20  0:01     ` De Lara Guarch, Pablo

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