From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: <3chas3@gmail.com> Received: from mail-yb0-f195.google.com (mail-yb0-f195.google.com [209.85.213.195]) by dpdk.org (Postfix) with ESMTP id 4F92F2C39 for ; Thu, 29 Sep 2016 12:20:55 +0200 (CEST) Received: by mail-yb0-f195.google.com with SMTP id z8so798661ybh.1 for ; Thu, 29 Sep 2016 03:20:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=HSHl85sfwoskoaLvXWRSZvSocRt0tfGiStvbeP2dVYk=; b=YO+Ym7XFMDDc4/Oh0C0kXhoyBjM+cRLXJk84HGuDLGSx88N8aJggPc3p531l7GyabU eVo91XxKARlTv+MXh97swZwWSfLX4tZ7ND0bTnI39bA2xyxZpwbxLAr65p5geTVZ8R/5 qXW7fvVyySUYRGgR5AttWP5QwpY4yqND5/CY/OlhswMJOxsX2tN8wEAFngIRKlRJQuB2 0qfTtMcTsgw10u6ZPLsnSc5m3/yPuzFMSKwNRKTjmcQNtViT2EZT6DrkSoyBlXvlVNRc 7E8163x3t2y7ZFsAkK8JnwY8dh8tfErjkizgvLexYM1BEegabkfUN48IglyQfBwh4Ij6 FvcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=HSHl85sfwoskoaLvXWRSZvSocRt0tfGiStvbeP2dVYk=; b=TkIF+IWqWN1hJR/UE5G8qMZtPhnB7cC7ObrlYcO+o/aEwHWqTTJIsoAxHYEGvC5gcY +bZ49JEH5/SA7V1LWTRYo/mpJP1TQNKD8LsVHhlwuqAe5og50TOYUwpvTKHvMaXjr2oE 2HuUywwel2eVjMD4jFjYOC7bivg1tBKjlAQ4zgap7lt872fbYDRR6v4kxvDLTpR2ILut Ars5tpUxj6Hnb/gfH3R7fx+uiz0RnIhw7vFGV3U6weRnH7hyHWj+NRUVNsvb+mw2dMz5 9nbLlhd6DR8/PQkjDFdVIz/I2+WOkDAFggI8kMswlvlVuzATuWLGT8eQFoJwWjIX34st fu+Q== X-Gm-Message-State: AA6/9RmlConxd6mVncLeu3Hbi96K2YdPP5hQN3Ayf8WLVWv5aAt00MXUWLEqxNCt0BfRjA== X-Received: by 10.37.11.5 with SMTP id 5mr342195ybl.95.1475144454694; Thu, 29 Sep 2016 03:20:54 -0700 (PDT) Received: from monolith.home (pool-96-231-205-104.washdc.fios.verizon.net. [96.231.205.104]) by smtp.gmail.com with ESMTPSA id z133sm5302430ywb.51.2016.09.29.03.20.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Sep 2016 03:20:54 -0700 (PDT) From: Chas Williams <3chas3@gmail.com> To: dev@dpdk.org Cc: harish.patil@qlogic.com, Chas Williams <3chas3@gmail.com> Date: Thu, 29 Sep 2016 06:20:40 -0400 Message-Id: <1475144449-22176-1-git-send-email-3chas3@gmail.com> X-Mailer: git-send-email 2.7.4 Subject: [dpdk-dev] [PATCH v2 01/10] bnx2x: Set cache line based on build configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 29 Sep 2016 10:20:55 -0000 Correctly hint the cache line size. Remove unused macros associated with the cache line size. Fixes: 540a211084a7 ("bnx2x: driver core") Signed-off-by: Chas Williams <3chas3@gmail.com> Acked-by: Harish Patil --- drivers/net/bnx2x/bnx2x.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index 78757a8..ed7c55f 100644 --- a/drivers/net/bnx2x/bnx2x.h +++ b/drivers/net/bnx2x/bnx2x.h @@ -304,10 +304,7 @@ struct bnx2x_device_type { /* TCP with Timestamp Option (32) + IPv6 (40) */ /* max supported alignment is 256 (8 shift) */ -#define BNX2X_RX_ALIGN_SHIFT 8 -/* FW uses 2 cache lines alignment for start packet and size */ -#define BNX2X_FW_RX_ALIGN_START (1 << BNX2X_RX_ALIGN_SHIFT) -#define BNX2X_FW_RX_ALIGN_END (1 << BNX2X_RX_ALIGN_SHIFT) +#define BNX2X_RX_ALIGN_SHIFT RTE_MAX(6, min(8, RTE_CACHE_LINE_SIZE_LOG2)) #define BNX2X_PXP_DRAM_ALIGN (BNX2X_RX_ALIGN_SHIFT - 5) -- 2.7.4