From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: <3chas3@gmail.com> Received: from mail-qt0-f194.google.com (mail-qt0-f194.google.com [209.85.216.194]) by dpdk.org (Postfix) with ESMTP id DFDB76CC3 for ; Wed, 12 Oct 2016 01:05:06 +0200 (CEST) Received: by mail-qt0-f194.google.com with SMTP id g49so1142892qtc.2 for ; Tue, 11 Oct 2016 16:05:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=HSHl85sfwoskoaLvXWRSZvSocRt0tfGiStvbeP2dVYk=; b=R1nlxSNU5r7eyqvgCZgrcGoxQQTL6Ec7vdfdGNjprQ87hfMoTPhyjjsy9++gZE0D9w AdGH64WW9Qp1UX5nsaUY9pSxSmkRWEh/ww3+uorU8IUQXlcRXBpXeSs0aw5dNhGUufF8 1k4Qg2ZfqvElZJh/DRq3KzFnFdU4NEr7g/+xQS9eOH6fhgLdcngHPa1MllPNc4erw0zF ZzZMFSwXQEuCV6OUu0bQUQuuBb3srw6ktmRQTEDxl/4O5YMfi/Q0G9E+jBk0OFFoA0jR 8EpL4wFhXNilwQ8jfJB2o6QfOt8QWBi2bikXLKelU2QQCfnneGQLd1JSyyRxN8xC/F56 RV6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=HSHl85sfwoskoaLvXWRSZvSocRt0tfGiStvbeP2dVYk=; b=U9TOIRkhdTsxceT7O/jRlPEODZujxCQNE0jNvTIdgqfRAcWzkoXLADuEmLgX6X3++A NFi+aCezkXuD5MS2MghFY/IFbKjrp1bbUGbqU+IS6KD0NyohEcQPTsf77MrTzW6TxA/m d/PrdAq537HPVEhe2/YmncPte44l+ZeKOBYc18pH2ZlBEd6MzRZyQpppPr8527FWXs2o BdauzdRJjsMkNzTapd42z7m1u1NlZVjAjFa/NhBL9FudGybOIxXn+6H1HYPyU+aq2VUW vj1/+O7prrQEcjuRZVz+uEy/c9yL1BRDqaq+1fUDX6i3/K7o7/Gj4eaZYL4A+f5bLPj6 PyvQ== X-Gm-Message-State: AA6/9RmjGOlpIApLsEbK+JiLiOMwmQD6sObV13nSsB8qw0LFfB+D46GvxGSZoYMYJIyorA== X-Received: by 10.237.36.93 with SMTP id s29mr5993368qtc.134.1476227106439; Tue, 11 Oct 2016 16:05:06 -0700 (PDT) Received: from monolith.home (pool-96-255-41-157.washdc.fios.verizon.net. [96.255.41.157]) by smtp.gmail.com with ESMTPSA id u129sm1863194qkf.25.2016.10.11.16.05.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 11 Oct 2016 16:05:05 -0700 (PDT) From: Chas Williams <3chas3@gmail.com> To: dev@dpdk.org Cc: harish.patil@qlogic.com, Chas Williams <3chas3@gmail.com> Date: Tue, 11 Oct 2016 19:04:52 -0400 Message-Id: <1476227101-19268-1-git-send-email-3chas3@gmail.com> X-Mailer: git-send-email 2.7.4 Subject: [dpdk-dev] [PATCH v3 01/10] net/bnx2x: set cache line based on build configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 11 Oct 2016 23:05:07 -0000 Correctly hint the cache line size. Remove unused macros associated with the cache line size. Fixes: 540a211084a7 ("bnx2x: driver core") Signed-off-by: Chas Williams <3chas3@gmail.com> Acked-by: Harish Patil --- drivers/net/bnx2x/bnx2x.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index 78757a8..ed7c55f 100644 --- a/drivers/net/bnx2x/bnx2x.h +++ b/drivers/net/bnx2x/bnx2x.h @@ -304,10 +304,7 @@ struct bnx2x_device_type { /* TCP with Timestamp Option (32) + IPv6 (40) */ /* max supported alignment is 256 (8 shift) */ -#define BNX2X_RX_ALIGN_SHIFT 8 -/* FW uses 2 cache lines alignment for start packet and size */ -#define BNX2X_FW_RX_ALIGN_START (1 << BNX2X_RX_ALIGN_SHIFT) -#define BNX2X_FW_RX_ALIGN_END (1 << BNX2X_RX_ALIGN_SHIFT) +#define BNX2X_RX_ALIGN_SHIFT RTE_MAX(6, min(8, RTE_CACHE_LINE_SIZE_LOG2)) #define BNX2X_PXP_DRAM_ALIGN (BNX2X_RX_ALIGN_SHIFT - 5) -- 2.7.4