From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) by dpdk.org (Postfix) with ESMTP id 78F6D7F00 for ; Wed, 19 Oct 2016 16:07:33 +0200 (CEST) Received: from eucas1p2.samsung.com (unknown [182.198.249.207]) by mailout1.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0OFA007RISKJO530@mailout1.w1.samsung.com> for dev@dpdk.org; Wed, 19 Oct 2016 15:07:31 +0100 (BST) Received: from eusmges2.samsung.com (unknown [203.254.199.241]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20161019140731eucas1p27b14eef7962e2edf84a0953fb7601bfe~_9An1i23T1980919809eucas1p24; Wed, 19 Oct 2016 14:07:31 +0000 (GMT) Received: from eucas1p1.samsung.com ( [182.198.249.206]) by eusmges2.samsung.com (EUCPMTA) with SMTP id 82.0A.02283.32E77085; Wed, 19 Oct 2016 15:07:31 +0100 (BST) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20161019140730eucas1p2b1cf9daba45bdbf915bb69b24a0a850f~_9AnJlylv1983519835eucas1p28; Wed, 19 Oct 2016 14:07:30 +0000 (GMT) X-AuditID: cbfec7f1-f79f46d0000008eb-16-58077e23138c Received: from eusync2.samsung.com ( [203.254.199.212]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 07.53.07726.11E77085; Wed, 19 Oct 2016 15:07:13 +0100 (BST) Received: from imaximets.rnd.samsung.ru ([106.109.129.180]) by eusync2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OFA00CONSK71Q80@eusync2.samsung.com>; Wed, 19 Oct 2016 15:07:30 +0100 (BST) From: Ilya Maximets To: dev@dpdk.org, Helin Zhang , Konstantin Ananyev , Jingjing Wu Cc: Dyasly Sergey , Heetae Ahn , Bruce Richardson , Ilya Maximets Date: Wed, 19 Oct 2016 17:07:16 +0300 Message-id: <1476886037-4586-2-git-send-email-i.maximets@samsung.com> X-Mailer: git-send-email 2.7.4 In-reply-to: <1476886037-4586-1-git-send-email-i.maximets@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrMIsWRmVeSWpSXmKPExsWy7djPc7rKdewRBj/auC1urLK3ePdpO5PF tM+32S2mXNvOaHGl/Se7xcwFnxkt3v9ZxGIxebaUA4fHrwVLWT0W73nJ5NG3ZRVjAHMUl01K ak5mWWqRvl0CV8b6zrVsBWeFKn61NLE3MC7g72Lk5JAQMJE4caCfDcIWk7hwbz2YLSSwlFHi +OFiCPszo0T7N0GY+revbwDVcAHFlzFKdEyeAOU0M0l8ffGfFaSKTUBH4tTqI4wgCRGBfkaJ 2QsOM4M4zAKrGCV2HFnJDlIlLBAg8fTnLLB9LAKqEpOaF7GA2LwCrhLHbm9ihdgnJ3HzXCdQ MwcHp4CbxKp7mSBzJARes0nM7n/HChKXEJCV2HSAGaLcReLdjdtQrcISr45vYYewZSQ6Ow4y QdjVEhO3trFDzGlhlFg48QdUg73EqZtXwYqYBfgkJm2bzgwxn1eio00IosRDon3pDUYI21Fi z5YNLBDfz2SUeNh8lXUCo8wCRoZVjCKppcW56anFRnrFibnFpXnpesn5uZsYgVF7+t/xjzsY 35+wOsQowMGoxMPLUcUeIcSaWFZcmXuIUYKDWUmEl7MCKMSbklhZlVqUH19UmpNafIhRmoNF SZx3z4Ir4UIC6YklqdmpqQWpRTBZJg5OqQZGgfX7bgn5CXQ1Zj/s4WZ+e+I8w27edW8bm1/9 ylgyvSRbscWfReKopdCtNNtOpsWiwZzd045cfJC4vMNGTvGDPeeiC39K5iR4aaR/9daZnJT4 fZaRmoSE5fanhy719e6Zk3joyFG95La7U51SuTQvNApveiLx6cztzH1pQdNtt+zMu9DXUGen xFKckWioxVxUnAgAMWcNWNYCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrCLMWRmVeSWpSXmKPExsVy+t/xK7qCdewRBveXWFncWGVv8e7TdiaL aZ9vs1tMubad0eJK+092i5kLPjNavP+ziMVi8mwpBw6PXwuWsnos3vOSyaNvyyrGAOYoN5uM 1MSU1CKF1Lzk/JTMvHRbpdAQN10LJYW8xNxUW6UIXd+QICWFssScUiDPyAANODgHuAcr6dsl uGWs71zLVnBWqOJXSxN7A+MC/i5GTg4JAROJt69vsEHYYhIX7q0Hsrk4hASWMEo8//GYBcJp ZZLY1n+bFaSKTUBH4tTqI4wgCRGBiYwS028sZwdxmAXWMEocafoMViUs4CexdeVvFhCbRUBV YlLzIjCbV8BV4tjtTawQ++Qkbp7rZO5i5ODgFHCTWHUvEyQsBFTS0b6OdQIj7wJGhlWMIqml xbnpucWGesWJucWleel6yfm5mxiBIbzt2M/NOxgvbQw+xCjAwajEw8tRxR4hxJpYVlyZe4hR goNZSYSXswIoxJuSWFmVWpQfX1Sak1p8iNEU6KaJzFKiyfnA+MoriTc0MTS3NDQytrAwNzJS Euct+XAlXEggPbEkNTs1tSC1CKaPiYNTqoGRf0rAqu6u4L/ySd49IufOaC203i4jrqd3Im3x NqPru6debn2v0Sq794JtsE6FOl/jG6O6aS97p53r3288QajC4O7ed6mK5TXzJpy4HOJ13nV/ p+DnP2sXNUzJK1LzEH68vUuHk9e/UiwoaVZ1656gug6ZsA8xFyvPHi9jNxWoZt1mId5bw6bE UpyRaKjFXFScCABF5sI7dwIAAA== X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20161019140730eucas1p2b1cf9daba45bdbf915bb69b24a0a850f X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?SWx5YSBNYXhpbWV0cxtTUlItVmlydHVhbGl6YXRpb24gTGFi?= =?UTF-8?B?G+yCvOyEseyghOyekBtFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?SWx5YSBNYXhpbWV0cxtTUlItVmlydHVhbGl6YXRpb24gTGFi?= =?UTF-8?B?G1NhbXN1bmcgRWxlY3Ryb25pY3MbRW5naW5lZXI=?= X-Sender-Code: =?UTF-8?B?QzEwG0NJU0hRG0MxMEdEMDFHRDAxMDE1NA==?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20161019140730eucas1p2b1cf9daba45bdbf915bb69b24a0a850f X-RootMTR: 20161019140730eucas1p2b1cf9daba45bdbf915bb69b24a0a850f References: <1476886037-4586-1-git-send-email-i.maximets@samsung.com> Subject: [dpdk-dev] [PATCH RFC 1/2] net/i40e: allow bulk alloc for the max size desc ring X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 19 Oct 2016 14:07:33 -0000 The only reason why bulk alloc disabled for the rings with more than (I40E_MAX_RING_DESC - RTE_PMD_I40E_RX_MAX_BURST) descriptors is the possible out-of-bound access to the dma memory. But it's the artificial limit and can be easily avoided by allocating of RTE_PMD_I40E_RX_MAX_BURST more descriptors in memory. This will not interfere the HW and, as soon as all rings' memory zeroized, Rx functions will work correctly. This change allows to use vectorized Rx functions with 4096 descriptors in Rx ring which is important to achieve zero packet drop rate in high-load installations. Signed-off-by: Ilya Maximets --- drivers/net/i40e/i40e_rxtx.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index 7ae7d9f..1f76691 100644 --- a/drivers/net/i40e/i40e_rxtx.c +++ b/drivers/net/i40e/i40e_rxtx.c @@ -409,15 +409,6 @@ check_rx_burst_bulk_alloc_preconditions(__rte_unused struct i40e_rx_queue *rxq) "rxq->rx_free_thresh=%d", rxq->nb_rx_desc, rxq->rx_free_thresh); ret = -EINVAL; - } else if (!(rxq->nb_rx_desc < (I40E_MAX_RING_DESC - - RTE_PMD_I40E_RX_MAX_BURST))) { - PMD_INIT_LOG(DEBUG, "Rx Burst Bulk Alloc Preconditions: " - "rxq->nb_rx_desc=%d, " - "I40E_MAX_RING_DESC=%d, " - "RTE_PMD_I40E_RX_MAX_BURST=%d", - rxq->nb_rx_desc, I40E_MAX_RING_DESC, - RTE_PMD_I40E_RX_MAX_BURST); - ret = -EINVAL; } #else ret = -EINVAL; @@ -1698,8 +1689,19 @@ i40e_dev_rx_queue_setup(struct rte_eth_dev *dev, rxq->rx_deferred_start = rx_conf->rx_deferred_start; /* Allocate the maximun number of RX ring hardware descriptor. */ - ring_size = sizeof(union i40e_rx_desc) * I40E_MAX_RING_DESC; - ring_size = RTE_ALIGN(ring_size, I40E_DMA_MEM_ALIGN); + len = I40E_MAX_RING_DESC; + +#ifdef RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC + /** + * Allocating a little more memory because vectorized/bulk_alloc Rx + * functions doesn't check boundaries each time. + */ + len += RTE_PMD_I40E_RX_MAX_BURST; +#endif + + ring_size = RTE_ALIGN(len * sizeof(union i40e_rx_desc), + I40E_DMA_MEM_ALIGN); + rz = rte_eth_dma_zone_reserve(dev, "rx_ring", queue_idx, ring_size, I40E_RING_BASE_ALIGN, socket_id); if (!rz) { -- 2.7.4