From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E53E5A0A0E; Tue, 11 May 2021 13:08:58 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5ECAD40140; Tue, 11 May 2021 13:08:58 +0200 (CEST) Received: from szxga07-in.huawei.com (szxga07-in.huawei.com [45.249.212.35]) by mails.dpdk.org (Postfix) with ESMTP id 570E54003E for ; Tue, 11 May 2021 13:08:56 +0200 (CEST) Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4FfZq92yrlzCrBk; Tue, 11 May 2021 19:06:13 +0800 (CST) Received: from [127.0.0.1] (10.40.190.165) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.498.0; Tue, 11 May 2021 19:08:49 +0800 To: Slava Ovsiienko , NBU-Contact-Thomas Monjalon , "ferruh.yigit@intel.com" CC: "dev@dpdk.org" References: <1620648363-31769-1-git-send-email-fengchengwen@huawei.com> <1620648363-31769-2-git-send-email-fengchengwen@huawei.com> From: fengchengwen Message-ID: <1481eb69-6ff6-4575-6640-b511bb82b6f7@huawei.com> Date: Tue, 11 May 2021 19:08:49 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.40.190.165] X-CFilter-Loop: Reflected Subject: Re: [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly placed X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 2021/5/11 17:23, Slava Ovsiienko wrote: >> -----Original Message----- >> From: dev On Behalf Of Chengwen Feng >> Sent: Monday, May 10, 2021 15:06 >> To: NBU-Contact-Thomas Monjalon ; >> ferruh.yigit@intel.com >> Cc: dev@dpdk.org >> Subject: [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly >> placed >> >> The memory barrier is used to ensure that the response is returned only >> after the Tx/Rx function is set, it should place after the Rx/Tx function is set. >> >> Fixes: 0203d33a1059 ("net/mlx4: support secondary process") >> Cc: stable@dpdk.org >> >> Signed-off-by: Chengwen Feng > Acked-by: Viacheslav Ovsiienko > > > Hi, Chengwen > > Nice catch, thank you for the patches. > Just out of curiosity - did we meet the real issue with this ineffective barrier? > > With best regards, > Slava > Hi, Slava It's just a theoretical analysis that's possible, I think it should never happen in practice. We found this problem when checking the memory barrier of the hns3 driver (ps: the implementation of hns3 mp is somewhat similar to that of mlx), this memory barrier got us a little confused, so we fix it to make it just less confusing. Best Regards >> --- >> drivers/net/mlx4/mlx4_mp.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/net/mlx4/mlx4_mp.c b/drivers/net/mlx4/mlx4_mp.c >> index ddf7bdb..8fcfb54 100644 >> --- a/drivers/net/mlx4/mlx4_mp.c >> +++ b/drivers/net/mlx4/mlx4_mp.c >> @@ -126,7 +126,6 @@ mp_secondary_handle(const struct rte_mp_msg >> *mp_msg, const void *peer) >> switch (param->type) { >> case MLX4_MP_REQ_START_RXTX: >> INFO("port %u starting datapath", dev->data->port_id); >> - rte_mb(); >> dev->tx_pkt_burst = mlx4_tx_burst; >> dev->rx_pkt_burst = mlx4_rx_burst; >> #ifdef HAVE_IBV_MLX4_UAR_MMAP_OFFSET >> @@ -144,6 +143,7 @@ mp_secondary_handle(const struct rte_mp_msg >> *mp_msg, const void *peer) >> } >> } >> #endif >> + rte_mb(); >> mp_init_msg(dev, &mp_res, param->type); >> res->result = 0; >> ret = rte_mp_reply(&mp_res, peer); >> -- >> 2.8.1 > > > . >