From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id DF140379B for ; Sat, 18 Feb 2017 02:52:58 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from cmetcalf@mellanox.com) with ESMTPS (AES256-SHA encrypted); 18 Feb 2017 03:52:54 +0200 Received: from ld-1.internal.tilera.com (ld-1.internal.tilera.com [10.15.7.41]) by mtbu-labmail01.internal.tilera.com (8.14.4/8.14.4) with ESMTP id v1I1qrtu028008; Fri, 17 Feb 2017 20:52:53 -0500 Received: (from cmetcalf@localhost) by ld-1.internal.tilera.com (8.14.4/8.14.4/Submit) id v1I1qr7p009962; Fri, 17 Feb 2017 20:52:53 -0500 From: Chris Metcalf To: Thomas Monjalon , Vincent JARDIN , Bruce Richardson , Jerin Jacob , Liming Sun , Olga Shern , Yael Shenhav , dev@dpdk.org Cc: Chris Metcalf Date: Fri, 17 Feb 2017 20:52:27 -0500 Message-Id: <1487382749-9887-3-git-send-email-cmetcalf@mellanox.com> X-Mailer: git-send-email 2.7.2 In-Reply-To: <1487382749-9887-1-git-send-email-cmetcalf@mellanox.com> References: <1487382749-9887-1-git-send-email-cmetcalf@mellanox.com> X-Mailman-Approved-At: Sat, 18 Feb 2017 12:06:58 +0100 Subject: [dpdk-dev] [PATCH 2/4] tile: remove requirement for List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 18 Feb 2017 01:52:59 -0000 These headers are not part of the set that are upstreamed as part of glibc or the kernel, and we only need a few defines from each. The hardware is frozen so these values are not going to change in any case. Signed-off-by: Chris Metcalf --- drivers/net/mpipe/mpipe_tilegx.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/net/mpipe/mpipe_tilegx.c b/drivers/net/mpipe/mpipe_tilegx.c index 7bbd168bcb41..adba3306adbc 100644 --- a/drivers/net/mpipe/mpipe_tilegx.c +++ b/drivers/net/mpipe/mpipe_tilegx.c @@ -39,11 +39,20 @@ #include #include -#include -#include - #include +/* mPIPE GBE hardware register definitions. */ +#define MPIPE_GBE_NETWORK_CONFIGURATION 0x8008 +#define MPIPE_GBE_NETWORK_CONFIGURATION__COPY_ALL_SHIFT 4 +#define MPIPE_GBE_NETWORK_CONFIGURATION__MULTI_HASH_ENA_SHIFT 6 +#define MPIPE_GBE_NETWORK_CONFIGURATION__UNI_HASH_ENA_SHIFT 7 + +/* mPIPE XAUI hardware register definitions. */ +#define MPIPE_XAUI_RECEIVE_CONFIGURATION 0x8020 +#define MPIPE_XAUI_RECEIVE_CONFIGURATION__COPY_ALL_SHIFT 0 +#define MPIPE_XAUI_RECEIVE_CONFIGURATION__ENA_HASH_MULTI_SHIFT 2 +#define MPIPE_XAUI_RECEIVE_CONFIGURATION__ENA_HASH_UNI_SHIFT 3 + #ifdef RTE_LIBRTE_MPIPE_PMD_DEBUG #define PMD_DEBUG_RX(...) RTE_LOG(DEBUG, PMD, __VA_ARGS__) #define PMD_DEBUG_TX(...) RTE_LOG(DEBUG, PMD, __VA_ARGS__) -- 2.7.2