From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-0016ce01.pphosted.com (mx0b-0016ce01.pphosted.com [67.231.156.153]) by dpdk.org (Postfix) with ESMTP id 37602F963 for ; Mon, 27 Feb 2017 08:58:23 +0100 (CET) Received: from pps.filterd (m0085408.ppops.net [127.0.0.1]) by mx0b-0016ce01.pphosted.com (8.16.0.20/8.16.0.20) with SMTP id v1R7vqcr011247; Sun, 26 Feb 2017 23:58:21 -0800 Received: from avcashub1.qlogic.com ([198.186.0.117]) by mx0b-0016ce01.pphosted.com with ESMTP id 28ut281v2u-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Sun, 26 Feb 2017 23:58:21 -0800 Received: from avluser05.qlc.com (10.1.113.115) by qlc.com (10.1.4.192) with Microsoft SMTP Server id 14.3.235.1; Sun, 26 Feb 2017 23:58:21 -0800 Received: (from rmody@localhost) by avluser05.qlc.com (8.14.4/8.14.4/Submit) id v1R7wLYk010449; Sun, 26 Feb 2017 23:58:21 -0800 X-Authentication-Warning: avluser05.qlc.com: rmody set sender to rasesh.mody@cavium.com using -f From: Rasesh Mody To: CC: Rasesh Mody , Date: Sun, 26 Feb 2017 23:56:53 -0800 Message-ID: <1488182237-10247-38-git-send-email-rasesh.mody@cavium.com> X-Mailer: git-send-email 1.7.10.3 In-Reply-To: <1488182237-10247-1-git-send-email-rasesh.mody@cavium.com> References: <1488182237-10247-1-git-send-email-rasesh.mody@cavium.com> MIME-Version: 1.0 Content-Type: text/plain disclaimer: bypass X-Proofpoint-Virus-Version: vendor=nai engine=5800 definitions=8451 signatures=669242 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1702270081 Subject: [dpdk-dev] [PATCH 37/61] net/qede/base: remove clock slowdown option X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Feb 2017 07:58:24 -0000 Remove clock slowdown NVM config option as this is not supported for current chipsets. Signed-off-by: Rasesh Mody --- drivers/net/qede/base/nvm_cfg.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/net/qede/base/nvm_cfg.h b/drivers/net/qede/base/nvm_cfg.h index 4202337..4e58835 100644 --- a/drivers/net/qede/base/nvm_cfg.h +++ b/drivers/net/qede/base/nvm_cfg.h @@ -72,10 +72,12 @@ struct nvm_cfg1_glob { #define NVM_CFG1_GLOB_ENABLE_ATC_OFFSET 30 #define NVM_CFG1_GLOB_ENABLE_ATC_DISABLED 0x0 #define NVM_CFG1_GLOB_ENABLE_ATC_ENABLED 0x1 - #define NVM_CFG1_GLOB_CLOCK_SLOWDOWN_MASK 0x80000000 - #define NVM_CFG1_GLOB_CLOCK_SLOWDOWN_OFFSET 31 - #define NVM_CFG1_GLOB_CLOCK_SLOWDOWN_DISABLED 0x0 - #define NVM_CFG1_GLOB_CLOCK_SLOWDOWN_ENABLED 0x1 + #define NVM_CFG1_GLOB_RESERVED__M_WAS_CLOCK_SLOWDOWN_MASK \ + 0x80000000 + #define NVM_CFG1_GLOB_RESERVED__M_WAS_CLOCK_SLOWDOWN_OFFSET 31 + #define NVM_CFG1_GLOB_RESERVED__M_WAS_CLOCK_SLOWDOWN_DISABLED \ + 0x0 + #define NVM_CFG1_GLOB_RESERVED__M_WAS_CLOCK_SLOWDOWN_ENABLED 0x1 u32 engineering_change[3]; /* 0x4 */ u32 manufacturing_id; /* 0x10 */ u32 serial_number[4]; /* 0x14 */ -- 1.7.10.3