From: Beilei Xing <beilei.xing@intel.com>
To: jingjing.wu@intel.com
Cc: helin.zhang@intel.com, bernard.iremonger@intel.com, dev@dpdk.org
Subject: [dpdk-dev] [PATCH v3 4/4] net/i40e: enable tunnel filter for MPLS
Date: Tue, 28 Mar 2017 14:40:08 +0800 [thread overview]
Message-ID: <1490683208-38096-5-git-send-email-beilei.xing@intel.com> (raw)
In-Reply-To: <1490683208-38096-1-git-send-email-beilei.xing@intel.com>
This patch enables MPLS tunnel filter by replacing
inner_mac filter.
This configuration will be set when adding MPLSoUDP
and MPLSoGRE filter rules, and it will be invalid
only by NIC core reset.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
---
drivers/net/i40e/i40e_ethdev.c | 75 ++++++++++++++++++++++++----
drivers/net/i40e/i40e_ethdev.h | 10 ++++
drivers/net/i40e/i40e_flow.c | 111 ++++++++++++++++++++++++++++++++++++++++-
3 files changed, 185 insertions(+), 11 deletions(-)
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 8f6d2d2..54f33d9 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -6945,6 +6945,8 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,
struct i40e_tunnel_rule *tunnel_rule = &pf->tunnel;
struct i40e_tunnel_filter *tunnel, *node;
struct i40e_tunnel_filter check_filter; /* Check if filter exists */
+ uint32_t teid_le;
+ bool big_buffer = 0;
cld_filter = rte_zmalloc("tunnel_filter",
sizeof(struct i40e_aqc_add_rm_cloud_filt_elem_ext),
@@ -6992,6 +6994,32 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,
case I40E_TUNNEL_TYPE_IP_IN_GRE:
tun_type = I40E_AQC_ADD_CLOUD_TNL_TYPE_IP;
break;
+ case I40E_TUNNEL_TYPE_MPLSoUDP:
+ i40e_replace_mpls_l1_filter(pf);
+ i40e_replace_mpls_cloud_filter(pf);
+ teid_le = rte_cpu_to_le_32(tunnel_filter->tenant_id);
+ pfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD0] =
+ teid_le >> 4;
+ pfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD1] =
+ (teid_le & 0xF) << 12;
+ pfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD2] =
+ 0x40;
+ big_buffer = 1;
+ tun_type = I40E_AQC_ADD_CLOUD_TNL_TYPE_MPLSoUDP;
+ break;
+ case I40E_TUNNEL_TYPE_MPLSoGRE:
+ i40e_replace_mpls_l1_filter(pf);
+ i40e_replace_mpls_cloud_filter(pf);
+ teid_le = rte_cpu_to_le_32(tunnel_filter->tenant_id);
+ pfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD0] =
+ teid_le >> 4;
+ pfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD1] =
+ (teid_le & 0xF) << 12;
+ pfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD2] =
+ 0x0;
+ big_buffer = 1;
+ tun_type = I40E_AQC_ADD_CLOUD_TNL_TYPE_MPLSoGRE;
+ break;
default:
/* Other tunnel types is not supported. */
PMD_DRV_LOG(ERR, "tunnel type is not supported.");
@@ -6999,11 +7027,19 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,
return -EINVAL;
}
- val = i40e_dev_get_filter_type(tunnel_filter->filter_type,
- &pfilter->element.flags);
- if (val < 0) {
- rte_free(cld_filter);
- return -EINVAL;
+ if (tunnel_filter->tunnel_type == I40E_TUNNEL_TYPE_MPLSoUDP)
+ pfilter->element.flags =
+ I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP;
+ else if (tunnel_filter->tunnel_type == I40E_TUNNEL_TYPE_MPLSoGRE)
+ pfilter->element.flags =
+ I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE;
+ else {
+ val = i40e_dev_get_filter_type(tunnel_filter->filter_type,
+ &pfilter->element.flags);
+ if (val < 0) {
+ rte_free(cld_filter);
+ return -EINVAL;
+ }
}
pfilter->element.flags |= rte_cpu_to_le_16(
@@ -7039,7 +7075,11 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,
}
if (add) {
- ret = i40e_aq_add_cloud_filters(hw,
+ if (big_buffer)
+ ret = i40e_aq_add_cloud_filters_big_buffer(hw,
+ vsi->seid, cld_filter, 1);
+ else
+ ret = i40e_aq_add_cloud_filters(hw,
vsi->seid, &cld_filter->element, 1);
if (ret < 0) {
PMD_DRV_LOG(ERR, "Failed to add a tunnel filter.");
@@ -7049,7 +7089,11 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,
rte_memcpy(tunnel, &check_filter, sizeof(check_filter));
ret = i40e_sw_tunnel_filter_insert(pf, tunnel);
} else {
- ret = i40e_aq_remove_cloud_filters(hw, vsi->seid,
+ if (big_buffer)
+ ret = i40e_aq_remove_cloud_filters_big_buffer(
+ hw, vsi->seid, cld_filter, 1);
+ else
+ ret = i40e_aq_remove_cloud_filters(hw, vsi->seid,
&cld_filter->element, 1);
if (ret < 0) {
PMD_DRV_LOG(ERR, "Failed to delete a tunnel filter.");
@@ -10435,6 +10479,7 @@ i40e_tunnel_filter_restore(struct i40e_pf *pf)
*tunnel_list = &pf->tunnel.tunnel_list;
struct i40e_tunnel_filter *f;
struct i40e_aqc_add_rm_cloud_filt_elem_ext cld_filter;
+ bool big_buffer = 0;
TAILQ_FOREACH(f, tunnel_list, rules) {
memset(&cld_filter, 0, sizeof(cld_filter));
@@ -10450,8 +10495,20 @@ i40e_tunnel_filter_restore(struct i40e_pf *pf)
f->input.general_fields,
sizeof(f->input.general_fields));
- i40e_aq_add_cloud_filters(hw, vsi->seid,
- &cld_filter.element, 1);
+ if (((f->input.flags &
+ I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP) ==
+ I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP) ||
+ ((f->input.flags &
+ I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE) ==
+ I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE))
+ big_buffer = 1;
+
+ if (big_buffer)
+ i40e_aq_add_cloud_filters_big_buffer(hw,
+ vsi->seid, &cld_filter, 1);
+ else
+ i40e_aq_add_cloud_filters(hw, vsi->seid,
+ &cld_filter.element, 1);
}
}
diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index 7cd80ff..738d238 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -500,6 +500,14 @@ struct i40e_ethertype_rule {
/* Tunnel filter number HW supports */
#define I40E_MAX_TUNNEL_FILTER_NUM 400
+#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD0 44
+#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD1 45
+#define I40E_AQC_ADD_CLOUD_TNL_TYPE_MPLSoUDP 8
+#define I40E_AQC_ADD_CLOUD_TNL_TYPE_MPLSoGRE 9
+#define I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP 0x11
+#define I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE 0x12
+#define I40E_AQC_ADD_L1_FILTER_TEID_MPLS 0x11
+
enum i40e_tunnel_iptype {
I40E_TUNNEL_IPTYPE_IPV4,
I40E_TUNNEL_IPTYPE_IPV6,
@@ -855,6 +863,8 @@ int i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,
struct i40e_tunnel_filter_conf *tunnel_filter,
uint8_t add);
int i40e_fdir_flush(struct rte_eth_dev *dev);
+enum i40e_status_code i40e_replace_mpls_l1_filter(struct i40e_pf *pf);
+enum i40e_status_code i40e_replace_mpls_cloud_filter(struct i40e_pf *pf);
#define I40E_DEV_TO_PCI(eth_dev) \
RTE_DEV_TO_PCI((eth_dev)->device)
diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
index c9b9b3b..be243e1 100644
--- a/drivers/net/i40e/i40e_flow.c
+++ b/drivers/net/i40e/i40e_flow.c
@@ -1964,6 +1964,7 @@ i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf,
struct i40e_aqc_add_rm_cloud_filt_elem_ext cld_filter;
struct i40e_tunnel_rule *tunnel_rule = &pf->tunnel;
struct i40e_tunnel_filter *node;
+ bool big_buffer = 0;
int ret = 0;
memset(&cld_filter, 0, sizeof(cld_filter));
@@ -1979,8 +1980,18 @@ i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf,
filter->input.general_fields,
sizeof(cld_filter.general_fields));
- ret = i40e_aq_remove_cloud_filters(hw, vsi->seid,
- &cld_filter.element, 1);
+ if (((filter->input.flags & I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP) ==
+ I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP) ||
+ ((filter->input.flags & I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE) ==
+ I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE))
+ big_buffer = 1;
+
+ if (big_buffer)
+ ret = i40e_aq_remove_cloud_filters_big_buffer(hw, vsi->seid,
+ &cld_filter, 1);
+ else
+ ret = i40e_aq_remove_cloud_filters(hw, vsi->seid,
+ &cld_filter.element, 1);
if (ret < 0)
return -ENOTSUP;
@@ -2113,3 +2124,99 @@ i40e_flow_flush_tunnel_filter(struct i40e_pf *pf)
return ret;
}
+
+enum
+i40e_status_code i40e_replace_mpls_l1_filter(struct i40e_pf *pf)
+{
+ struct i40e_aqc_replace_cloud_filters_cmd filter_replace;
+ struct i40e_aqc_replace_cloud_filters_cmd_buf filter_replace_buf;
+ struct i40e_hw *hw = I40E_PF_TO_HW(pf);
+ enum i40e_status_code status = I40E_SUCCESS;
+
+ memset(&filter_replace, 0,
+ sizeof(struct i40e_aqc_replace_cloud_filters_cmd));
+ memset(&filter_replace_buf, 0,
+ sizeof(struct i40e_aqc_replace_cloud_filters_cmd_buf));
+
+ /* create L1 filter */
+ filter_replace.old_filter_type =
+ I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_IMAC;
+ filter_replace.new_filter_type = I40E_AQC_ADD_L1_FILTER_TEID_MPLS;
+ filter_replace.tr_bit = 0xFF;
+
+ /* Prepare the buffer, 3 entries */
+ filter_replace_buf.data[0] =
+ I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD0;
+ filter_replace_buf.data[0] |=
+ I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;
+ filter_replace_buf.data[2] = 0xff;
+ filter_replace_buf.data[3] = 0xff;
+ filter_replace_buf.data[4] =
+ I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD1;
+ filter_replace_buf.data[4] |=
+ I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;
+ filter_replace_buf.data[7] = 0xf0;
+ filter_replace_buf.data[8] = 0x48;
+ filter_replace_buf.data[8] |=
+ I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;
+ filter_replace_buf.data[10] = 0x4c;
+ filter_replace_buf.data[11] = 0x8c;
+
+ status = i40e_aq_replace_cloud_filters(hw, &filter_replace,
+ &filter_replace_buf);
+ return status;
+}
+
+enum
+i40e_status_code i40e_replace_mpls_cloud_filter(struct i40e_pf *pf)
+{
+ struct i40e_aqc_replace_cloud_filters_cmd filter_replace;
+ struct i40e_aqc_replace_cloud_filters_cmd_buf filter_replace_buf;
+ struct i40e_hw *hw = I40E_PF_TO_HW(pf);
+ enum i40e_status_code status = I40E_SUCCESS;
+
+ /* For MPLSoUDP */
+ memset(&filter_replace, 0,
+ sizeof(struct i40e_aqc_replace_cloud_filters_cmd));
+ memset(&filter_replace_buf, 0,
+ sizeof(struct i40e_aqc_replace_cloud_filters_cmd_buf));
+ filter_replace.valid_flags = I40E_AQC_REPLACE_CLOUD_FILTER |
+ I40E_AQC_MIRROR_CLOUD_FILTER;
+ filter_replace.old_filter_type = I40E_AQC_ADD_CLOUD_FILTER_IIP;
+ filter_replace.new_filter_type =
+ I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP;
+ /* Prepare the buffer, 2 entries */
+ filter_replace_buf.data[0] = I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG;
+ filter_replace_buf.data[0] |=
+ I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;
+ filter_replace_buf.data[4] = I40E_AQC_ADD_L1_FILTER_TEID_MPLS;
+ filter_replace_buf.data[4] |=
+ I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;
+ status = i40e_aq_replace_cloud_filters(hw, &filter_replace,
+ &filter_replace_buf);
+ if (status < 0)
+ return status;
+
+ /* For MPLSoGRE */
+ memset(&filter_replace, 0,
+ sizeof(struct i40e_aqc_replace_cloud_filters_cmd));
+ memset(&filter_replace_buf, 0,
+ sizeof(struct i40e_aqc_replace_cloud_filters_cmd_buf));
+
+ filter_replace.valid_flags = I40E_AQC_REPLACE_CLOUD_FILTER |
+ I40E_AQC_MIRROR_CLOUD_FILTER;
+ filter_replace.old_filter_type = I40E_AQC_ADD_CLOUD_FILTER_IMAC;
+ filter_replace.new_filter_type =
+ I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE;
+ /* Prepare the buffer, 2 entries */
+ filter_replace_buf.data[0] = I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG;
+ filter_replace_buf.data[0] |=
+ I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;
+ filter_replace_buf.data[4] = I40E_AQC_ADD_L1_FILTER_TEID_MPLS;
+ filter_replace_buf.data[4] |=
+ I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;
+
+ status = i40e_aq_replace_cloud_filters(hw, &filter_replace,
+ &filter_replace_buf);
+ return status;
+}
--
2.5.5
next prev parent reply other threads:[~2017-03-28 6:41 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-03 9:43 [dpdk-dev] [PATCH 0/3] enable MPLS cloud filter Beilei Xing
2017-03-03 9:43 ` [dpdk-dev] [PATCH 1/3] app/testpmd: support MPLS for generic filter Beilei Xing
2017-03-03 11:09 ` Adrien Mazarguil
2017-03-06 2:39 ` Xing, Beilei
2017-03-03 9:43 ` [dpdk-dev] [PATCH 2/3] net/i40e: add MPLS parsing function Beilei Xing
2017-03-03 9:43 ` [dpdk-dev] [PATCH 3/3] net/i40e: enable cloud filter for MPLS Beilei Xing
2017-03-08 16:05 ` Ferruh Yigit
2017-03-09 3:57 ` Xing, Beilei
2017-03-09 11:13 ` Iremonger, Bernard
2017-03-09 11:39 ` Xing, Beilei
2017-03-09 11:53 ` Iremonger, Bernard
2017-03-09 12:06 ` Xing, Beilei
2017-03-09 13:48 ` Iremonger, Bernard
2017-03-23 10:57 ` [dpdk-dev] [PATCH v2 0/3] add support for MPLS tunnel filter Beilei Xing
2017-03-23 10:57 ` [dpdk-dev] [PATCH v2 1/3] app/testpmd: add support for MPLS and GRE items Beilei Xing
2017-03-23 19:39 ` Adrien Mazarguil
2017-03-24 2:17 ` Xing, Beilei
2017-03-24 10:00 ` Adrien Mazarguil
2017-03-23 10:57 ` [dpdk-dev] [PATCH v2 2/3] net/i40e: add MPLS parsing function Beilei Xing
2017-03-23 10:57 ` [dpdk-dev] [PATCH v2 3/3] net/i40e: enable tunnel filter for MPLS Beilei Xing
2017-03-28 6:40 ` [dpdk-dev] [PATCH v3 0/4] add support for MPLS tunnel filter Beilei Xing
2017-03-28 6:40 ` [dpdk-dev] [PATCH v3 1/4] ethdev: add MPLS and GRE items Beilei Xing
2017-03-28 12:28 ` Adrien Mazarguil
2017-03-28 6:40 ` [dpdk-dev] [PATCH v3 2/4] app/testpmd: add MPLS and GRE fields to flow command Beilei Xing
2017-03-28 12:29 ` Adrien Mazarguil
2017-03-28 6:40 ` [dpdk-dev] [PATCH v3 3/4] net/i40e: add MPLS parsing function Beilei Xing
2017-03-28 6:40 ` Beilei Xing [this message]
2017-03-30 4:07 ` [dpdk-dev] [PATCH v4 0/4] add support for MPLS tunnel filter Beilei Xing
2017-03-30 4:07 ` [dpdk-dev] [PATCH v4 1/4] ethdev: add MPLS and GRE items Beilei Xing
2017-03-30 4:07 ` [dpdk-dev] [PATCH v4 2/4] app/testpmd: add MPLS and GRE fields to flow command Beilei Xing
2017-03-30 4:07 ` [dpdk-dev] [PATCH v4 3/4] net/i40e: add MPLS parsing function Beilei Xing
2017-03-30 6:04 ` Wu, Jingjing
2017-03-30 6:35 ` Xing, Beilei
2017-03-30 4:07 ` [dpdk-dev] [PATCH v4 4/4] net/i40e: enable tunnel filter for MPLS Beilei Xing
2017-03-30 6:16 ` Wu, Jingjing
2017-03-30 6:20 ` Xing, Beilei
2017-03-30 6:56 ` [dpdk-dev] [PATCH v5 0/4] add support for MPLS tunnel filter Beilei Xing
2017-03-30 6:56 ` [dpdk-dev] [PATCH v5 1/4] ethdev: add MPLS and GRE items Beilei Xing
2017-03-30 6:56 ` [dpdk-dev] [PATCH v5 2/4] app/testpmd: add MPLS and GRE fields to flow command Beilei Xing
2017-03-30 6:56 ` [dpdk-dev] [PATCH v5 3/4] net/i40e: add MPLS parsing function Beilei Xing
2017-03-30 8:22 ` Wu, Jingjing
2017-03-30 6:56 ` [dpdk-dev] [PATCH v5 4/4] net/i40e: enable tunnel filter for MPLS Beilei Xing
2017-03-30 8:22 ` Wu, Jingjing
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