From: Nipun Gupta <nipun.gupta@nxp.com>
To: <dev@dpdk.org>
Cc: <hemant.agrawal@nxp.com>, <jerin.jacob@caviumnetworks.com>,
<harry.van.haaren@intel.com>, <bruce.richardson@intel.com>,
<gage.eads@intel.com>, <shreyansh.jain@nxp.com>,
Nipun Gupta <nipun.gupta@nxp.com>
Subject: [dpdk-dev] [PATCH 18/20] bus/fslmc: enable portal interrupt handling
Date: Thu, 25 May 2017 23:37:49 +0530 [thread overview]
Message-ID: <1495735671-4917-19-git-send-email-nipun.gupta@nxp.com> (raw)
In-Reply-To: <1495735671-4917-1-git-send-email-nipun.gupta@nxp.com>
Eventdev requires portal interrupts to handle timeout in the
event dequeue. This patch provides mechanism to enable the
portal interrupts.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 108 ++++++++++++++++++++-
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 3 +-
drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 30 ++++++
drivers/bus/fslmc/qbman/qbman_portal.c | 22 +++++
drivers/bus/fslmc/rte_bus_fslmc_version.map | 1 +
5 files changed, 158 insertions(+), 6 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index f88d490..babc2f9 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -46,6 +46,8 @@
#include <sys/stat.h>
#include <sys/mman.h>
#include <sys/syscall.h>
+#include <sys/epoll.h>
+#include<sys/eventfd.h>
#include <rte_mbuf.h>
#include <rte_ethdev.h>
@@ -102,6 +104,95 @@
return dpaa2_core_cluster_base + x;
}
+static void dpaa2_affine_dpio_intr_to_respective_core(int32_t dpio_id)
+{
+#define STRING_LEN 28
+#define COMMAND_LEN 50
+ uint32_t cpu_mask = 1;
+ int ret;
+ size_t len = 0;
+ char *temp = NULL, *token = NULL;
+ char string[STRING_LEN], command[COMMAND_LEN];
+ FILE *file;
+
+ snprintf(string, STRING_LEN, "dpio.%d", dpio_id);
+ file = fopen("/proc/interrupts", "r");
+ if (!file) {
+ PMD_DRV_LOG(WARN, "Failed to open /proc/interrupts file\n");
+ return;
+ }
+ while (getline(&temp, &len, file) != -1) {
+ if ((strstr(temp, string)) != NULL) {
+ token = strtok(temp, ":");
+ break;
+ }
+ }
+
+ if (!token) {
+ PMD_DRV_LOG(WARN, "Failed to get interrupt id for dpio.%d\n",
+ dpio_id);
+ if (temp)
+ free(temp);
+ fclose(file);
+ return;
+ }
+
+ cpu_mask = cpu_mask << rte_lcore_id();
+ snprintf(command, COMMAND_LEN, "echo %X > /proc/irq/%s/smp_affinity",
+ cpu_mask, token);
+ ret = system(command);
+ if (ret < 0)
+ PMD_DRV_LOG(WARN,
+ "Failed to affine interrupts on respective core\n");
+ else
+ PMD_DRV_LOG(WARN, " %s command is executed\n", command);
+
+ free(temp);
+ fclose(file);
+}
+
+static int dpaa2_dpio_intr_init(struct dpaa2_dpio_dev *dpio_dev)
+{
+ struct epoll_event epoll_ev;
+ int eventfd, dpio_epoll_fd, ret;
+ int threshold = 0x3, timeout = 0xFF;
+
+ dpio_epoll_fd = epoll_create(1);
+ ret = rte_dpaa2_intr_enable(&dpio_dev->intr_handle, 0);
+ if (ret) {
+ PMD_DRV_LOG(ERR, "Interrupt registeration failed\n");
+ return -1;
+ }
+
+ if (getenv("DPAA2_PORTAL_INTR_THRESHOLD"))
+ threshold = atoi(getenv("DPAA2_PORTAL_INTR_THRESHOLD"));
+
+ if (getenv("DPAA2_PORTAL_INTR_TIMEOUT"))
+ sscanf(getenv("DPAA2_PORTAL_INTR_TIMEOUT"), "%x", &timeout);
+
+ qbman_swp_interrupt_set_trigger(dpio_dev->sw_portal,
+ QBMAN_SWP_INTERRUPT_DQRI);
+ qbman_swp_interrupt_clear_status(dpio_dev->sw_portal, 0xffffffff);
+ qbman_swp_interrupt_set_inhibit(dpio_dev->sw_portal, 0);
+ qbman_swp_dqrr_thrshld_write(dpio_dev->sw_portal, threshold);
+ qbman_swp_intr_timeout_write(dpio_dev->sw_portal, timeout);
+
+ eventfd = dpio_dev->intr_handle.fd;
+ epoll_ev.events = EPOLLIN | EPOLLPRI | EPOLLET;
+ epoll_ev.data.fd = eventfd;
+
+ ret = epoll_ctl(dpio_epoll_fd, EPOLL_CTL_ADD, eventfd, &epoll_ev);
+ if (ret < 0) {
+ PMD_DRV_LOG(ERR, "epoll_ctl failed\n");
+ return -1;
+ }
+ dpio_dev->epoll_fd = dpio_epoll_fd;
+
+ dpaa2_affine_dpio_intr_to_respective_core(dpio_dev->hw_id);
+
+ return 0;
+}
+
static int
configure_dpio_qbman_swp(struct dpaa2_dpio_dev *dpio_dev)
{
@@ -201,6 +292,11 @@
return -1;
}
+ if (dpaa2_dpio_intr_init(dpio_dev)) {
+ PMD_DRV_LOG(ERR, "Interrupt registration failed for dpio\n");
+ return -1;
+ }
+
return 0;
}
@@ -325,6 +421,7 @@ struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id)
{
struct dpaa2_dpio_dev *dpio_dev;
struct vfio_region_info reg_info = { .argsz = sizeof(reg_info)};
+ int vfio_dev_fd;
if (obj_info->num_regions < NUM_DPIO_REGIONS) {
PMD_INIT_LOG(ERR, "ERROR, Not sufficient number "
@@ -352,13 +449,14 @@ struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id)
PMD_DRV_LOG(INFO, "\t Aloocated DPIO [%p]", dpio_dev);
dpio_dev->dpio = NULL;
dpio_dev->hw_id = object_id;
- dpio_dev->vfio_fd = vdev->fd;
+ dpio_dev->intr_handle.vfio_dev_fd = vdev->fd;
rte_atomic16_init(&dpio_dev->ref_count);
/* Using single portal for all devices */
dpio_dev->mc_portal = rte_mcp_ptr_list[MC_PORTAL_INDEX];
reg_info.index = 0;
- if (ioctl(dpio_dev->vfio_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
+ vfio_dev_fd = dpio_dev->intr_handle.vfio_dev_fd;
+ if (ioctl(vfio_dev_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
PMD_INIT_LOG(ERR, "vfio: error getting region info\n");
free(dpio_dev);
return -1;
@@ -369,7 +467,7 @@ struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id)
dpio_dev->ce_size = reg_info.size;
dpio_dev->qbman_portal_ce_paddr = (uint64_t)mmap(NULL, reg_info.size,
PROT_WRITE | PROT_READ, MAP_SHARED,
- dpio_dev->vfio_fd, reg_info.offset);
+ vfio_dev_fd, reg_info.offset);
/* Create Mapping for QBMan Cache Enabled area. This is a fix for
* SMMU fault for DQRR statshing transaction.
@@ -382,7 +480,7 @@ struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id)
}
reg_info.index = 1;
- if (ioctl(dpio_dev->vfio_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
+ if (ioctl(vfio_dev_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
PMD_INIT_LOG(ERR, "vfio: error getting region info\n");
free(dpio_dev);
return -1;
@@ -393,7 +491,7 @@ struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(int cpu_id)
dpio_dev->ci_size = reg_info.size;
dpio_dev->qbman_portal_ci_paddr = (uint64_t)mmap(NULL, reg_info.size,
PROT_WRITE | PROT_READ, MAP_SHARED,
- dpio_dev->vfio_fd, reg_info.offset);
+ vfio_dev_fd, reg_info.offset);
if (configure_dpio_qbman_swp(dpio_dev)) {
PMD_INIT_LOG(ERR,
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 119cf91..f1d7735 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -97,7 +97,8 @@ struct dpaa2_dpio_dev {
uintptr_t qbman_portal_ci_paddr;
/**< Physical address of Cache Inhibit Area */
uintptr_t ci_size; /**< Size of the CI region */
- int32_t vfio_fd; /**< File descriptor received via VFIO */
+ struct rte_intr_handle intr_handle; /* Interrupt related info */
+ int32_t epoll_fd; /**< File descriptor created for interrupt polling */
int32_t hw_id; /**< An unique ID of this DPIO device instance */
uint64_t dqrr_held;
uint8_t dqrr_size;
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
index 06bd063..9e9047e 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
@@ -124,6 +124,36 @@
void qbman_swp_interrupt_clear_status(struct qbman_swp *p, uint32_t mask);
/**
+ * qbman_swp_dqrr_thrshld_read_status() - Get the data in software portal
+ * DQRR interrupt threshold register.
+ * @p: the given software portal object.
+ */
+uint32_t qbman_swp_dqrr_thrshld_read_status(struct qbman_swp *p);
+
+/**
+ * qbman_swp_dqrr_thrshld_write() - Set the data in software portal
+ * DQRR interrupt threshold register.
+ * @p: the given software portal object.
+ * @mask: The value to set in SWP_DQRR_ITR register.
+ */
+void qbman_swp_dqrr_thrshld_write(struct qbman_swp *p, uint32_t mask);
+
+/**
+ * qbman_swp_intr_timeout_read_status() - Get the data in software portal
+ * Interrupt Time-Out period register.
+ * @p: the given software portal object.
+ */
+uint32_t qbman_swp_intr_timeout_read_status(struct qbman_swp *p);
+
+/**
+ * qbman_swp_intr_timeout_write() - Set the data in software portal
+ * Interrupt Time-Out period register.
+ * @p: the given software portal object.
+ * @mask: The value to set in SWP_ITPR register.
+ */
+void qbman_swp_intr_timeout_write(struct qbman_swp *p, uint32_t mask);
+
+/**
* qbman_swp_interrupt_get_trigger() - Get the data in software portal
* interrupt enable register.
* @p: the given software portal object.
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c
index e201a34..244c0cf 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -44,6 +44,8 @@
#define QBMAN_CINH_SWP_IER 0xe40
#define QBMAN_CINH_SWP_ISDR 0xe80
#define QBMAN_CINH_SWP_IIR 0xec0
+#define QBMAN_CINH_SWP_DQRR_ITR 0xa80
+#define QBMAN_CINH_SWP_ITPR 0xf40
/* CENA register offsets */
#define QBMAN_CENA_SWP_EQCR(n) (0x000 + ((uint32_t)(n) << 6))
@@ -218,6 +220,26 @@ void qbman_swp_interrupt_clear_status(struct qbman_swp *p, uint32_t mask)
qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_ISR, mask);
}
+uint32_t qbman_swp_dqrr_thrshld_read_status(struct qbman_swp *p)
+{
+ return qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_DQRR_ITR);
+}
+
+void qbman_swp_dqrr_thrshld_write(struct qbman_swp *p, uint32_t mask)
+{
+ qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_DQRR_ITR, mask);
+}
+
+uint32_t qbman_swp_intr_timeout_read_status(struct qbman_swp *p)
+{
+ return qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_ITPR);
+}
+
+void qbman_swp_intr_timeout_write(struct qbman_swp *p, uint32_t mask)
+{
+ qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_ITPR, mask);
+}
+
uint32_t qbman_swp_interrupt_get_trigger(struct qbman_swp *p)
{
return qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_IER);
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index 7dd28da..78671a8 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -67,6 +67,7 @@ DPDK_17.08 {
qbman_swp_dqrr_consume;
qbman_swp_dqrr_next;
qbman_swp_enqueue_multiple_eqdesc;
+ qbman_swp_interrupt_clear_status;
qbman_swp_push_set;
rte_dpaa2_alloc_dpci_dev;
rte_fslmc_object_register;
--
1.9.1
next prev parent reply other threads:[~2017-05-25 18:10 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-25 18:07 [dpdk-dev] [PATCH 00/20] next-eventdev: NXP DPAA2 eventdev PMD Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 01/20] event/dpaa2: add basic build infrastructure Nipun Gupta
2017-05-31 14:59 ` Jerin Jacob
2017-05-25 18:07 ` [dpdk-dev] [PATCH 02/20] bus/fslmc: generic framework for mc object creation Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 03/20] bus/fslmc: integrating dpio and dpbp to object framework Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 04/20] bus/fslmc: adding basic dpcon support Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 05/20] bus/fslmc: export qbman dqrr funcs for eventdev usages Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 06/20] event/dpaa2: register dpcon as dpaa2 device for bus scan Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 07/20] bus/fslmc: adding basic dpci support Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 08/20] bus/fslmc: register dpci as dpaa2 device for bus scan Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 09/20] bus/fslmc: adding cpu support in stashing config Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 10/20] event/dpaa2: add initialization of event device Nipun Gupta
2017-05-31 15:10 ` Jerin Jacob
2017-06-01 10:25 ` Nipun Gupta
2017-06-01 10:39 ` Jerin Jacob
2017-05-25 18:07 ` [dpdk-dev] [PATCH 11/20] bus/fslmc: add support for static dequeue from portal Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 12/20] event/dpaa2: add configuration functions Nipun Gupta
2017-05-31 15:20 ` Jerin Jacob
2017-05-31 15:29 ` Jerin Jacob
2017-06-01 11:39 ` Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 13/20] bus/fslmc: support enqueue with multiple enqueue descriptors Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 14/20] bus/fslmc: add callback per queue to enable Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 15/20] bus/fslmc: change func argument to const to avoid warning Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 16/20] event/dpaa2: add enqueue and dequeue functionality Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 17/20] fslmc/bus: add interrupt enabling routine Nipun Gupta
2017-05-25 18:07 ` Nipun Gupta [this message]
2017-05-25 18:07 ` [dpdk-dev] [PATCH 19/20] event/dpaa2: handle timeout using interrupts in dequeue Nipun Gupta
2017-05-31 15:49 ` Jerin Jacob
2017-06-01 11:42 ` Nipun Gupta
2017-05-25 18:07 ` [dpdk-dev] [PATCH 20/20] doc: add NXP DPAA2 EVENTDEV details Nipun Gupta
2017-05-31 15:58 ` Jerin Jacob
2017-06-01 12:07 ` Nipun Gupta
2017-05-31 14:50 ` [dpdk-dev] [PATCH 00/20] next-eventdev: NXP DPAA2 eventdev PMD Jerin Jacob
2017-05-31 16:17 ` Thomas Monjalon
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