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From: Tomasz Duszynski <tdu@semihalf.com>
To: dev@dpdk.org
Cc: mw@semihalf.com, dima@marvell.com, nsamsono@marvell.com,
 Tomasz Duszynski <tdu@semihalf.com>, Jacek Siuda <jck@semihalf.com>
Date: Tue, 26 Sep 2017 11:40:03 +0200
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Subject: [dpdk-dev] [PATCH 6/8] doc: add mrvl crypto pmd documentation
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Add documentation for the MRVL CRYPTO PMD driver.

Signed-off-by: Jacek Siuda <jck@semihalf.com>
Signed-off-by: Tomasz Duszynski <jck@semihalf.com>
---
 doc/guides/cryptodevs/features/mrvl.ini |  42 +++++++
 doc/guides/cryptodevs/index.rst         |   1 +
 doc/guides/cryptodevs/mrvl.rst          | 198 ++++++++++++++++++++++++++++++++
 3 files changed, 241 insertions(+)
 create mode 100644 doc/guides/cryptodevs/features/mrvl.ini
 create mode 100644 doc/guides/cryptodevs/mrvl.rst

diff --git a/doc/guides/cryptodevs/features/mrvl.ini b/doc/guides/cryptodevs/features/mrvl.ini
new file mode 100644
index 0000000..6d2fe6a
--- /dev/null
+++ b/doc/guides/cryptodevs/features/mrvl.ini
@@ -0,0 +1,42 @@
+; Supported features of the 'mrvl' crypto driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Symmetric crypto       = Y
+Sym operation chaining = Y
+
+;
+; Supported crypto algorithms of a default crypto driver.
+;
+[Cipher]
+AES CBC (128)  = Y
+AES CBC (192)  = Y
+AES CBC (256)  = Y
+AES CTR (128)  = Y
+AES CTR (192)  = Y
+AES CTR (256)  = Y
+3DES CBC       = Y
+3DES CTR       = Y
+
+;
+; Supported authentication algorithms of a default crypto driver.
+;
+[Auth]
+MD5          = Y
+MD5 HMAC     = Y
+SHA1         = Y
+SHA1 HMAC    = Y
+SHA256       = Y
+SHA256 HMAC  = Y
+SHA384       = Y
+SHA384 HMAC  = Y
+SHA512       = Y
+SHA512 HMAC  = Y
+AES GMAC     = Y
+
+;
+; Supported AEAD algorithms of a default crypto driver.
+;
+[AEAD]
+AES GCM (128) = Y
diff --git a/doc/guides/cryptodevs/index.rst b/doc/guides/cryptodevs/index.rst
index 361b82d..a8ee0eb 100644
--- a/doc/guides/cryptodevs/index.rst
+++ b/doc/guides/cryptodevs/index.rst
@@ -42,6 +42,7 @@ Crypto Device Drivers
     dpaa2_sec
     kasumi
     openssl
+    mrvl
     null
     scheduler
     snow3g
diff --git a/doc/guides/cryptodevs/mrvl.rst b/doc/guides/cryptodevs/mrvl.rst
new file mode 100644
index 0000000..f5a83dc
--- /dev/null
+++ b/doc/guides/cryptodevs/mrvl.rst
@@ -0,0 +1,198 @@
+..  BSD LICENSE
+    Copyright(c) 2017 Semihalf. All rights reserved.
+    All rights reserved.
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following conditions
+    are met:
+
+      * Redistributions of source code must retain the above copyright
+        notice, this list of conditions and the following disclaimer.
+      * Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in
+        the documentation and/or other materials provided with the
+        distribution.
+      * Neither the name of Semihalf nor the names of its
+        contributors may be used to endorse or promote products derived
+        from this software without specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+    OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+    LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+    DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+    THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+    OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+MRVL Crypto Poll Mode Driver
+============================
+
+The MRVL CRYPTO PMD (**librte_crypto_mrvl_pmd**) provides poll mode crypto driver
+support by utilizing MUSDK library, which provides cryptographic operations
+acceleration by using Security Acceleration Engine (EIP197) directly from
+user-space with minimum overhead and high performance.
+
+Features
+--------
+
+MRVL CRYPTO PMD has support for:
+
+* Symmetric crypto
+* Sym operation chaining
+* AES CBC (128)
+* AES CBC (192)
+* AES CBC (256)
+* AES CTR (128)
+* AES CTR (192)
+* AES CTR (256)
+* 3DES CBC
+* 3DES CTR
+* MD5
+* MD5 HMAC
+* SHA1
+* SHA1 HMAC
+* SHA256
+* SHA256 HMAC
+* SHA384
+* SHA384 HMAC
+* SHA512
+* SHA512 HMAC
+* AES GCM (128)
+
+Limitations
+-----------
+
+* Hardware only supports scenarios where ICV (digest buffer) is placed just
+  after the authenticated data. Other placement will result in error.
+
+Installation
+------------
+
+MRVL CRYPTO PMD driver compilation is disabled by default due to external dependencies.
+Currently there are two driver specific compilation options in
+``config/common_base`` available:
+
+- ``CONFIG_RTE_LIBRTE_MRVL_CRYPTO`` (default ``n``)
+
+    Toggle compilation of the librte_pmd_mrvl driver.
+
+- ``CONFIG_RTE_LIBRTE_MRVL_CRYPTO_DEBUG`` (default ``n``)
+
+    Toggle display of debugging messages.
+
+During compilation external MUSDK library, which provides direct access
+to Marvell's EIP197 cryptographic engine, is necessary. Library sources are
+available `here <https://github.com/MarvellEmbeddedProcessors/musdk-marvell/tree/musdk-armada-17.08>`_.
+
+Alternatively, prebuilt library can be downloaded from
+`Marvell Extranet <https://extranet.marvell.com>`_. Once approval has been
+granted, library can be found by typing ``musdk`` in the search box.
+
+For MUSDK library build instruction please refer to ``doc/musdk_get_started.txt``
+in library sources directory.
+
+Initialization
+--------------
+
+After successfully building MRVL CRYPTO PMD, the following modules need to be
+loaded:
+
+.. code-block:: console
+
+   insmod musdk_uio.ko
+   insmod mvpp2x_sysfs.ko
+   insmod mv_pp_uio.ko
+   insmod mv_sam_uio.ko
+   insmod crypto_safexcel.ko
+
+The following parameters (all optional) are exported by the driver:
+
+* max_nb_queue_pairs: maximum number of queue pairs in the device (8 by default).
+* max_nb_sessions: maximum number of sessions that can be created (2048 by default).
+* socket_id: socket on which to allocate the device resources on.
+
+l2fwd-crypto example application can be used to verify MRVL CRYPTO PMD
+operation:
+
+.. code-block:: console
+
+   ./l2fwd-crypto -c 0x3 --vdev=eth_mrvl,iface=eth0 --vdev=cryptodev_mrvl_pmd
+
+Example output:
+
+.. code-block:: console
+
+   [...]
+   PMD:   Max number of queue pairs = 8
+   PMD:   Max number of sessions = 2048
+   [ERROR] Dma object already exits.
+   [INFO] DMA buffers allocated for 2048 sessions (256 bytes)
+   Initializing port 0... [ERROR] [pp2_ppio_flush_vlan] routine not supported yet!
+   PMD: Failed to flush vlan list
+   [INFO] PORT: Port0 - link is up
+   [INFO] ---- GOP ID 0 configuration ----
+   [INFO] Port mode               : KR
+   [INFO] MAC status              : disabled
+   [INFO] Link status             : link up
+   [INFO] Port speed              : 10G
+   [INFO] Port duplex             : full
+   [INFO] Port: Egress enable tx_port_num=16 qmap=0x1
+   [INFO] PORT: Port0 - link is up
+   [INFO] ---- GOP ID 0 configuration ----
+   [INFO] Port mode               : KR
+   [INFO] MAC status              : disabled
+   [INFO] Link status             : link up
+   [INFO] Port speed              : 10G
+   [INFO] Port duplex             : full
+   [INFO] Port: Egress enable tx_port_num=16 qmap=0x1
+   [INFO] PORT: Port0 - link is down
+   [INFO] ---- GOP ID 0 configuration ----
+   [INFO] Port mode               : KR
+   [INFO] MAC status              : disabled
+   [INFO] Link status             : link down
+   [INFO] Port speed              : 10G
+   [INFO] Port duplex             : full
+   [INFO] Port: Egress enable tx_port_num=16 qmap=0x1
+   Port 0, MAC address: 00:50:43:02:21:20
+
+
+   Checking link statusdone
+   Port 0 Link Up - speed 0 Mbps - full-duplex
+   Lcore 0: RX port 0
+   [INFO] eip197: 0:0 registers: paddr: 0xf2880000, vaddr: 0x0x7f25480000
+   [INFO] DMA buffer (16448 bytes) for CDR #0 allocated: paddr = 0xb0525e00, \
+   vaddr = 0x7f21b24e00
+   [INFO] DMA buffer (16448 bytes) for RDR #0 allocated: paddr = 0xb0529f00, \
+   vaddr = 0x7f21b28f00
+   [INFO] DMA buffers allocated for 257 operations. Tokens - 256 bytes
+   Lcore 0: cryptodev 0
+   L2FWD: lcore 1 has nothing to do
+   L2FWD: entering main loop on lcore 0
+   L2FWD:  -- lcoreid=0 portid=0
+   L2FWD:  -- lcoreid=0 cryptoid=0
+   Options:-
+   nportmask: ffffffff
+   ports per lcore: 1
+   refresh period : 10000
+   single lcore mode: disabled
+   stats_printing: enabled
+   sessionless crypto: disabled
+
+   Crypto chain: Input --> Encrypt --> Auth generate --> Output
+
+   ---- Cipher information ---
+   Algorithm: aes-cbc
+   Cipher key: at [0x7f253cee80], len=16
+   00000000: C2 B1 90 57 16 32 A8 56 5A 16 CD A5 D1 24 64 C3 | ...W.2.VZ....$d.
+   IV: at [0x7f253cec80], len=16
+   00000000: F7 98 65 93 94 22 2C 8F A6 3C F1 F2 7C 88 FF 5D | ..e..",..<..|..]
+
+   ---- Authentication information ---
+   Algorithm: sha1-hmac
+   Auth key: at [0x7f253ced80], len=16
+   00000000: 8B 32 09 22 BF A7 AA 0D 0C 65 A3 2E 64 6E 74 44 | .2.".....e..dntD
+   AAD: at [0x7f253ceb80], len=
-- 
2.7.4