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From: Andrew Rybchenko <arybchenko@solarflare.com>
To: <dev@dpdk.org>
Cc: Mark Spender <mspender@solarflare.com>, <stable@dpdk.org>
Subject: [dpdk-dev] [PATCH 41/53] net/sfc/base: fix diagnostics support build without Siena
Date: Thu, 16 Nov 2017 08:04:29 +0000	[thread overview]
Message-ID: <1510819481-6809-42-git-send-email-arybchenko@solarflare.com> (raw)
In-Reply-To: <1510819481-6809-1-git-send-email-arybchenko@solarflare.com>

From: Mark Spender <mspender@solarflare.com>

The compilation failed because __efx_sram_pattern_fns was used in
efx_nic.c, but defined in efx_sram.c which is only needed when
supporting Siena.

To fix it move all the code using __efx_sram_pattern_fns into
Siena-specific files (except for the definition in efx_sram.c itself,
as that file only needs to be included in Siena-supporting builds
anyway).

The functions to test registers and tables are unlikely to apply to any
new hardware and so can be moved into Siena files. Since Huntington
such tests have been implemented in firmware.

Fixes: 7571c3168798 ("net/sfc/base: import diagnostics support")
Cc: stable@dpdk.org

Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_impl.h   |  26 -------
 drivers/net/sfc/base/efx_nic.c    | 133 ----------------------------------
 drivers/net/sfc/base/siena_impl.h |   9 +++
 drivers/net/sfc/base/siena_nic.c  | 148 ++++++++++++++++++++++++++++++++++++--
 4 files changed, 150 insertions(+), 166 deletions(-)

diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index 255a6af..fa976eb 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -1145,32 +1145,6 @@ efx_vpd_hunk_set(
 
 #endif	/* EFSYS_OPT_VPD */
 
-#if EFSYS_OPT_DIAG
-
-extern	efx_sram_pattern_fn_t	__efx_sram_pattern_fns[];
-
-typedef struct efx_register_set_s {
-	unsigned int		address;
-	unsigned int		step;
-	unsigned int		rows;
-	efx_oword_t		mask;
-} efx_register_set_t;
-
-extern	__checkReturn	efx_rc_t
-efx_nic_test_registers(
-	__in		efx_nic_t *enp,
-	__in		efx_register_set_t *rsp,
-	__in		size_t count);
-
-extern	__checkReturn	efx_rc_t
-efx_nic_test_tables(
-	__in		efx_nic_t *enp,
-	__in		efx_register_set_t *rsp,
-	__in		efx_pattern_type_t pattern,
-	__in		size_t count);
-
-#endif	/* EFSYS_OPT_DIAG */
-
 #if EFSYS_OPT_MCDI
 
 extern	__checkReturn		efx_rc_t
diff --git a/drivers/net/sfc/base/efx_nic.c b/drivers/net/sfc/base/efx_nic.c
index 4896619..65eed6e 100644
--- a/drivers/net/sfc/base/efx_nic.c
+++ b/drivers/net/sfc/base/efx_nic.c
@@ -689,139 +689,6 @@ efx_nic_register_test(
 	return (rc);
 }
 
-	__checkReturn	efx_rc_t
-efx_nic_test_registers(
-	__in		efx_nic_t *enp,
-	__in		efx_register_set_t *rsp,
-	__in		size_t count)
-{
-	unsigned int bit;
-	efx_oword_t original;
-	efx_oword_t reg;
-	efx_oword_t buf;
-	efx_rc_t rc;
-
-	while (count > 0) {
-		/* This function is only suitable for registers */
-		EFSYS_ASSERT(rsp->rows == 1);
-
-		/* bit sweep on and off */
-		EFSYS_BAR_READO(enp->en_esbp, rsp->address, &original,
-			    B_TRUE);
-		for (bit = 0; bit < 128; bit++) {
-			/* Is this bit in the mask? */
-			if (~(rsp->mask.eo_u32[bit >> 5]) & (1 << bit))
-				continue;
-
-			/* Test this bit can be set in isolation */
-			reg = original;
-			EFX_AND_OWORD(reg, rsp->mask);
-			EFX_SET_OWORD_BIT(reg, bit);
-
-			EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &reg,
-				    B_TRUE);
-			EFSYS_BAR_READO(enp->en_esbp, rsp->address, &buf,
-				    B_TRUE);
-
-			EFX_AND_OWORD(buf, rsp->mask);
-			if (memcmp(&reg, &buf, sizeof (reg))) {
-				rc = EIO;
-				goto fail1;
-			}
-
-			/* Test this bit can be cleared in isolation */
-			EFX_OR_OWORD(reg, rsp->mask);
-			EFX_CLEAR_OWORD_BIT(reg, bit);
-
-			EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &reg,
-				    B_TRUE);
-			EFSYS_BAR_READO(enp->en_esbp, rsp->address, &buf,
-				    B_TRUE);
-
-			EFX_AND_OWORD(buf, rsp->mask);
-			if (memcmp(&reg, &buf, sizeof (reg))) {
-				rc = EIO;
-				goto fail2;
-			}
-		}
-
-		/* Restore the old value */
-		EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &original,
-			    B_TRUE);
-
-		--count;
-		++rsp;
-	}
-
-	return (0);
-
-fail2:
-	EFSYS_PROBE(fail2);
-fail1:
-	EFSYS_PROBE1(fail1, efx_rc_t, rc);
-
-	/* Restore the old value */
-	EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &original, B_TRUE);
-
-	return (rc);
-}
-
-	__checkReturn	efx_rc_t
-efx_nic_test_tables(
-	__in		efx_nic_t *enp,
-	__in		efx_register_set_t *rsp,
-	__in		efx_pattern_type_t pattern,
-	__in		size_t count)
-{
-	efx_sram_pattern_fn_t func;
-	unsigned int index;
-	unsigned int address;
-	efx_oword_t reg;
-	efx_oword_t buf;
-	efx_rc_t rc;
-
-	EFSYS_ASSERT(pattern < EFX_PATTERN_NTYPES);
-	func = __efx_sram_pattern_fns[pattern];
-
-	while (count > 0) {
-		/* Write */
-		address = rsp->address;
-		for (index = 0; index < rsp->rows; ++index) {
-			func(2 * index + 0, B_FALSE, &reg.eo_qword[0]);
-			func(2 * index + 1, B_FALSE, &reg.eo_qword[1]);
-			EFX_AND_OWORD(reg, rsp->mask);
-			EFSYS_BAR_WRITEO(enp->en_esbp, address, &reg, B_TRUE);
-
-			address += rsp->step;
-		}
-
-		/* Read */
-		address = rsp->address;
-		for (index = 0; index < rsp->rows; ++index) {
-			func(2 * index + 0, B_FALSE, &reg.eo_qword[0]);
-			func(2 * index + 1, B_FALSE, &reg.eo_qword[1]);
-			EFX_AND_OWORD(reg, rsp->mask);
-			EFSYS_BAR_READO(enp->en_esbp, address, &buf, B_TRUE);
-			if (memcmp(&reg, &buf, sizeof (reg))) {
-				rc = EIO;
-				goto fail1;
-			}
-
-			address += rsp->step;
-		}
-
-		++rsp;
-		--count;
-	}
-
-	return (0);
-
-fail1:
-	EFSYS_PROBE1(fail1, efx_rc_t, rc);
-
-	return (rc);
-}
-
 #endif	/* EFSYS_OPT_DIAG */
 
 #if EFSYS_OPT_LOOPBACK
diff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h
index 654baa5..2e3d390 100644
--- a/drivers/net/sfc/base/siena_impl.h
+++ b/drivers/net/sfc/base/siena_impl.h
@@ -65,6 +65,15 @@ siena_nic_init(
 
 #if EFSYS_OPT_DIAG
 
+extern	efx_sram_pattern_fn_t	__efx_sram_pattern_fns[];
+
+typedef struct siena_register_set_s {
+	unsigned int		address;
+	unsigned int		step;
+	unsigned int		rows;
+	efx_oword_t		mask;
+} siena_register_set_t;
+
 extern	__checkReturn	efx_rc_t
 siena_nic_register_test(
 	__in		efx_nic_t *enp);
diff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c
index 5216cc6..f9cda34 100644
--- a/drivers/net/sfc/base/siena_nic.c
+++ b/drivers/net/sfc/base/siena_nic.c
@@ -457,7 +457,7 @@ siena_nic_unprobe(
 
 #if EFSYS_OPT_DIAG
 
-static efx_register_set_t __siena_registers[] = {
+static siena_register_set_t __siena_registers[] = {
 	{ FR_AZ_ADR_REGION_REG_OFST, 0, 1 },
 	{ FR_CZ_USR_EV_CFG_OFST, 0, 1 },
 	{ FR_AZ_RX_CFG_REG_OFST, 0, 1 },
@@ -489,7 +489,7 @@ static const uint32_t __siena_register_masks[] = {
 	0xFFFFFFFF, 0xFFFFFFFF, 0x00000007, 0x00000000
 };
 
-static efx_register_set_t __siena_tables[] = {
+static siena_register_set_t __siena_tables[] = {
 	{ FR_AZ_RX_FILTER_TBL0_OFST, FR_AZ_RX_FILTER_TBL0_STEP,
 	    FR_AZ_RX_FILTER_TBL0_ROWS },
 	{ FR_CZ_RX_MAC_FILTER_TBL0_OFST, FR_CZ_RX_MAC_FILTER_TBL0_STEP,
@@ -516,10 +516,144 @@ static const uint32_t __siena_table_masks[] = {
 };
 
 	__checkReturn	efx_rc_t
+siena_nic_test_registers(
+	__in		efx_nic_t *enp,
+	__in		siena_register_set_t *rsp,
+	__in		size_t count)
+{
+	unsigned int bit;
+	efx_oword_t original;
+	efx_oword_t reg;
+	efx_oword_t buf;
+	efx_rc_t rc;
+
+	while (count > 0) {
+		/* This function is only suitable for registers */
+		EFSYS_ASSERT(rsp->rows == 1);
+
+		/* bit sweep on and off */
+		EFSYS_BAR_READO(enp->en_esbp, rsp->address, &original,
+			    B_TRUE);
+		for (bit = 0; bit < 128; bit++) {
+			/* Is this bit in the mask? */
+			if (~(rsp->mask.eo_u32[bit >> 5]) & (1 << bit))
+				continue;
+
+			/* Test this bit can be set in isolation */
+			reg = original;
+			EFX_AND_OWORD(reg, rsp->mask);
+			EFX_SET_OWORD_BIT(reg, bit);
+
+			EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &reg,
+				    B_TRUE);
+			EFSYS_BAR_READO(enp->en_esbp, rsp->address, &buf,
+				    B_TRUE);
+
+			EFX_AND_OWORD(buf, rsp->mask);
+			if (memcmp(&reg, &buf, sizeof (reg))) {
+				rc = EIO;
+				goto fail1;
+			}
+
+			/* Test this bit can be cleared in isolation */
+			EFX_OR_OWORD(reg, rsp->mask);
+			EFX_CLEAR_OWORD_BIT(reg, bit);
+
+			EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &reg,
+				    B_TRUE);
+			EFSYS_BAR_READO(enp->en_esbp, rsp->address, &buf,
+				    B_TRUE);
+
+			EFX_AND_OWORD(buf, rsp->mask);
+			if (memcmp(&reg, &buf, sizeof (reg))) {
+				rc = EIO;
+				goto fail2;
+			}
+		}
+
+		/* Restore the old value */
+		EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &original,
+			    B_TRUE);
+
+		--count;
+		++rsp;
+	}
+
+	return (0);
+
+fail2:
+	EFSYS_PROBE(fail2);
+fail1:
+	EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+	/* Restore the old value */
+	EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &original, B_TRUE);
+
+	return (rc);
+}
+
+	__checkReturn	efx_rc_t
+siena_nic_test_tables(
+	__in		efx_nic_t *enp,
+	__in		siena_register_set_t *rsp,
+	__in		efx_pattern_type_t pattern,
+	__in		size_t count)
+{
+	efx_sram_pattern_fn_t func;
+	unsigned int index;
+	unsigned int address;
+	efx_oword_t reg;
+	efx_oword_t buf;
+	efx_rc_t rc;
+
+	EFSYS_ASSERT(pattern < EFX_PATTERN_NTYPES);
+	func = __efx_sram_pattern_fns[pattern];
+
+	while (count > 0) {
+		/* Write */
+		address = rsp->address;
+		for (index = 0; index < rsp->rows; ++index) {
+			func(2 * index + 0, B_FALSE, &reg.eo_qword[0]);
+			func(2 * index + 1, B_FALSE, &reg.eo_qword[1]);
+			EFX_AND_OWORD(reg, rsp->mask);
+			EFSYS_BAR_WRITEO(enp->en_esbp, address, &reg, B_TRUE);
+
+			address += rsp->step;
+		}
+
+		/* Read */
+		address = rsp->address;
+		for (index = 0; index < rsp->rows; ++index) {
+			func(2 * index + 0, B_FALSE, &reg.eo_qword[0]);
+			func(2 * index + 1, B_FALSE, &reg.eo_qword[1]);
+			EFX_AND_OWORD(reg, rsp->mask);
+			EFSYS_BAR_READO(enp->en_esbp, address, &buf, B_TRUE);
+			if (memcmp(&reg, &buf, sizeof (reg))) {
+				rc = EIO;
+				goto fail1;
+			}
+
+			address += rsp->step;
+		}
+
+		++rsp;
+		--count;
+	}
+
+	return (0);
+
+fail1:
+	EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+	return (rc);
+}
+
+
+	__checkReturn	efx_rc_t
 siena_nic_register_test(
 	__in		efx_nic_t *enp)
 {
-	efx_register_set_t *rsp;
+	siena_register_set_t *rsp;
 	const uint32_t *dwordp;
 	unsigned int nitems;
 	unsigned int count;
@@ -553,21 +687,21 @@ siena_nic_register_test(
 		rsp->mask.eo_u32[3] = *dwordp++;
 	}
 
-	if ((rc = efx_nic_test_registers(enp, __siena_registers,
+	if ((rc = siena_nic_test_registers(enp, __siena_registers,
 	    EFX_ARRAY_SIZE(__siena_registers))) != 0)
 		goto fail1;
 
-	if ((rc = efx_nic_test_tables(enp, __siena_tables,
+	if ((rc = siena_nic_test_tables(enp, __siena_tables,
 	    EFX_PATTERN_BYTE_ALTERNATE,
 	    EFX_ARRAY_SIZE(__siena_tables))) != 0)
 		goto fail2;
 
-	if ((rc = efx_nic_test_tables(enp, __siena_tables,
+	if ((rc = siena_nic_test_tables(enp, __siena_tables,
 	    EFX_PATTERN_BYTE_CHANGING,
 	    EFX_ARRAY_SIZE(__siena_tables))) != 0)
 		goto fail3;
 
-	if ((rc = efx_nic_test_tables(enp, __siena_tables,
+	if ((rc = siena_nic_test_tables(enp, __siena_tables,
 	    EFX_PATTERN_BIT_SWEEP, EFX_ARRAY_SIZE(__siena_tables))) != 0)
 		goto fail4;
 
-- 
2.7.4

  parent reply	other threads:[~2017-11-16  8:05 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-16  8:03 [dpdk-dev] [PATCH 00/53] net/sfc: base driver update Andrew Rybchenko
2017-11-16  8:03 ` [dpdk-dev] [PATCH 01/53] net/sfc/base: copy new header from firmwaresrc Andrew Rybchenko
2017-11-27 19:58   ` Ferruh Yigit
2017-11-29  9:49     ` Andrew Rybchenko
2017-11-27 19:58   ` Ferruh Yigit
2017-11-16  8:03 ` [dpdk-dev] [PATCH 02/53] net/sfc/base: do not use Tx desc push with TSO descriptors Andrew Rybchenko
2017-11-16  8:03 ` [dpdk-dev] [PATCH 03/53] net/sfc/base: fix result code in MCDI NVRAM update finish Andrew Rybchenko
2017-11-16  8:03 ` [dpdk-dev] [PATCH 04/53] net/sfc/base: simplify verify result handling Andrew Rybchenko
2017-11-16  8:03 ` [dpdk-dev] [PATCH 05/53] net/sfc/base: report verify result from RW finish callback Andrew Rybchenko
2017-11-16  8:03 ` [dpdk-dev] [PATCH 06/53] net/sfc/base: extend NVRAM RW finish to return verify result Andrew Rybchenko
2017-11-16  8:03 ` [dpdk-dev] [PATCH 07/53] net/sfc/base: rename firmware update verify result cap field Andrew Rybchenko
2017-11-16  8:03 ` [dpdk-dev] [PATCH 08/53] net/sfc/base: simplify NVRAM type to partition mappings Andrew Rybchenko
2017-11-16  8:03 ` [dpdk-dev] [PATCH 09/53] net/sfc/base: check NVRAM locking by partition ID Andrew Rybchenko
2017-11-16  8:03 ` [dpdk-dev] [PATCH 10/53] net/sfc/base: report correct partition write chunk size Andrew Rybchenko
2017-11-16  8:03 ` [dpdk-dev] [PATCH 11/53] net/sfc/base: fix check in NVRAM validate Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 12/53] net/sfc/base: precheck and verify flash writes Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 13/53] net/sfc/base: remove duplicate NVRAM asserts Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 14/53] net/sfc/base: quieten get version methods Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 15/53] net/sfc/base: fix PreFAST issues Andrew Rybchenko
2017-11-27 19:58   ` [dpdk-dev] [dpdk-stable] " Ferruh Yigit
2017-11-28 11:49     ` Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 16/53] net/sfc/base: add support for MUM/SUC firmware partitions Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 17/53] net/sfc/base: improve PS credits push function name Andrew Rybchenko
2017-11-27 19:59   ` Ferruh Yigit
2017-11-28  9:20     ` Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 18/53] net/sfc/base: improve RxQ label init prototype Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 19/53] net/sfc/base: add description of the PS packets layout Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 20/53] net/sfc/base: clarify meaning of Rx desc lbits in PS mode Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 21/53] net/sfc/base: optimize credits overflow check Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 22/53] net/sfc/base: provide simple access to RxQ state in EvQ Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 23/53] net/sfc/base: enforce packed stream fake buffer size Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 24/53] net/sfc/base: more accurately calculate number of PS credits Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 25/53] net/sfc/base: make MAC naming consistent with other modules Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 26/53] net/sfc/base: support inner checksum offload on transmit Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 27/53] net/sfc/base: use MCDIv2 for requests with too long response Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 28/53] net/sfc/base: ignore error in completion event on MCDIv2 HW Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 29/53] net/sfc/base: request info about outer frame in Rx events Andrew Rybchenko
2017-11-27 19:57   ` Ferruh Yigit
2017-11-28 10:48     ` Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 30/53] net/sfc/base: remove assertion on no longer used define Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 31/53] net/sfc/base: improve names for EVQ descriptor counts Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 32/53] net/sfc/base: improve names for RXQ " Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 33/53] net/sfc/base: improve names for TXQ " Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 34/53] net/sfc/base: fix build issue with PHY LED control enabled Andrew Rybchenko
2017-11-27 19:59   ` [dpdk-dev] [dpdk-stable] " Ferruh Yigit
2017-11-16  8:04 ` [dpdk-dev] [PATCH 35/53] net/sfc/base: move Siena-specific defs to right header Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 36/53] net/sfc/base: run mkconfig.py to add a new sensors Andrew Rybchenko
2017-11-27 19:58   ` Ferruh Yigit
2017-11-28 12:01     ` Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 37/53] net/sfc/base: add support for " Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 38/53] net/sfc/base: remove unused defined for WPTR alignment Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 39/53] net/sfc/base: cstyle fixes Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 40/53] net/sfc/base: allow to use PHY stats on Huntington/Medford Andrew Rybchenko
2017-11-16  8:04 ` Andrew Rybchenko [this message]
2017-11-16  8:04 ` [dpdk-dev] [PATCH 42/53] net/sfc/base: fix probes in licensing support Andrew Rybchenko
2017-11-27 19:58   ` [dpdk-dev] [dpdk-stable] " Ferruh Yigit
2017-11-28 10:17     ` Andrew Rybchenko
2017-11-28 21:38       ` Ferruh Yigit
2017-11-29  9:51         ` Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 43/53] net/sfc/base: fix warnings from VS2015 C compiler (C4310) Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 44/53] net/sfc/base: fix warnings from VS2015 C compiler (C4244) Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 45/53] net/sfc/base: fix warnings from VS2015 C compiler (C4245) Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 46/53] net/sfc/base: fix warnings from VS2015 C compiler (C4100) Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 47/53] net/sfc/base: fix warnings from VS2015 C compiler (C4189) Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 48/53] net/sfc/base: fix warnings from VS2015 C compiler (C4057) Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 49/53] net/sfc/base: fix warnings from VS2015 C compiler (C4214) Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 50/53] net/sfc/base: remove obsolete check for pre-Siena hardware Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 51/53] net/sfc/base: expand on comment on number of queues field Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 52/53] net/sfc/base: fix PreFAST static analysis warning (C6001) Andrew Rybchenko
2017-11-16  8:04 ` [dpdk-dev] [PATCH 53/53] net/sfc/base: move BIU test code into Siena-specific file Andrew Rybchenko
2017-11-27 19:59 ` [dpdk-dev] [PATCH 00/53] net/sfc: base driver update Ferruh Yigit

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