From: Beilei Xing <beilei.xing@intel.com>
To: jingjing.wu@intel.com
Cc: dev@dpdk.org, andrey.chilikin@intel.com
Subject: [dpdk-dev] [PATCH v4 1/2] net/i40e: support input set configuration
Date: Thu, 7 Dec 2017 14:00:44 +0800 [thread overview]
Message-ID: <1512626445-95804-2-git-send-email-beilei.xing@intel.com> (raw)
In-Reply-To: <1512626445-95804-1-git-send-email-beilei.xing@intel.com>
This patch supports getting/setting input set info for
RSS/FDIR/FDIR flexible payload.
Also add some helper functions for input set configuration.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
---
drivers/net/i40e/rte_pmd_i40e.c | 141 ++++++++++++++++++++++++++++++
drivers/net/i40e/rte_pmd_i40e.h | 138 +++++++++++++++++++++++++++++
drivers/net/i40e/rte_pmd_i40e_version.map | 10 +++
3 files changed, 289 insertions(+)
diff --git a/drivers/net/i40e/rte_pmd_i40e.c b/drivers/net/i40e/rte_pmd_i40e.c
index aeb92af..1f95f91 100644
--- a/drivers/net/i40e/rte_pmd_i40e.c
+++ b/drivers/net/i40e/rte_pmd_i40e.c
@@ -2985,3 +2985,144 @@ int rte_pmd_i40e_flow_add_del_packet_template(
return i40e_flow_add_del_fdir_filter(dev, &filter_conf, add);
}
+
+int
+rte_pmd_i40e_inset_get(uint16_t port, uint8_t pctype,
+ struct rte_pmd_i40e_inset *inset,
+ enum rte_pmd_i40e_inset_type inset_type)
+{
+ struct rte_eth_dev *dev;
+ struct i40e_hw *hw;
+ uint64_t inset_reg;
+ uint32_t mask_reg[2];
+ int i;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+ dev = &rte_eth_devices[port];
+
+ if (!is_i40e_supported(dev))
+ return -ENOTSUP;
+
+ if (pctype > 63)
+ return -EINVAL;
+
+ hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ memset(inset, 0, sizeof(struct rte_pmd_i40e_inset));
+
+ switch (inset_type) {
+ case INSET_HASH:
+ /* Get input set */
+ inset_reg =
+ i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, pctype));
+ inset_reg <<= I40E_32_BIT_WIDTH;
+ inset_reg |=
+ i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, pctype));
+ /* Get field mask */
+ mask_reg[0] =
+ i40e_read_rx_ctl(hw, I40E_GLQF_HASH_MSK(0, pctype));
+ mask_reg[1] =
+ i40e_read_rx_ctl(hw, I40E_GLQF_HASH_MSK(1, pctype));
+ break;
+ case INSET_FDIR:
+ inset_reg =
+ i40e_read_rx_ctl(hw, I40E_PRTQF_FD_INSET(pctype, 1));
+ inset_reg <<= I40E_32_BIT_WIDTH;
+ inset_reg |=
+ i40e_read_rx_ctl(hw, I40E_PRTQF_FD_INSET(pctype, 0));
+ mask_reg[0] =
+ i40e_read_rx_ctl(hw, I40E_GLQF_FD_MSK(0, pctype));
+ mask_reg[1] =
+ i40e_read_rx_ctl(hw, I40E_GLQF_FD_MSK(1, pctype));
+ break;
+ case INSET_FDIR_FLX:
+ inset_reg =
+ i40e_read_rx_ctl(hw, I40E_PRTQF_FD_FLXINSET(pctype));
+ mask_reg[0] =
+ i40e_read_rx_ctl(hw, I40E_PRTQF_FD_MSK(pctype, 0));
+ mask_reg[1] =
+ i40e_read_rx_ctl(hw, I40E_PRTQF_FD_MSK(pctype, 1));
+ break;
+ default:
+ PMD_DRV_LOG(ERR, "Unsupported input set type.");
+ return -EINVAL;
+ }
+
+ inset->inset = inset_reg;
+
+ for (i = 0; i < 2; i++) {
+ inset->mask[i].field_idx = ((mask_reg[i] >> 16) & 0x3F);
+ inset->mask[i].mask = mask_reg[i] & 0xFFFF;
+ }
+
+ return 0;
+}
+
+int
+rte_pmd_i40e_inset_set(uint16_t port, uint8_t pctype,
+ struct rte_pmd_i40e_inset *inset,
+ enum rte_pmd_i40e_inset_type inset_type)
+{
+ struct rte_eth_dev *dev;
+ struct i40e_hw *hw;
+ uint64_t inset_reg;
+ uint32_t mask_reg[2];
+ int i;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+ dev = &rte_eth_devices[port];
+
+ if (!is_i40e_supported(dev))
+ return -ENOTSUP;
+
+ if (pctype > 63)
+ return -EINVAL;
+
+ hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+ /* Clear mask first */
+ for (i = 0; i < 2; i++)
+ i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), 0);
+
+ inset_reg = inset->inset;
+ for (i = 0; i < 2; i++)
+ mask_reg[i] = (inset->mask[i].field_idx << 16) |
+ inset->mask[i].mask;
+
+ switch (inset_type) {
+ case INSET_HASH:
+ i40e_check_write_reg(hw, I40E_GLQF_HASH_INSET(0, pctype),
+ (uint32_t)(inset_reg & UINT32_MAX));
+ i40e_check_write_reg(hw, I40E_GLQF_HASH_INSET(1, pctype),
+ (uint32_t)((inset_reg >>
+ I40E_32_BIT_WIDTH) & UINT32_MAX));
+ for (i = 0; i < 2; i++)
+ i40e_check_write_reg(hw, I40E_GLQF_HASH_MSK(i, pctype),
+ mask_reg[i]);
+ break;
+ case INSET_FDIR:
+ i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0),
+ (uint32_t)(inset_reg & UINT32_MAX));
+ i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 1),
+ (uint32_t)((inset_reg >>
+ I40E_32_BIT_WIDTH) & UINT32_MAX));
+ for (i = 0; i < 2; i++)
+ i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype),
+ mask_reg[i]);
+ break;
+ case INSET_FDIR_FLX:
+ i40e_check_write_reg(hw, I40E_PRTQF_FD_FLXINSET(pctype),
+ (uint32_t)(inset_reg & UINT32_MAX));
+ for (i = 0; i < 2; i++)
+ i40e_check_write_reg(hw, I40E_PRTQF_FD_MSK(pctype, i),
+ mask_reg[i]);
+ break;
+ default:
+ PMD_DRV_LOG(ERR, "Unsupported input set type.");
+ return -EINVAL;
+ }
+
+ I40E_WRITE_FLUSH(hw);
+ return 0;
+}
diff --git a/drivers/net/i40e/rte_pmd_i40e.h b/drivers/net/i40e/rte_pmd_i40e.h
index 580ca4a..e987528 100644
--- a/drivers/net/i40e/rte_pmd_i40e.h
+++ b/drivers/net/i40e/rte_pmd_i40e.h
@@ -317,6 +317,23 @@ struct rte_pmd_i40e_pkt_template_conf {
uint32_t soft_id;
};
+enum rte_pmd_i40e_inset_type {
+ INSET_NONE = 0,
+ INSET_HASH,
+ INSET_FDIR,
+ INSET_FDIR_FLX,
+};
+
+struct rte_pmd_i40e_inset_mask {
+ uint8_t field_idx;
+ uint16_t mask;
+};
+
+struct rte_pmd_i40e_inset {
+ uint64_t inset;
+ struct rte_pmd_i40e_inset_mask mask[2];
+};
+
/**
* Add or remove raw packet template filter to Flow Director.
*
@@ -933,4 +950,125 @@ int rte_pmd_i40e_query_vfid_by_mac(uint16_t port,
int rte_pmd_i40e_rss_queue_region_conf(uint16_t port_id,
enum rte_pmd_i40e_queue_region_op op_type, void *arg);
+int rte_pmd_i40e_cfg_hash_inset(uint16_t port,
+ uint64_t pctype, uint64_t inset);
+
+/**
+ * Get input set
+ *
+ * @param port
+ * The port identifier of the Ethernet device.
+ * @param pctype
+ * HW pctype.
+ * @param inset
+ * Buffer for input set info.
+ * @param inset_type
+ * Type of input set.
+ * @return
+ * - (0) if successful.
+ * - (-ENODEV) if *port* invalid.
+ * - (-EINVAL) if bad parameter.
+ * - (-ENOTSUP) if operation not supported.
+ */
+int rte_pmd_i40e_inset_get(uint16_t port, uint8_t pctype,
+ struct rte_pmd_i40e_inset *inset,
+ enum rte_pmd_i40e_inset_type inset_type);
+
+/**
+ * Set input set
+ *
+ * @param port
+ * The port identifier of the Ethernet device.
+ * @param pctype
+ * HW pctype.
+ * @param inset
+ * Input set info.
+ * @param inset_type
+ * Type of input set.
+ * @return
+ * - (0) if successful.
+ * - (-ENODEV) if *port* invalid.
+ * - (-EINVAL) if bad parameter.
+ * - (-ENOTSUP) if operation not supported.
+ */
+int rte_pmd_i40e_inset_set(uint16_t port, uint8_t pctype,
+ struct rte_pmd_i40e_inset *inset,
+ enum rte_pmd_i40e_inset_type inset_type);
+
+/**
+ * Get bit value for some field index
+ *
+ * @param inset
+ * Input set value.
+ * @param field_idx
+ * Field index for input set.
+ * @return
+ * - (1) if set.
+ * - (0) if cleared.
+ */
+static inline int
+rte_pmd_i40e_inset_field_get(uint64_t inset, uint8_t field_idx)
+{
+ uint8_t bit_idx;
+
+ if (field_idx > 63)
+ return 0;
+
+ bit_idx = 63 - field_idx;
+ if (inset & (1ULL << bit_idx))
+ return 1;
+
+ return 0;
+}
+
+/**
+ * Set bit value for some field index
+ *
+ * @param inset
+ * Input set value.
+ * @param field_idx
+ * Field index for input set.
+ * @return
+ * - (-1) if failed.
+ * - (0) if success.
+ */
+static inline int
+rte_pmd_i40e_inset_field_set(uint64_t *inset, uint8_t field_idx)
+{
+ uint8_t bit_idx;
+
+ if (field_idx > 63)
+ return -1;
+
+ bit_idx = 63 - field_idx;
+ *inset = *inset | (1ULL << bit_idx);
+
+ return 0;
+}
+
+/**
+ * Clear bit value for some field index
+ *
+ * @param inset
+ * Input set value.
+ * @param field_idx
+ * Field index for input set.
+ * @return
+ * - (-1) if failed.
+ * - (0) if success.
+ */
+static inline int
+rte_pmd_i40e_inset_field_clear(uint64_t *inset, uint8_t field_idx)
+{
+ uint8_t bit_idx;
+
+ if (field_idx > 63)
+ return -1;
+
+ bit_idx = 63 - field_idx;
+ *inset = *inset & ~(1ULL << bit_idx);
+
+ return 0;
+}
+
#endif /* _PMD_I40E_H_ */
diff --git a/drivers/net/i40e/rte_pmd_i40e_version.map b/drivers/net/i40e/rte_pmd_i40e_version.map
index ebbd24e..82d5e2f 100644
--- a/drivers/net/i40e/rte_pmd_i40e_version.map
+++ b/drivers/net/i40e/rte_pmd_i40e_version.map
@@ -58,3 +58,13 @@ DPDK_17.11 {
rte_pmd_i40e_rss_queue_region_conf;
} DPDK_17.08;
+
+DPDK_18.02 {
+ global:
+
+ rte_pmd_i40e_inset_get;
+ rte_pmd_i40e_inset_set;
+ rte_pmd_i40e_inset_field_get;
+ rte_pmd_i40e_inset_field_set;
+ rte_pmd_i40e_inset_field_clear;
+}
\ No newline at end of file
--
2.5.5
next prev parent reply other threads:[~2017-12-07 6:00 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-24 14:59 [dpdk-dev] [PATCH 0/2] " Beilei Xing
2017-11-24 14:59 ` [dpdk-dev] [PATCH 1/2] " Beilei Xing
2017-11-24 14:59 ` [dpdk-dev] [PATCH 2/2] app/testpmd: add configuration for input set Beilei Xing
2017-11-27 7:16 ` [dpdk-dev] [PATCH v2 0/2] net/i40e: support input set configuration Beilei Xing
2017-11-27 7:16 ` [dpdk-dev] [PATCH v2 1/2] " Beilei Xing
2017-11-27 7:16 ` [dpdk-dev] [PATCH v2 2/2] app/testpmd: add configuration for input set Beilei Xing
2017-11-29 9:43 ` [dpdk-dev] [PATCH v3 0/2] net/i40e: support input set configuration Beilei Xing
2017-11-29 9:43 ` [dpdk-dev] [PATCH v3 1/2] " Beilei Xing
2017-11-29 9:43 ` [dpdk-dev] [PATCH v3 2/2] app/testpmd: add configuration for input set Beilei Xing
2017-12-07 6:00 ` [dpdk-dev] [PATCH v4 0/2] net/i40e: support input set configuration Beilei Xing
2017-12-07 6:00 ` Beilei Xing [this message]
2017-12-07 6:00 ` [dpdk-dev] [PATCH v4 2/2] app/testpmd: add configuration for input set Beilei Xing
2017-12-07 8:43 ` [dpdk-dev] [PATCH v5 0/2] net/i40e: support input set configuration Beilei Xing
2017-12-07 8:43 ` [dpdk-dev] [PATCH v5 1/2] " Beilei Xing
2017-12-07 8:43 ` [dpdk-dev] [PATCH v5 2/2] app/testpmd: add configuration for input set Beilei Xing
2017-12-08 7:51 ` [dpdk-dev] [PATCH v6 0/2] net/i40e: support input set configuration Beilei Xing
2017-12-08 7:51 ` [dpdk-dev] [PATCH v6 1/2] " Beilei Xing
2018-01-02 12:48 ` Zhang, Qi Z
2017-12-08 7:51 ` [dpdk-dev] [PATCH v6 2/2] app/testpmd: add configuration for input set Beilei Xing
2018-01-04 6:51 ` Lu, Wenzhuo
2018-01-05 3:03 ` [dpdk-dev] [PATCH v7 0/2] support input set configuration Beilei Xing
2018-01-05 3:03 ` [dpdk-dev] [PATCH v7 1/2] net/i40e: " Beilei Xing
2018-01-05 3:03 ` [dpdk-dev] [PATCH v7 2/2] app/testpmd: add configuration for input set Beilei Xing
2018-01-08 3:09 ` [dpdk-dev] [PATCH v8 0/2] support input set configuration Beilei Xing
2018-01-08 3:09 ` [dpdk-dev] [PATCH v8 1/2] net/i40e: " Beilei Xing
2018-01-10 12:12 ` Ferruh Yigit
2018-01-10 12:40 ` Xing, Beilei
2018-01-08 3:09 ` [dpdk-dev] [PATCH v8 2/2] app/testpmd: add configuration for input set Beilei Xing
2018-01-08 3:18 ` Lu, Wenzhuo
2018-01-09 7:44 ` [dpdk-dev] [PATCH v8 0/2] support input set configuration Zhang, Helin
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