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* [dpdk-dev] [PATCH] net/i40e: fix issue about interrupt
@ 2018-02-05  8:12 Beilei Xing
  2018-02-05  8:17 ` [dpdk-dev] [PATCH v2] " Beilei Xing
  0 siblings, 1 reply; 5+ messages in thread
From: Beilei Xing @ 2018-02-05  8:12 UTC (permalink / raw)
  To: qi.z.zhang, jingjing.wu; +Cc: dev, stable

This patch fixes interval error and corrects macros
when enable rx interrupt mode. The patch also fixes
a logical error during support multiple driver.

Fixes: be6c228d4da3 ("i40e: support Rx interrupt")
Fixes: b20aa3aee390 ("net/i40e: fix multiple driver support issue")
Cc: stable@dpdk.org

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
---
 drivers/net/i40e/i40e_ethdev.c | 19 ++++++++-----------
 1 file changed, 8 insertions(+), 11 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index a60fd60..81d14ce 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -1869,7 +1869,7 @@ i40e_vsi_enable_queues_intr(struct i40e_vsi *vsi)
 	struct i40e_pf *pf = I40E_VSI_TO_PF(vsi);
 	uint16_t msix_intr, i;
 
-	if (rte_intr_allow_others(intr_handle) || !pf->support_multi_driver)
+	if (rte_intr_allow_others(intr_handle) && !pf->support_multi_driver)
 		for (i = 0; i < vsi->nb_msix; i++) {
 			msix_intr = vsi->msix_intr + i;
 			I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTLN(msix_intr - 1),
@@ -11126,20 +11126,16 @@ i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
 	msix_intr = intr_handle->intr_vec[queue_id];
 	if (msix_intr == I40E_MISC_VEC_ID)
 		I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0,
-			       I40E_PFINT_DYN_CTLN_INTENA_MASK |
-			       I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
-			       (0 << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT) |
-			       (interval <<
-				I40E_PFINT_DYN_CTLN_INTERVAL_SHIFT));
+			       I40E_PFINT_DYN_CTL0_INTENA_MASK |
+			       I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
+			       I40E_PFINT_DYN_CTL0_ITR_INDX_MASK);
 	else
 		I40E_WRITE_REG(hw,
 			       I40E_PFINT_DYN_CTLN(msix_intr -
 						   I40E_RX_VEC_START),
 			       I40E_PFINT_DYN_CTLN_INTENA_MASK |
 			       I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
-			       (0 << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT) |
-			       (interval <<
-				I40E_PFINT_DYN_CTLN_INTERVAL_SHIFT));
+			       I40E_PFINT_DYN_CTLN_ITR_INDX_MASK);
 
 	I40E_WRITE_FLUSH(hw);
 	rte_intr_enable(&pci_dev->intr_handle);
@@ -11157,12 +11153,13 @@ i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
 
 	msix_intr = intr_handle->intr_vec[queue_id];
 	if (msix_intr == I40E_MISC_VEC_ID)
-		I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0, 0);
+		I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0,
+			       I40E_PFINT_DYN_CTL0_ITR_INDX_MASK);
 	else
 		I40E_WRITE_REG(hw,
 			       I40E_PFINT_DYN_CTLN(msix_intr -
 						   I40E_RX_VEC_START),
-			       0);
+			       I40E_PFINT_DYN_CTLN_ITR_INDX_MASK);
 	I40E_WRITE_FLUSH(hw);
 
 	return 0;
-- 
2.5.5

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [dpdk-dev] [PATCH v2] net/i40e: fix issue about interrupt
  2018-02-05  8:12 [dpdk-dev] [PATCH] net/i40e: fix issue about interrupt Beilei Xing
@ 2018-02-05  8:17 ` Beilei Xing
  2018-02-06  5:33   ` [dpdk-dev] [PATCH v3] " Beilei Xing
  0 siblings, 1 reply; 5+ messages in thread
From: Beilei Xing @ 2018-02-05  8:17 UTC (permalink / raw)
  To: qi.z.zhang, jingjing.wu; +Cc: dev, stable

This patch fixes interval error and corrects macros
when enable rx interrupt mode. The patch also fixes
a logical error during support multiple driver.

Fixes: be6c228d4da3 ("i40e: support Rx interrupt")
Fixes: b20aa3aee390 ("net/i40e: fix multiple driver support issue")
Cc: stable@dpdk.org

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
---

v2 change:
 - fix logical error during support multiple driver.

 drivers/net/i40e/i40e_ethdev.c | 21 +++++++++------------
 1 file changed, 9 insertions(+), 12 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index a60fd60..a4dea44 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -1869,7 +1869,7 @@ i40e_vsi_enable_queues_intr(struct i40e_vsi *vsi)
 	struct i40e_pf *pf = I40E_VSI_TO_PF(vsi);
 	uint16_t msix_intr, i;
 
-	if (rte_intr_allow_others(intr_handle) || !pf->support_multi_driver)
+	if (rte_intr_allow_others(intr_handle) && !pf->support_multi_driver)
 		for (i = 0; i < vsi->nb_msix; i++) {
 			msix_intr = vsi->msix_intr + i;
 			I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTLN(msix_intr - 1),
@@ -1896,7 +1896,7 @@ i40e_vsi_disable_queues_intr(struct i40e_vsi *vsi)
 	struct i40e_pf *pf = I40E_VSI_TO_PF(vsi);
 	uint16_t msix_intr, i;
 
-	if (rte_intr_allow_others(intr_handle) || !pf->support_multi_driver)
+	if (rte_intr_allow_others(intr_handle) && !pf->support_multi_driver)
 		for (i = 0; i < vsi->nb_msix; i++) {
 			msix_intr = vsi->msix_intr + i;
 			I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTLN(msix_intr - 1),
@@ -11126,20 +11126,16 @@ i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
 	msix_intr = intr_handle->intr_vec[queue_id];
 	if (msix_intr == I40E_MISC_VEC_ID)
 		I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0,
-			       I40E_PFINT_DYN_CTLN_INTENA_MASK |
-			       I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
-			       (0 << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT) |
-			       (interval <<
-				I40E_PFINT_DYN_CTLN_INTERVAL_SHIFT));
+			       I40E_PFINT_DYN_CTL0_INTENA_MASK |
+			       I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
+			       I40E_PFINT_DYN_CTL0_ITR_INDX_MASK);
 	else
 		I40E_WRITE_REG(hw,
 			       I40E_PFINT_DYN_CTLN(msix_intr -
 						   I40E_RX_VEC_START),
 			       I40E_PFINT_DYN_CTLN_INTENA_MASK |
 			       I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
-			       (0 << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT) |
-			       (interval <<
-				I40E_PFINT_DYN_CTLN_INTERVAL_SHIFT));
+			       I40E_PFINT_DYN_CTLN_ITR_INDX_MASK);
 
 	I40E_WRITE_FLUSH(hw);
 	rte_intr_enable(&pci_dev->intr_handle);
@@ -11157,12 +11153,13 @@ i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
 
 	msix_intr = intr_handle->intr_vec[queue_id];
 	if (msix_intr == I40E_MISC_VEC_ID)
-		I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0, 0);
+		I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0,
+			       I40E_PFINT_DYN_CTL0_ITR_INDX_MASK);
 	else
 		I40E_WRITE_REG(hw,
 			       I40E_PFINT_DYN_CTLN(msix_intr -
 						   I40E_RX_VEC_START),
-			       0);
+			       I40E_PFINT_DYN_CTLN_ITR_INDX_MASK);
 	I40E_WRITE_FLUSH(hw);
 
 	return 0;
-- 
2.5.5

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [dpdk-dev] [PATCH v3] net/i40e: fix issue about interrupt
  2018-02-05  8:17 ` [dpdk-dev] [PATCH v2] " Beilei Xing
@ 2018-02-06  5:33   ` Beilei Xing
  2018-02-06 15:22     ` Zhang, Helin
  0 siblings, 1 reply; 5+ messages in thread
From: Beilei Xing @ 2018-02-06  5:33 UTC (permalink / raw)
  To: qi.z.zhang, jingjing.wu; +Cc: dev, stable

This patch fixes interval error and corrects macros
when enable rx interrupt mode. The patch also fixes
a logical error during support multiple driver.

Fixes: be6c228d4da3 ("i40e: support Rx interrupt")
Fixes: b20aa3aee390 ("net/i40e: fix multiple driver support issue")
Cc: stable@dpdk.org

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
---

v3 change:
 - fix compile error.

v2 change:
 - fix logical error during support multiple driver.

 drivers/net/i40e/i40e_ethdev.c | 25 +++++++++----------------
 1 file changed, 9 insertions(+), 16 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index a60fd60..06b0f03 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -1869,7 +1869,7 @@ i40e_vsi_enable_queues_intr(struct i40e_vsi *vsi)
 	struct i40e_pf *pf = I40E_VSI_TO_PF(vsi);
 	uint16_t msix_intr, i;
 
-	if (rte_intr_allow_others(intr_handle) || !pf->support_multi_driver)
+	if (rte_intr_allow_others(intr_handle) && !pf->support_multi_driver)
 		for (i = 0; i < vsi->nb_msix; i++) {
 			msix_intr = vsi->msix_intr + i;
 			I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTLN(msix_intr - 1),
@@ -1896,7 +1896,7 @@ i40e_vsi_disable_queues_intr(struct i40e_vsi *vsi)
 	struct i40e_pf *pf = I40E_VSI_TO_PF(vsi);
 	uint16_t msix_intr, i;
 
-	if (rte_intr_allow_others(intr_handle) || !pf->support_multi_driver)
+	if (rte_intr_allow_others(intr_handle) && !pf->support_multi_driver)
 		for (i = 0; i < vsi->nb_msix; i++) {
 			msix_intr = vsi->msix_intr + i;
 			I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTLN(msix_intr - 1),
@@ -11114,32 +11114,24 @@ i40e_dev_get_dcb_info(struct rte_eth_dev *dev,
 static int
 i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
 {
-	struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 	struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 	struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 	struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-	uint16_t interval =
-		i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL, 1,
-				       pf->support_multi_driver);
 	uint16_t msix_intr;
 
 	msix_intr = intr_handle->intr_vec[queue_id];
 	if (msix_intr == I40E_MISC_VEC_ID)
 		I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0,
-			       I40E_PFINT_DYN_CTLN_INTENA_MASK |
-			       I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
-			       (0 << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT) |
-			       (interval <<
-				I40E_PFINT_DYN_CTLN_INTERVAL_SHIFT));
+			       I40E_PFINT_DYN_CTL0_INTENA_MASK |
+			       I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
+			       I40E_PFINT_DYN_CTL0_ITR_INDX_MASK);
 	else
 		I40E_WRITE_REG(hw,
 			       I40E_PFINT_DYN_CTLN(msix_intr -
 						   I40E_RX_VEC_START),
 			       I40E_PFINT_DYN_CTLN_INTENA_MASK |
 			       I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
-			       (0 << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT) |
-			       (interval <<
-				I40E_PFINT_DYN_CTLN_INTERVAL_SHIFT));
+			       I40E_PFINT_DYN_CTLN_ITR_INDX_MASK);
 
 	I40E_WRITE_FLUSH(hw);
 	rte_intr_enable(&pci_dev->intr_handle);
@@ -11157,12 +11149,13 @@ i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
 
 	msix_intr = intr_handle->intr_vec[queue_id];
 	if (msix_intr == I40E_MISC_VEC_ID)
-		I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0, 0);
+		I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0,
+			       I40E_PFINT_DYN_CTL0_ITR_INDX_MASK);
 	else
 		I40E_WRITE_REG(hw,
 			       I40E_PFINT_DYN_CTLN(msix_intr -
 						   I40E_RX_VEC_START),
-			       0);
+			       I40E_PFINT_DYN_CTLN_ITR_INDX_MASK);
 	I40E_WRITE_FLUSH(hw);
 
 	return 0;
-- 
2.5.5

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [dpdk-dev] [PATCH v3] net/i40e: fix issue about interrupt
  2018-02-06  5:33   ` [dpdk-dev] [PATCH v3] " Beilei Xing
@ 2018-02-06 15:22     ` Zhang, Helin
  2018-02-06 15:38       ` Zhang, Helin
  0 siblings, 1 reply; 5+ messages in thread
From: Zhang, Helin @ 2018-02-06 15:22 UTC (permalink / raw)
  To: Xing, Beilei, Zhang, Qi Z, Wu, Jingjing; +Cc: dev, stable



> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Beilei Xing
> Sent: Tuesday, February 6, 2018 1:34 PM
> To: Zhang, Qi Z; Wu, Jingjing
> Cc: dev@dpdk.org; stable@dpdk.org
> Subject: [dpdk-dev] [PATCH v3] net/i40e: fix issue about interrupt
> 
> This patch fixes interval error and corrects macros when enable rx interrupt
> mode. The patch also fixes a logical error during support multiple driver.
> 
> Fixes: be6c228d4da3 ("i40e: support Rx interrupt")
> Fixes: b20aa3aee390 ("net/i40e: fix multiple driver support issue")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [dpdk-dev] [PATCH v3] net/i40e: fix issue about interrupt
  2018-02-06 15:22     ` Zhang, Helin
@ 2018-02-06 15:38       ` Zhang, Helin
  0 siblings, 0 replies; 5+ messages in thread
From: Zhang, Helin @ 2018-02-06 15:38 UTC (permalink / raw)
  To: Zhang, Helin, Xing, Beilei, Zhang, Qi Z, Wu, Jingjing; +Cc: dev, stable



> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Zhang, Helin
> Sent: Tuesday, February 6, 2018 11:23 PM
> To: Xing, Beilei; Zhang, Qi Z; Wu, Jingjing
> Cc: dev@dpdk.org; stable@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH v3] net/i40e: fix issue about interrupt
> 
> 
> 
> > -----Original Message-----
> > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Beilei Xing
> > Sent: Tuesday, February 6, 2018 1:34 PM
> > To: Zhang, Qi Z; Wu, Jingjing
> > Cc: dev@dpdk.org; stable@dpdk.org
> > Subject: [dpdk-dev] [PATCH v3] net/i40e: fix issue about interrupt
> >
> > This patch fixes interval error and corrects macros when enable rx
> > interrupt mode. The patch also fixes a logical error during support multiple
> driver.
> >
> > Fixes: be6c228d4da3 ("i40e: support Rx interrupt")
> > Fixes: b20aa3aee390 ("net/i40e: fix multiple driver support issue")
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: Beilei Xing <beilei.xing@intel.com>
> Acked-by: Helin Zhang <helin.zhang@intel.com>
Applied to dpdk-next-net-intel, with commit log changes, thanks!

Helin

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2018-02-06 15:38 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-02-05  8:12 [dpdk-dev] [PATCH] net/i40e: fix issue about interrupt Beilei Xing
2018-02-05  8:17 ` [dpdk-dev] [PATCH v2] " Beilei Xing
2018-02-06  5:33   ` [dpdk-dev] [PATCH v3] " Beilei Xing
2018-02-06 15:22     ` Zhang, Helin
2018-02-06 15:38       ` Zhang, Helin

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