From: Rosen Xu <rosen.xu@intel.com>
To: dev@dpdk.org
Cc: declan.doherty@intel.com, shreyansh.jain@nxp.com,
tianfei.zhang@intel.com, hao.wu@intel.com,
gaetan.rivet@6wind.com
Subject: [dpdk-dev] [RFC 2/5] Add Intel FPGA BUS Probe Code
Date: Fri, 9 Mar 2018 23:39:01 +0800 [thread overview]
Message-ID: <1520609944-120305-3-git-send-email-rosen.xu@intel.com> (raw)
In-Reply-To: <1520609944-120305-1-git-send-email-rosen.xu@intel.com>
Signed-off-by: Rosen Xu <rosen.xu@intel.com>
---
lib/librte_eal/common/eal_common_bus.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/lib/librte_eal/common/eal_common_bus.c b/lib/librte_eal/common/eal_common_bus.c
index 3e022d5..e3bcebe 100644
--- a/lib/librte_eal/common/eal_common_bus.c
+++ b/lib/librte_eal/common/eal_common_bus.c
@@ -87,7 +87,7 @@ struct rte_bus_list rte_bus_list =
rte_bus_probe(void)
{
int ret;
- struct rte_bus *bus, *vbus = NULL;
+ struct rte_bus *bus, *vbus = NULL, *ifpga_bus = NULL;
TAILQ_FOREACH(bus, &rte_bus_list, next) {
if (!strcmp(bus->name, "vdev")) {
@@ -95,6 +95,11 @@ struct rte_bus_list rte_bus_list =
continue;
}
+ if (!strcmp(bus->name, "ifpga")) {
+ ifpga_bus = bus;
+ continue;
+ }
+
ret = bus->probe();
if (ret)
RTE_LOG(ERR, EAL, "Bus (%s) probe failed.\n",
@@ -108,6 +113,13 @@ struct rte_bus_list rte_bus_list =
vbus->name);
}
+ if (ifpga_bus) {
+ ret = ifpga_bus->probe();
+ if (ret)
+ RTE_LOG(ERR, EAL, "Scan for (%s) bus failed.\n",
+ ifpga_bus->name);
+ }
+
return 0;
}
--
1.8.3.1
next prev parent reply other threads:[~2018-03-09 15:35 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-09 15:38 [dpdk-dev] [RFC 0/5] Intel FPGA BUS Rosen Xu
2018-03-09 15:39 ` [dpdk-dev] [RFC 1/5] Add Intel FPGA BUS Command Parse Code Rosen Xu
2018-03-09 15:39 ` Rosen Xu [this message]
2018-03-09 15:39 ` [dpdk-dev] [RFC 3/5] Add Intel FPGA BUS Lib Code Rosen Xu
2018-03-09 15:39 ` [dpdk-dev] [RFC 4/5] Add Intel FPGA BUS Rawdev Code Rosen Xu
2018-03-09 15:39 ` [dpdk-dev] [RFC 5/5] Add Intel OPAE Share Code Rosen Xu
2018-04-04 9:51 ` [dpdk-dev] [RFC 0/5] Intel FPGA BUS Bruce Richardson
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