From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id BF58D1CE84 for ; Fri, 6 Apr 2018 20:13:50 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Apr 2018 11:13:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,416,1517904000"; d="scan'208";a="189264548" Received: from silpixa00399501.ir.intel.com ([10.237.223.69]) by orsmga004.jf.intel.com with ESMTP; 06 Apr 2018 11:13:46 -0700 From: Lee Daly To: pablo.de.lara.guarch@intel.com Cc: dev@dpdk.org, Lee Daly Date: Fri, 6 Apr 2018 19:13:08 +0100 Message-Id: <1523038388-29964-1-git-send-email-lee.daly@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1520614237-187334-1-git-send-email-lee.daly@intel.com> References: <1520614237-187334-1-git-send-email-lee.daly@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v2] compress/isal: ISA-L compression PMD X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 06 Apr 2018 18:13:51 -0000 Compression PMD, which utilizes Intel’s ISA-L compression library. The driver written under the DPDK compression API, compressdev, and therefore has dependencies on it, as well as the Intel's ISA-L library. V2: - Changes to keep in compliance with compressdev API, - Enable meson build system. - General rework & fixes. - Documentation. Future V3 for this release: - Split into patchset Signed-off-by: Lee Daly --- MAINTAINERS | 11 + config/common_base | 5 + devtools/test-build.sh | 4 + doc/guides/compressdevs/features/default.ini | 43 ++ doc/guides/compressdevs/features/isal.ini | 41 ++ doc/guides/compressdevs/index.rst | 13 + doc/guides/compressdevs/isal.rst | 95 ++++ doc/guides/compressdevs/overview.rst | 13 + doc/guides/compressdevs/overview_feature_table.txt | 81 ++++ doc/guides/index.rst | 1 + drivers/Makefile | 2 + drivers/compress/Makefile | 9 + drivers/compress/isal/Makefile | 31 ++ drivers/compress/isal/isa-l_compress_pmd.c | 509 +++++++++++++++++++++ drivers/compress/isal/isa-l_compress_pmd_ops.c | 337 ++++++++++++++ drivers/compress/isal/isa-l_compress_pmd_private.h | 56 +++ drivers/compress/isal/meson.build | 15 + drivers/compress/isal/rte_pmd_isal_version.map | 3 + drivers/compress/meson.build | 8 + drivers/meson.build | 1 + mk/rte.app.mk | 5 + 21 files changed, 1283 insertions(+) create mode 100644 doc/guides/compressdevs/features/default.ini create mode 100644 doc/guides/compressdevs/features/isal.ini create mode 100644 doc/guides/compressdevs/index.rst create mode 100644 doc/guides/compressdevs/isal.rst create mode 100644 doc/guides/compressdevs/overview.rst create mode 100644 doc/guides/compressdevs/overview_feature_table.txt create mode 100644 drivers/compress/Makefile create mode 100644 drivers/compress/isal/Makefile create mode 100644 drivers/compress/isal/isa-l_compress_pmd.c create mode 100644 drivers/compress/isal/isa-l_compress_pmd_ops.c create mode 100644 drivers/compress/isal/isa-l_compress_pmd_private.h create mode 100644 drivers/compress/isal/meson.build create mode 100644 drivers/compress/isal/rte_pmd_isal_version.map create mode 100644 drivers/compress/meson.build diff --git a/MAINTAINERS b/MAINTAINERS index ed3251d..dc28288 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -725,6 +725,17 @@ F: drivers/crypto/zuc/ F: doc/guides/cryptodevs/zuc.rst F: doc/guides/cryptodevs/features/zuc.ini +Compression Drivers +------------------- +M: Pablo de Lara +T: git://dpdk.org/next/dpdk-next-crypto +F: doc/guides/compressdevs/features/default.ini + +ISA-L +M: Lee Daly +F: drivers/compress/isal/ +F: doc/guides/compressdevs/isal.rst +F: doc/guides/compressdevs/features/isal.ini Eventdev Drivers ---------------- diff --git a/config/common_base b/config/common_base index c09c7cf..1def0d3 100644 --- a/config/common_base +++ b/config/common_base @@ -533,6 +533,11 @@ CONFIG_RTE_LIBRTE_PMD_MRVL_CRYPTO=n CONFIG_RTE_LIBRTE_PMD_MRVL_CRYPTO_DEBUG=n # +# Compile PMD for ISA-L device +# +CONFIG_RTE_LIBRTE_PMD_ISAL=n + +# # Compile generic security library # CONFIG_RTE_LIBRTE_SECURITY=y diff --git a/devtools/test-build.sh b/devtools/test-build.sh index 3362edc..66f3ece 100755 --- a/devtools/test-build.sh +++ b/devtools/test-build.sh @@ -45,6 +45,7 @@ default_path=$PATH # - DPDK_DEP_SSL (y/[n]) # - DPDK_DEP_SZE (y/[n]) # - DPDK_DEP_ZLIB (y/[n]) +# - DPDK_DEP_ISAL (y/[n]) # - DPDK_MAKE_JOBS (int) # - DPDK_NOTIFY (notify-send) # - FLEXRAN_SDK @@ -129,6 +130,7 @@ reset_env () unset DPDK_DEP_SSL unset DPDK_DEP_SZE unset DPDK_DEP_ZLIB + unset DPDK_DEP_ISAL unset AESNI_MULTI_BUFFER_LIB_PATH unset ARMV8_CRYPTO_LIB_PATH unset FLEXRAN_SDK @@ -178,6 +180,8 @@ config () # test "$DPDK_DEP_ZLIB" != y || \ sed -ri 's,(BNX2X_PMD=)n,\1y,' $1/.config sed -ri 's,(NFP_PMD=)n,\1y,' $1/.config + test "$DPDK_DEP_ISAL" != y || \ + sed -ri 's,(ISAL_PMD=)n,\1y,' $1/.config test "$DPDK_DEP_PCAP" != y || \ sed -ri 's,(PCAP=)n,\1y,' $1/.config test -z "$ARMV8_CRYPTO_LIB_PATH" || \ diff --git a/doc/guides/compressdevs/features/default.ini b/doc/guides/compressdevs/features/default.ini new file mode 100644 index 0000000..a24409a --- /dev/null +++ b/doc/guides/compressdevs/features/default.ini @@ -0,0 +1,43 @@ +; +; Features of a default compression driver. +; +; This file defines the features that are valid for inclusion in +; the other driver files and also the order that they appear in +; the features table in the documentation. +; +[FEATURES] +HW Accelerated = +CPU SSE = +CPU AVX = +CPU AVX2 = +CPU AVX512 = +CPU NEON = +Stateful = +By-Pass = +Chained mbufs = +; +; Supported algorithims of the 'ISA-L' compression driver. +; +[ALGORITHIM] +Deflate = +LZS = +; +; Supported checksums of the 'ISA-L' compression driver. +; +[CHECKSUMS] +Adler32 = +Crc32 = +Adler32&Crc32 = +; +; Supported huffman codes of the 'ISA-L' compression driver. +; +[HUFFMAN CODES] +Default = +Fixed = +Dynamic = +Semi-Dynamic = +; +; Supported others of the 'ISA-L' compression driver. +; +[OTHERS] + diff --git a/doc/guides/compressdevs/features/isal.ini b/doc/guides/compressdevs/features/isal.ini new file mode 100644 index 0000000..1be801f --- /dev/null +++ b/doc/guides/compressdevs/features/isal.ini @@ -0,0 +1,41 @@ +; +; Refer to default.ini for the full list of available PMD features. +; +; Supported features of 'ISA-L' compression driver. +; +[FEATURES] +HW Accelerated = N +CPU SSE = Y +CPU AVX = Y +CPU AVX2 = Y +CPU AVX512 = Y +CPU NEON = N +Stateful = N +By-Pass = N +Chained mbufs = N +; +; Supported algorithims of the 'ISA-L' compression driver. +; +[ALGORITHIM] +Deflate = Y +LZS = N +; +; Supported checksums of the 'ISA-L' compression driver. +; +[CHECKSUMS] +Adler32 = Y +Crc32 = Y +Adler32&Crc32 = N +; +; Supported huffman codes of the 'ISA-L' compression driver. +; +[HUFFMAN CODES] +Default = Y +Fixed = Y +Dynamic = N +Semi-Dynamic = Y +; +; Supported others of the 'ISA-L' compression driver. +; +[OTHERS] + diff --git a/doc/guides/compressdevs/index.rst b/doc/guides/compressdevs/index.rst new file mode 100644 index 0000000..bc59ce8 --- /dev/null +++ b/doc/guides/compressdevs/index.rst @@ -0,0 +1,13 @@ +.. SPDX-License-Identifier: BSD-3-Clause + Copyright(c) 2018 Intel Corporation. + +Compression Device Drivers +========================== + + +.. toctree:: + :maxdepth: 2 + :numbered: + + overview + isal diff --git a/doc/guides/compressdevs/isal.rst b/doc/guides/compressdevs/isal.rst new file mode 100644 index 0000000..ea36219 --- /dev/null +++ b/doc/guides/compressdevs/isal.rst @@ -0,0 +1,95 @@ +.. SPDX-License-Identifier: BSD-3-Clause + Copyright(c) 2018 Intel Corporation. + +ISA-L Compression Poll Mode Driver +================================== + +The ISA-L PMD (**librte_pmd_isal_comp**) provides poll mode compression & +decompression driver support for utilizing Intel ISA-L library, +which implements the deflate algorithim for both compression and decompression + +Features +-------- + +ISA-L PMD has support for: + +Compression/Decompression algorithm: + +* DEFLATE + +Huffman code type: + +* DEFAULT +* FIXED +* DYNAMIC + +Checksum support: + +* Adler32 +* CRC32 + +Window size support: + +* 32K + +Limitations +----------- + +* Chained mbufs are not supported. + +* Compressdev level 0, no compression, is not supported. ISA-L level 0 used for + +fixed huffman codes. + +* Out of order operations are not supported + +Installation +------------ + +* To build DPDK with Intel's ISA-L library, the user is required to download + +the library from + +``_. + +* Once downloaded, the user needs to build the library, the ISA-L autotools + +are usualy sufficient:: + + ./autogen.sh + ./configure + +make can be used to install the library on their system, before building DPDK:: + + make + sudo make install + +* To build with meson, the "libisal.pc" file, must be copied into "pkgconfig", + +e.g. /usr/lib/pkgconfig or /usr/lib64/pkgconfig depending on your system, + +for meson to find the ISA-L library. "libisal.pc" is located in library sources,:: + + cp isal/libisal.pc /usr/lib/pkgconfig/ + +instructions on how to download below. + + +Initialization +-------------- + +In order to enable this virtual compression PMD, user must: + +* Set CONFIG_RTE_LIBRTE_PMD_ISAL=y in config/common_base. + +To use the PMD in an application, user must: + +* Call rte_vdev_init("compress_isal") within the application. + +* Use --vdev="compress_isal" in the EAL options, which will call rte_vdev_init() internally. + +The following parameters (all optional) can be provided in the previous two calls: + +* socket_id: Specify the socket where the memory for the device is going to be allocated + (by default, socket_id will be the socket where the core that is creating the PMD is running on). + diff --git a/doc/guides/compressdevs/overview.rst b/doc/guides/compressdevs/overview.rst new file mode 100644 index 0000000..b656af4 --- /dev/null +++ b/doc/guides/compressdevs/overview.rst @@ -0,0 +1,13 @@ +.. SPDX-License-Identifier: BSD-3-Clause + Copyright(c) 2018 Intel Corporation. + +Compression Device Supported Functionality Matrices +=================================================== + +Supported Feature Flags +----------------------- + +.. _table_compression_pmd_features: + +.. include:: overview_feature_table.txt + diff --git a/doc/guides/compressdevs/overview_feature_table.txt b/doc/guides/compressdevs/overview_feature_table.txt new file mode 100644 index 0000000..b775124 --- /dev/null +++ b/doc/guides/compressdevs/overview_feature_table.txt @@ -0,0 +1,81 @@ + +.. raw:: html + + + +.. table:: Features availability in compress drivers + + ========================= = + Feature i + s + a + - + l + + ========================= = + Symmetric compression Y + Sym operation chaining + HW Accelerated + Protocol offload + CPU SSE Y + CPU AVX Y + CPU AVX2 Y + CPU AVX512 Y + CPU NEON + CPU ARM CE + Mbuf scatter gather + ========================= = diff --git a/doc/guides/index.rst b/doc/guides/index.rst index d60529d..18fe0ec 100644 --- a/doc/guides/index.rst +++ b/doc/guides/index.rst @@ -17,6 +17,7 @@ DPDK documentation nics/index bbdevs/index cryptodevs/index + compressdevs/index eventdevs/index mempool/index platform/index diff --git a/drivers/Makefile b/drivers/Makefile index 3d9f86b..c88638c 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -13,6 +13,8 @@ DIRS-$(CONFIG_RTE_LIBRTE_BBDEV) += baseband DEPDIRS-baseband := common bus mempool DIRS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += crypto DEPDIRS-crypto := common bus mempool +DIRS-$(CONFIG_RTE_LIBRTE_COMPRESSDEV) += compress +DEPDIRS-compress := bus mempool DIRS-$(CONFIG_RTE_LIBRTE_EVENTDEV) += event DEPDIRS-event := common bus mempool net DIRS-$(CONFIG_RTE_LIBRTE_RAWDEV) += raw diff --git a/drivers/compress/Makefile b/drivers/compress/Makefile new file mode 100644 index 0000000..4fff2c7 --- /dev/null +++ b/drivers/compress/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Intel Corporation + +include $(RTE_SDK)/mk/rte.vars.mk + +DIRS-$(CONFIG_RTE_LIBRTE_PMD_ISAL) += isal + +include $(RTE_SDK)/mk/rte.subdir.mk + diff --git a/drivers/compress/isal/Makefile b/drivers/compress/isal/Makefile new file mode 100644 index 0000000..7673429 --- /dev/null +++ b/drivers/compress/isal/Makefile @@ -0,0 +1,31 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Intel Corporation + +include $(RTE_SDK)/mk/rte.vars.mk + +# library name +LIB = librte_pmd_isal_comp.a + +# build flags +CFLAGS += -O3 +CFLAGS += $(WERROR_FLAGS) +CFLAGS += -DALLOW_EXPERIMENTAL_API + +# external library dependencies +LDLIBS += -lisal +LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring +LDLIBS += -lrte_compressdev +LDLIBS += -lrte_bus_vdev + +# library version +LIBABIVER := 1 + +# versioning export map +EXPORT_MAP := rte_pmd_isal_version.map + +# library source files +SRCS-$(CONFIG_RTE_LIBRTE_PMD_ISAL) += isa-l_compress_pmd.c +SRCS-$(CONFIG_RTE_LIBRTE_PMD_ISAL) += isa-l_compress_pmd_ops.c + +# export include files +include $(RTE_SDK)/mk/rte.lib.mk diff --git a/drivers/compress/isal/isa-l_compress_pmd.c b/drivers/compress/isal/isa-l_compress_pmd.c new file mode 100644 index 0000000..708c204 --- /dev/null +++ b/drivers/compress/isal/isa-l_compress_pmd.c @@ -0,0 +1,509 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2018 Intel Corporation + */ + +#include +#include + +#include +#include +#include +#include +#include + +#include "isa-l_compress_pmd_private.h" + +#define RTE_COMP_ISAL_WINDOW_SIZE 15 +#define RTE_COMP_ISAL_LEVEL_ZERO 0 /* ISA-L Level 0 used for fixed Huffman */ +#define RTE_COMP_ISAL_LEVEL_ONE 1 +#define RTE_COMP_ISAL_LEVEL_TWO 2 +#define RTE_COMP_ISAL_LEVEL_THREE 3 /* Optimised for AVX512 only */ + +static uint8_t compdev_driver_id; +int isal_logtype_driver; + +/* Verify and set private xform parameters */ +int +isal_comp_set_priv_xform_parameters(struct isal_priv_xform *priv_xform, + const struct rte_comp_xform *xform) +{ + if (xform == NULL) + return -EINVAL; + + /* Check for chained xforms */ + if (xform->next != NULL) { + ISAL_PMD_LOG(ERR, "Chained xforms not supported\n"); + return -ENOTSUP; + } + + /* Set compression private xform variables */ + if (xform->type == RTE_COMP_COMPRESS) { + /* Set private xform type - COMPRESS/DECOMPRESS */ + priv_xform->type = RTE_COMP_COMPRESS; + + /* Set private xform algorithm */ + if (xform->compress.algo != RTE_COMP_ALGO_DEFLATE) { + if (xform->compress.algo == RTE_COMP_ALGO_NULL) { + ISAL_PMD_LOG(ERR, "By-pass not supported\n"); + return -ENOTSUP; + } + ISAL_PMD_LOG(ERR, "Algorithm not supported\n"); + return -ENOTSUP; + } + priv_xform->compress.algo = RTE_COMP_ALGO_DEFLATE; + + /* Set private xform checksum */ + switch (xform->compress.chksum) { + case(RTE_COMP_CHECKSUM_NONE): + priv_xform->compress.chksum = RTE_COMP_CHECKSUM_NONE; + break; + case(RTE_COMP_CHECKSUM_ADLER32): + priv_xform->compress.chksum = RTE_COMP_CHECKSUM_ADLER32; + break; + case(RTE_COMP_CHECKSUM_CRC32): + priv_xform->compress.chksum = RTE_COMP_CHECKSUM_CRC32; + break; + default: + ISAL_PMD_LOG(ERR, "Checksum not supported\n"); + return -ENOTSUP; + } + + /* Set private xform window size, 32K supported */ + if (xform->compress.window_size == RTE_COMP_ISAL_WINDOW_SIZE) + priv_xform->compress.window_size = + RTE_COMP_ISAL_WINDOW_SIZE; + else { + ISAL_PMD_LOG(ERR, "Window size not supported\n"); + return -ENOTSUP; + } + + /* Set private xform huffman type */ + switch (xform->compress.deflate.huffman) { + case(RTE_COMP_HUFFMAN_DEFAULT): + priv_xform->compress.deflate.huffman = + RTE_COMP_HUFFMAN_DEFAULT; + break; + case(RTE_COMP_HUFFMAN_FIXED): + priv_xform->compress.deflate.huffman = + RTE_COMP_HUFFMAN_FIXED; + break; + case(RTE_COMP_HUFFMAN_DYNAMIC): + priv_xform->compress.deflate.huffman = + RTE_COMP_HUFFMAN_DYNAMIC; + break; + default: + ISAL_PMD_LOG(ERR, "Huffman code not supported\n"); + return -ENOTSUP; + } + + /* Set private xform level. + * Checking compliance with compressdev API, -1 <= level => 9 + */ + if (xform->compress.level < RTE_COMP_LEVEL_PMD_DEFAULT || + xform->compress.level > RTE_COMP_LEVEL_MAX) { + ISAL_PMD_LOG(ERR, "Compression level out of range\n"); + return -EINVAL; + } + /* Check for Compressdev API level 0, No compression + * not supported in ISA-L + */ + else if (xform->compress.level == RTE_COMP_LEVEL_NONE) { + ISAL_PMD_LOG(ERR, "No Compression not supported\n"); + return -ENOTSUP; + } + /* If using fixed huffman code, level must be 0 */ + else if (priv_xform->compress.deflate.huffman == + RTE_COMP_HUFFMAN_FIXED) { + ISAL_PMD_LOG(DEBUG, "ISA-L level 0 used due to a" + " fixed huffman code\n"); + priv_xform->compress.level = RTE_COMP_ISAL_LEVEL_ZERO; + } else { + /* Mapping API levels to ISA-L levels 1,2 & 3 */ + switch (xform->compress.level) { + case RTE_COMP_LEVEL_PMD_DEFAULT: + /* Default is 1 if not using fixed huffman */ + priv_xform->compress.level = + RTE_COMP_ISAL_LEVEL_ONE; + break; + case RTE_COMP_LEVEL_MIN: + priv_xform->compress.level = + RTE_COMP_ISAL_LEVEL_ONE; + break; + case RTE_COMP_ISAL_LEVEL_TWO: + priv_xform->compress.level = + RTE_COMP_ISAL_LEVEL_TWO; + break; + /* Level 3 or higher requested */ + default: + /* Check for AVX512, to use ISA-L level 3 */ + if (rte_cpu_get_flag_enabled( + RTE_CPUFLAG_AVX512F)) + priv_xform->compress.level = + RTE_COMP_ISAL_LEVEL_THREE; + /* Check for AVX2, to use ISA-L level 3 */ + else if (rte_cpu_get_flag_enabled( + RTE_CPUFLAG_AVX2)) + priv_xform->compress.level = + RTE_COMP_ISAL_LEVEL_THREE; + else{ + ISAL_PMD_LOG(DEBUG, "Requested ISA-L level" + " 3 or above; Level 3 optimized" + " for AVX512 & AVX2 only." + " level changed to 2.\n"); + priv_xform->compress.level = + RTE_COMP_ISAL_LEVEL_TWO; + } + } + } + } + + /* Set decompression private xform variables */ + else if (xform->type == RTE_COMP_DECOMPRESS) { + + /* Set private xform type - COMPRESS/DECOMPRESS */ + priv_xform->type = RTE_COMP_DECOMPRESS; + + /* Set private xform algorithm */ + if (xform->decompress.algo != RTE_COMP_ALGO_DEFLATE) { + if (xform->decompress.algo == RTE_COMP_ALGO_NULL) { + ISAL_PMD_LOG(ERR, "By pass not supported\n"); + return -ENOTSUP; + } + ISAL_PMD_LOG(ERR, "Algorithm not supported\n"); + return -ENOTSUP; + } + priv_xform->decompress.algo = RTE_COMP_ALGO_DEFLATE; + + /* Set private xform checksum */ + switch (xform->decompress.chksum) { + case(RTE_COMP_CHECKSUM_NONE): + priv_xform->decompress.chksum = RTE_COMP_CHECKSUM_NONE; + break; + case(RTE_COMP_CHECKSUM_ADLER32): + priv_xform->decompress.chksum = + RTE_COMP_CHECKSUM_ADLER32; + break; + case(RTE_COMP_CHECKSUM_CRC32): + priv_xform->decompress.chksum = RTE_COMP_CHECKSUM_CRC32; + break; + default: + ISAL_PMD_LOG(ERR, "Checksum not supported\n"); + return -ENOTSUP; + } + + /* Set private xform window size, 32K supported */ + if (xform->decompress.window_size == RTE_COMP_ISAL_WINDOW_SIZE) + priv_xform->decompress.window_size = + RTE_COMP_ISAL_WINDOW_SIZE; + else { + ISAL_PMD_LOG(ERR, "Window size not supported\n"); + return -ENOTSUP; + } + } + return 0; +} + +/* Stateless Compression Function */ +static int +process_isal_deflate(struct rte_comp_op *op, struct isal_comp_qp *qp, + struct isal_priv_xform *priv_xform) +{ + int ret = 0; + op->status = RTE_COMP_OP_STATUS_SUCCESS; + + /* Required due to init clearing level_buf */ + uint8_t *temp_level_buf = qp->stream->level_buf; + + /* Initialize compression stream */ + isal_deflate_stateless_init(qp->stream); + + qp->stream->level_buf = temp_level_buf; + + qp->stream->flush = NO_FLUSH; + + /* Set op checksum, none by default */ + if (priv_xform->compress.chksum == RTE_COMP_CHECKSUM_CRC32) + qp->stream->gzip_flag = IGZIP_GZIP; + else if (priv_xform->compress.chksum == RTE_COMP_CHECKSUM_ADLER32) + qp->stream->gzip_flag = IGZIP_ZLIB; + + /* set op level & intermediate level buffer */ + if (priv_xform->compress.level == RTE_COMP_ISAL_LEVEL_ZERO) { + qp->stream->level = ISAL_DEF_MIN_LEVEL; + qp->stream->level_buf_size = ISAL_DEF_LVL0_DEFAULT; + } else if (priv_xform->compress.level == RTE_COMP_ISAL_LEVEL_ONE) { + qp->stream->level = RTE_COMP_ISAL_LEVEL_ONE; + qp->stream->level_buf_size = ISAL_DEF_LVL1_DEFAULT; + } else if (priv_xform->compress.level == RTE_COMP_ISAL_LEVEL_TWO) { + qp->stream->level = RTE_COMP_ISAL_LEVEL_TWO; + qp->stream->level_buf_size = ISAL_DEF_LVL2_DEFAULT; + } else { + qp->stream->level = ISAL_DEF_MAX_LEVEL; + qp->stream->level_buf_size = ISAL_DEF_LVL3_DEFAULT; + } + + /* Point compression stream structure to input/output buffers */ + qp->stream->avail_in = op->src.length; + qp->stream->next_in = rte_pktmbuf_mtod(op->m_src, uint8_t *); + qp->stream->avail_out = op->m_dst->data_len; + qp->stream->next_out = rte_pktmbuf_mtod(op->m_dst, uint8_t *); + qp->stream->end_of_stream = 1; /* All input consumed in one go */ + + if (unlikely(!qp->stream->next_in || !qp->stream->next_out)) { + ISAL_PMD_LOG(ERR, "Invalid source or destination buffers\n"); + op->status = RTE_COMP_OP_STATUS_INVALID_ARGS; + return -1; + } + + /* Set op huffman code */ + if (priv_xform->compress.deflate.huffman == RTE_COMP_HUFFMAN_FIXED) + isal_deflate_set_hufftables(qp->stream, NULL, + IGZIP_HUFFTABLE_STATIC); + else if (priv_xform->compress.deflate.huffman == + RTE_COMP_HUFFMAN_DEFAULT) + isal_deflate_set_hufftables(qp->stream, NULL, + IGZIP_HUFFTABLE_DEFAULT); + /* Dynamically change the huffman code to suit the input data */ + else if (priv_xform->compress.deflate.huffman == + RTE_COMP_HUFFMAN_DYNAMIC) { + struct isal_hufftables hufftable; + struct isal_huff_histogram histogram; + memset(&histogram, 0, sizeof(struct isal_huff_histogram)); + + isal_update_histogram(qp->stream->next_in, qp->stream->avail_in, + &histogram); + isal_create_hufftables(&hufftable, &histogram); + isal_deflate_set_hufftables(qp->stream, &hufftable, + IGZIP_HUFFTABLE_CUSTOM); + } + + /* Execute compression operation */ + ret = isal_deflate_stateless(qp->stream); + + /* Check that input buffer has been fully consumed */ + if (qp->stream->avail_in != (uint32_t)0) { + ISAL_PMD_LOG(ERR, "Input buffer could not be read entirely\n"); + op->status = RTE_COMP_OP_STATUS_ERROR; + return -1; + } + + if (ret != COMP_OK) { + op->status = RTE_COMP_OP_STATUS_ERROR; + return ret; + } + + op->consumed = op->src.length - qp->stream->avail_in; + op->produced = qp->stream->total_out; + + return ret; +} + +/* Stateless Decompression Function */ +static int +process_isal_inflate(struct rte_comp_op *op, struct isal_comp_qp *qp, + struct isal_priv_xform *priv_xform) +{ + int ret = 0; + + op->status = RTE_COMP_OP_STATUS_SUCCESS; + + /* Initialize decompression state */ + isal_inflate_init(qp->state); + + /* Set op checksum, none by default */ + if (priv_xform->decompress.chksum == RTE_COMP_CHECKSUM_CRC32) + qp->state->crc_flag = ISAL_GZIP; + else if (priv_xform->decompress.chksum == RTE_COMP_CHECKSUM_ADLER32) + qp->state->crc_flag = ISAL_ZLIB; + + /* Point decompression state structure to input/output buffers */ + qp->state->avail_in = op->src.length; + qp->state->next_in = rte_pktmbuf_mtod(op->m_src, uint8_t *); + qp->state->avail_out = op->m_dst->data_len; + qp->state->next_out = rte_pktmbuf_mtod(op->m_dst, uint8_t *); + + if (unlikely(!qp->state->next_in || !qp->state->next_out)) { + ISAL_PMD_LOG(ERR, "Invalid source or destination buffers\n"); + op->status = RTE_COMP_OP_STATUS_INVALID_ARGS; + return -1; + } + + /* Execute decompression operation */ + ret = isal_inflate_stateless(qp->state); + + /* Check that input buffer has been fully consumed */ + if (qp->state->avail_in != (uint32_t)0) { + ISAL_PMD_LOG(ERR, "Input buffer could not be read entirely\n"); + op->status = RTE_COMP_OP_STATUS_ERROR; + return -1; + } + + if (ret != ISAL_DECOMP_OK) { + op->status = RTE_COMP_OP_STATUS_ERROR; + return ret; + } + + op->consumed = op->src.length - qp->state->avail_in; + op->produced = qp->state->total_out; + + return ret; +} + +/* Process compression operation */ +static int +process_op(struct isal_comp_qp *qp, struct rte_comp_op *op, + struct isal_priv_xform *priv_xform) +{ + switch (priv_xform->type) { + case RTE_COMP_COMPRESS: + process_isal_deflate(op, qp, priv_xform); + break; + case RTE_COMP_DECOMPRESS: + process_isal_inflate(op, qp, priv_xform); + break; + default: + ISAL_PMD_LOG(ERR, "Operation Not Supported\n"); + return -ENOTSUP; + } + return 0; +} + +/* Enqueue burst */ +static uint16_t +isal_comp_pmd_enqueue_burst(void *queue_pair, struct rte_comp_op **ops, + uint16_t nb_ops) +{ + struct isal_comp_qp *qp = queue_pair; + uint16_t i; + int retval; + uint16_t num_enq = RTE_MIN(qp->num_free_elements, nb_ops); + + for (i = 0; i < num_enq; i++) { + retval = process_op(qp, ops[i], ops[i]->private_xform); + if (unlikely(retval < 0) || + ops[i]->status != RTE_COMP_OP_STATUS_SUCCESS) { + qp->qp_stats.enqueue_err_count++; + } + } + + retval = rte_ring_enqueue_burst(qp->processed_pkts, (void *)ops, + num_enq, + NULL); + qp->num_free_elements -= retval; + qp->qp_stats.enqueued_count += retval; + + return retval; +} + +/* Dequeue burst */ +static uint16_t +isal_comp_pmd_dequeue_burst(void *queue_pair, struct rte_comp_op **ops, + uint16_t nb_ops) +{ + struct isal_comp_qp *qp = queue_pair; + uint16_t nb_dequeued; + + nb_dequeued = rte_ring_dequeue_burst(qp->processed_pkts, (void **)ops, + nb_ops, NULL); + qp->num_free_elements += nb_dequeued; + qp->qp_stats.dequeued_count += nb_dequeued; + + return nb_dequeued; +} + +/* Create ISA-L compression device */ +static int +compdev_isal_create(const char *name, struct rte_vdev_device *vdev, + struct rte_compressdev_pmd_init_params *init_params) +{ + struct rte_compressdev *dev; + + dev = rte_compressdev_pmd_create(name, &vdev->device, init_params); + if (dev == NULL) { + ISAL_PMD_LOG(ERR, "failed to create compressdev vdev"); + return -EFAULT; + } + + dev->driver_id = compdev_driver_id; + dev->dev_ops = isal_compress_pmd_ops; + + /* register rx/tx burst functions for data path */ + dev->dequeue_burst = isal_comp_pmd_dequeue_burst; + dev->enqueue_burst = isal_comp_pmd_enqueue_burst; + + dev->feature_flags = RTE_COMPDEV_FF_CPU_AVX512 | + RTE_COMPDEV_FF_CPU_AVX2 | + RTE_COMPDEV_FF_CPU_AVX | + RTE_COMPDEV_FF_CPU_SSE; + + return 0; +} + + +/* Initialise ISA-L compression device */ +static int +compdev_isal_probe(struct rte_vdev_device *dev) +{ + struct rte_compressdev_pmd_init_params init_params = { + "", + sizeof(struct isal_comp_private), + rte_socket_id(), + }; + const char *name, *args; + int retval; + + name = rte_vdev_device_name(dev); + if (name == NULL) + return -EINVAL; + + args = rte_vdev_device_args(dev); + + retval = rte_compressdev_pmd_parse_input_args(&init_params, args); + if (retval) { + ISAL_PMD_LOG(ERR, + "Failed to parse initialisation arguments[%s]\n", args); + return -EINVAL; + } + + return compdev_isal_create(name, dev, &init_params); +} + +static int +compdev_isal_remove_dev(struct rte_vdev_device *vdev) +{ + struct rte_compressdev *compdev; + const char *name; + + name = rte_vdev_device_name(vdev); + if (name == NULL) + return -EINVAL; + + compdev = rte_compressdev_pmd_get_named_dev(name); + if (compdev == NULL) + return -ENODEV; + + return rte_compressdev_pmd_destroy(compdev); +} + +static struct rte_vdev_driver compdev_isal_pmd_drv = { + .probe = compdev_isal_probe, + .remove = compdev_isal_remove_dev, +}; + +static struct compressdev_driver isal_comp_drv; + +RTE_PMD_REGISTER_VDEV(COMPDEV_NAME_ISAL_PMD, compdev_isal_pmd_drv); +RTE_PMD_REGISTER_PARAM_STRING(COMPDEV_NAME_ISAL_PMD, + "socket_id="); +RTE_PMD_REGISTER_COMPRESSDEV_DRIVER(isal_comp_drv, compdev_isal_pmd_drv, + compdev_driver_id); + +RTE_INIT(isal_init_log); + +static void +isal_init_log(void) +{ + isal_logtype_driver = rte_log_register("comp_isal"); + if (isal_logtype_driver >= 0) + rte_log_set_level(isal_logtype_driver, RTE_LOG_INFO); +} diff --git a/drivers/compress/isal/isa-l_compress_pmd_ops.c b/drivers/compress/isal/isa-l_compress_pmd_ops.c new file mode 100644 index 0000000..40733b1 --- /dev/null +++ b/drivers/compress/isal/isa-l_compress_pmd_ops.c @@ -0,0 +1,337 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2018 Intel Corporation + */ + +#include +#include +#include + +#include "isa-l_compress_pmd_private.h" + +static const struct rte_compressdev_capabilities isal_pmd_capabilities[] = { + { + .algo = RTE_COMP_ALGO_DEFLATE, + .comp_feature_flags = RTE_COMP_FF_ADLER32_CHECKSUM | + RTE_COMP_FF_CRC32_CHECKSUM | + RTE_COMP_FF_SHAREABLE_PRIV_XFORM, + .window_size = { + .min = 15, + .max = 15, + .increment = 0 + }, + }, + RTE_COMP_END_OF_CAPABILITIES_LIST() +}; + +/** Configure device */ +static int +isal_comp_pmd_config(struct rte_compressdev *dev, + struct rte_compressdev_config *config) +{ + int ret = 0; + unsigned int n; + char mp_name[RTE_COMPRESSDEV_NAME_MAX_LEN]; + unsigned int elt_size = sizeof(struct isal_priv_xform); + struct isal_comp_private *internals = dev->data->dev_private; + + n = snprintf(mp_name, sizeof(mp_name), "compdev_%d_xform_mp", + dev->data->dev_id); + if (n > sizeof(mp_name)) { + ISAL_PMD_LOG(ERR, + "Unable to create unique name for xform mempool"); + return -ENOMEM; + } + + internals->priv_xform_mp = rte_mempool_lookup(mp_name); + + if (internals->priv_xform_mp != NULL) { + if (((internals->priv_xform_mp)->elt_size != elt_size) || + ((internals->priv_xform_mp)->size < + config->max_nb_priv_xforms)) { + + ISAL_PMD_LOG(ERR, "%s mempool already exists with different" + " initialization parameters", mp_name); + internals->priv_xform_mp = NULL; + return -ENOMEM; + } + } else { /* First time configuration */ + internals->priv_xform_mp = rte_mempool_create( + mp_name, /* mempool name */ + /* number of elements*/ + config->max_nb_priv_xforms, + elt_size, /* element size*/ + 0, /* Cache size*/ + 0, /* private data size */ + NULL, /* obj initialization constructor */ + NULL, /* obj initialization constructor arg */ + NULL, /**< obj constructor*/ + NULL, /* obj constructor arg */ + config->socket_id, /* socket id */ + 0); /* flags */ + } + + if (internals->priv_xform_mp == NULL) { + ISAL_PMD_LOG(ERR, "%s mempool allocation failed", mp_name); + return -ENOMEM; + } + + dev->data->dev_private = internals; + + return ret; +} + +/** Start device */ +static int +isal_comp_pmd_start(__rte_unused struct rte_compressdev *dev) +{ + return 0; +} + +/** Stop device */ +static void +isal_comp_pmd_stop(__rte_unused struct rte_compressdev *dev) +{ +} + +/** Close device */ +static int +isal_comp_pmd_close(__rte_unused struct rte_compressdev *dev) +{ + return 0; +} + +/** Get device statistics */ +static void +isal_comp_pmd_stats_get(struct rte_compressdev *dev, + struct rte_compressdev_stats *stats) +{ + uint16_t qp_id; + + for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) { + struct isal_comp_qp *qp = dev->data->queue_pairs[qp_id]; + + stats->enqueued_count += qp->qp_stats.enqueued_count; + stats->dequeued_count += qp->qp_stats.dequeued_count; + + stats->enqueue_err_count += qp->qp_stats.enqueue_err_count; + stats->dequeue_err_count += qp->qp_stats.dequeue_err_count; + } +} + +/** Reset device statistics */ +static void +isal_comp_pmd_stats_reset(struct rte_compressdev *dev) +{ + uint16_t qp_id; + + for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) { + struct isal_comp_qp *qp = dev->data->queue_pairs[qp_id]; + + memset(&qp->qp_stats, 0, sizeof(qp->qp_stats)); + } +} + + +/** Get device info */ +static void +isal_comp_pmd_info_get(struct rte_compressdev *dev, + struct rte_compressdev_info *dev_info) +{ + if (dev_info != NULL) { + dev_info->driver_id = dev->driver_id; + dev_info->feature_flags = dev->feature_flags; + dev_info->capabilities = isal_pmd_capabilities; + } +} + +/** Release queue pair */ +static int +isal_comp_pmd_qp_release(struct rte_compressdev *dev, uint16_t qp_id) +{ + struct isal_comp_qp *qp = dev->data->queue_pairs[qp_id]; + + if (qp == NULL) + return -EINVAL; + + if (qp->stream != NULL) + rte_free(qp->stream); + + if (qp->state != NULL) + rte_free(qp->state); + + if (dev->data->queue_pairs[qp_id] != NULL) + rte_free(dev->data->queue_pairs[qp_id]); + + return 0; +} + +/** set a unique name for the queue pair based on it's name, dev_id and qp_id */ +static int +isal_comp_pmd_qp_set_unique_name(struct rte_compressdev *dev, + struct isal_comp_qp *qp) +{ + unsigned int n = snprintf(qp->name, sizeof(qp->name), + "isal_compression_pmd_%u_qp_%u", + dev->data->dev_id, qp->id); + + if (n >= sizeof(qp->name)) + return -1; + + return 0; +} + +/** Create a ring to place process packets on */ +static struct rte_ring * +isal_comp_pmd_qp_create_processed_pkts_ring(struct isal_comp_qp *qp, + unsigned int ring_size, int socket_id) +{ + struct rte_ring *r; + + r = rte_ring_lookup(qp->name); + if (r) { + if (rte_ring_get_size(r) >= ring_size) { + ISAL_PMD_LOG(DEBUG, + "Reusing existing ring %s for processed packets", + qp->name); + return r; + } + + ISAL_PMD_LOG(ERR, + "Unable to reuse existing ring %s for processed packets", + qp->name); + return NULL; + } + + return rte_ring_create(qp->name, ring_size, socket_id, + RING_F_SP_ENQ | RING_F_SC_DEQ); +} + +/* Setup a queue pair */ +static int +isal_comp_pmd_qp_setup(struct rte_compressdev *dev, uint16_t qp_id, + uint32_t max_inflight_ops, int socket_id) +{ + struct isal_comp_qp *qp = NULL; + int retval; + + /* Free memory prior to re-allocation if needed. */ + if (dev->data->queue_pairs[qp_id] != NULL) + isal_comp_pmd_qp_release(dev, qp_id); + + /* Allocate the queue pair data structure. */ + qp = rte_zmalloc_socket("Isa-l compression PMD Queue Pair", sizeof(*qp), + RTE_CACHE_LINE_SIZE, socket_id); + if (qp == NULL) { + ISAL_PMD_LOG(ERR, "Failed to allocate queue pair memory"); + return (-ENOMEM); + } + + /* Initialize memory for compression stream structure */ + qp->stream = rte_zmalloc_socket("Isa-l compression stream ", + sizeof(struct isal_zstream), RTE_CACHE_LINE_SIZE, + socket_id); + + /* Initialize memory for compression level buffer */ + qp->stream->level_buf = rte_zmalloc_socket("Isa-l compression lev_buf", + ISAL_DEF_LVL3_DEFAULT, RTE_CACHE_LINE_SIZE, + socket_id); + + /* Initialize memory for decompression state structure */ + qp->state = rte_zmalloc_socket("Isa-l decompression state", + sizeof(struct inflate_state), RTE_CACHE_LINE_SIZE, + socket_id); + + qp->id = qp_id; + dev->data->queue_pairs[qp_id] = qp; + + retval = isal_comp_pmd_qp_set_unique_name(dev, qp); + if (retval) { + ISAL_PMD_LOG(ERR, "Failed to create unique name for isal " + "compression device"); + goto qp_setup_cleanup; + } + + qp->processed_pkts = isal_comp_pmd_qp_create_processed_pkts_ring(qp, + max_inflight_ops, socket_id); + if (qp->processed_pkts == NULL) { + ISAL_PMD_LOG(ERR, "Failed to create unique name for isal " + "compression device"); + goto qp_setup_cleanup; + } + + qp->num_free_elements = rte_ring_free_count(qp->processed_pkts); + + memset(&qp->qp_stats, 0, sizeof(qp->qp_stats)); + return 0; + +qp_setup_cleanup: + if (qp) + rte_free(qp); + + return -1; +} + +/** Set private xform data*/ +static int +isal_comp_pmd_priv_xform_create(struct rte_compressdev *dev, + const struct rte_comp_xform *xform, + void **priv_xform) +{ + int ret; + struct isal_comp_private *internals = dev->data->dev_private; + + if (xform == NULL) { + ISAL_PMD_LOG(ERR, "Invalid Xform struct"); + return -EINVAL; + } + + if (rte_mempool_get(internals->priv_xform_mp, priv_xform)) { + ISAL_PMD_LOG(ERR, + "Couldn't get object from private xform mempool"); + return -ENOMEM; + } + + ret = isal_comp_set_priv_xform_parameters(*priv_xform, xform); + if (ret != 0) { + ISAL_PMD_LOG(ERR, "Failed to configure private xform parameters"); + + /* Return private xform to mempool */ + rte_mempool_put(internals->priv_xform_mp, priv_xform); + return ret; + } + return 0; +} + +/** Clear memory of the private xform so it doesn't leave key material behind */ +static int +isal_comp_pmd_priv_xform_free(struct rte_compressdev *dev, void *priv_xform) +{ + struct isal_comp_private *internals = dev->data->dev_private; + + /* Zero out the whole structure */ + if (priv_xform) { + memset(priv_xform, 0, sizeof(struct isal_priv_xform)); + rte_mempool_put(internals->priv_xform_mp, priv_xform); + } + return 0; +} + +struct rte_compressdev_ops isal_pmd_ops = { + .dev_configure = isal_comp_pmd_config, + .dev_start = isal_comp_pmd_start, + .dev_stop = isal_comp_pmd_stop, + .dev_close = isal_comp_pmd_close, + + .stats_get = isal_comp_pmd_stats_get, + .stats_reset = isal_comp_pmd_stats_reset, + + .dev_infos_get = isal_comp_pmd_info_get, + + .queue_pair_setup = isal_comp_pmd_qp_setup, + .queue_pair_release = isal_comp_pmd_qp_release, + + .private_xform_create = isal_comp_pmd_priv_xform_create, + .private_xform_free = isal_comp_pmd_priv_xform_free +}; + +struct rte_compressdev_ops *isal_compress_pmd_ops = &isal_pmd_ops; diff --git a/drivers/compress/isal/isa-l_compress_pmd_private.h b/drivers/compress/isal/isa-l_compress_pmd_private.h new file mode 100644 index 0000000..7af4be1 --- /dev/null +++ b/drivers/compress/isal/isa-l_compress_pmd_private.h @@ -0,0 +1,56 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2018 Intel Corporation + */ + +#include + +#ifndef _ISAL_COMP_PMD_PRIVATE_H_ +#define _ISAL_COMP_PMD_PRIVATE_H_ + +#define COMPDEV_NAME_ISAL_PMD compress_isal +/**< ISA-L comp PMD device name */ + +extern int isal_logtype_driver; +#define ISAL_PMD_LOG(level, fmt, args...) \ + rte_log(RTE_LOG_ ## level, isal_logtype_driver, "%s(): "fmt "\n", \ + __func__, ##args) + +/** private data structure for each isa-l comp device */ +struct isal_comp_private { + struct rte_mempool *priv_xform_mp; +}; + +/** ISA-L queue pair */ +struct isal_comp_qp { + /* Queue Pair Identifier */ + uint16_t id; + /* Unique Queue Pair Name */ + char name[RTE_COMPRESSDEV_NAME_MAX_LEN]; + /* Ring for placing process packets */ + struct rte_ring *processed_pkts; + /* Queue pair statistics */ + struct rte_compressdev_stats qp_stats; + /* Compression stream information*/ + struct isal_zstream *stream; + /* Decompression state information*/ + struct inflate_state *state; + /* Number of free elements on ring */ + uint16_t num_free_elements; +} __rte_cache_aligned; + +/** ISA-L private xform structure */ +struct isal_priv_xform { + enum rte_comp_xform_type type; + struct rte_comp_compress_xform compress; + struct rte_comp_decompress_xform decompress; +} __rte_cache_aligned; + +/** Set and validate NULL comp private xform parameters */ +extern int +isal_comp_set_priv_xform_parameters(struct isal_priv_xform *priv_xform, + const struct rte_comp_xform *xform); + +/** device specific operations function pointer structure */ +extern struct rte_compressdev_ops *isal_compress_pmd_ops; + +#endif /* _ISAL_COMP_PMD_PRIVATE_H_ */ diff --git a/drivers/compress/isal/meson.build b/drivers/compress/isal/meson.build new file mode 100644 index 0000000..87a5608 --- /dev/null +++ b/drivers/compress/isal/meson.build @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright 2018 Intel Corporation + +dep = dependency('libisal', required: false) +if not dep.found() + build =false +endif + +deps += 'bus_vdev' +sources = files('isa-l_compress_pmd.c', 'isa-l_compress_pmd_ops.c') +ext_deps += dep +pkgconfig_extra_libs += '-lisal' + +allow_experimental_apis = true + diff --git a/drivers/compress/isal/rte_pmd_isal_version.map b/drivers/compress/isal/rte_pmd_isal_version.map new file mode 100644 index 0000000..de8e412 --- /dev/null +++ b/drivers/compress/isal/rte_pmd_isal_version.map @@ -0,0 +1,3 @@ +DPDK_18.05 { + local: *; +}; diff --git a/drivers/compress/meson.build b/drivers/compress/meson.build new file mode 100644 index 0000000..fb136e1 --- /dev/null +++ b/drivers/compress/meson.build @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Intel Corporation + +drivers = ['isal'] + +std_deps = ['compressdev'] # compressdev pulls in all other needed deps +config_flag_fmt = 'RTE_LIBRTE_@0@_PMD' +driver_name_fmt = 'rte_pmd_@0@' diff --git a/drivers/meson.build b/drivers/meson.build index b146f09..fd42292 100644 --- a/drivers/meson.build +++ b/drivers/meson.build @@ -7,6 +7,7 @@ driver_classes = ['common', 'mempool', # depends on common and bus. 'net', # depends on common, bus and mempool. 'crypto', # depends on common, bus and mempool (net in future). + 'compress', # depends on common, bus. 'event'] # depends on common, bus, mempool and net. foreach class:driver_classes diff --git a/mk/rte.app.mk b/mk/rte.app.mk index 2585908..9cfb6c1 100644 --- a/mk/rte.app.mk +++ b/mk/rte.app.mk @@ -227,6 +227,11 @@ endif # CONFIG_RTE_LIBRTE_DPAA_BUS endif # CONFIG_RTE_LIBRTE_CRYPTODEV +ifeq ($(CONFIG_RTE_LIBRTE_COMPRESSDEV),y) +_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_ISAL) += -lrte_pmd_isal_comp +_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_ISAL) += -lisal +endif # CONFIG_RTE_LIBRTE_COMPRESSDEV + ifeq ($(CONFIG_RTE_LIBRTE_EVENTDEV),y) _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV) += -lrte_pmd_skeleton_event _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV) += -lrte_pmd_sw_event -- 2.7.4