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This driver enables the user (app) to perform data DMA without involving CPU in the DMA process Signed-off-by: Nipun Gupta --- MAINTAINERS | 8 + config/common_base | 1 + config/common_linuxapp | 1 + drivers/raw/Makefile | 4 + drivers/raw/dpaa2_qdma/Makefile | 34 +++ drivers/raw/dpaa2_qdma/dpaa2_qdma.c | 295 +++++++++++++++++++++ drivers/raw/dpaa2_qdma/dpaa2_qdma.h | 66 +++++ drivers/raw/dpaa2_qdma/dpaa2_qdma_logs.h | 46 ++++ .../raw/dpaa2_qdma/rte_pmd_dpaa2_qdma_version.map | 4 + mk/rte.app.mk | 3 + 10 files changed, 462 insertions(+) create mode 100644 drivers/raw/dpaa2_qdma/Makefile create mode 100644 drivers/raw/dpaa2_qdma/dpaa2_qdma.c create mode 100644 drivers/raw/dpaa2_qdma/dpaa2_qdma.h create mode 100644 drivers/raw/dpaa2_qdma/dpaa2_qdma_logs.h create mode 100644 drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma_version.map diff --git a/MAINTAINERS b/MAINTAINERS index f43e3fe..dc226d8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -773,6 +773,14 @@ F: doc/guides/cryptodevs/zuc.rst F: doc/guides/cryptodevs/features/zuc.ini +Rawdev Drivers +-------------- + +NXP DPAA2 QDMA +M: Nipun Gupta +F: drivers/raw/dpaa2_qdma/ + + Eventdev Drivers ---------------- M: Jerin Jacob diff --git a/config/common_base b/config/common_base index c2b0d91..ed957db 100644 --- a/config/common_base +++ b/config/common_base @@ -210,6 +210,7 @@ CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y # CONFIG_RTE_LIBRTE_DPAA2_PMD=n CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n +CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA=n # # Compile burst-oriented Amazon ENA PMD driver diff --git a/config/common_linuxapp b/config/common_linuxapp index d0437e5..99fb25a 100644 --- a/config/common_linuxapp +++ b/config/common_linuxapp @@ -37,3 +37,4 @@ CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=y CONFIG_RTE_LIBRTE_DPAA2_PMD=y CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=y CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=y +CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA=y diff --git a/drivers/raw/Makefile b/drivers/raw/Makefile index da7c8b4..b563fc8 100644 --- a/drivers/raw/Makefile +++ b/drivers/raw/Makefile @@ -5,5 +5,9 @@ include $(RTE_SDK)/mk/rte.vars.mk # DIRS-$() += DIRS-$(CONFIG_RTE_LIBRTE_PMD_SKELETON_RAWDEV) += skeleton_rawdev +ifeq ($(CONFIG_RTE_EAL_VFIO)$(CONFIG_RTE_LIBRTE_FSLMC_BUS),yy) +DIRS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA) += dpaa2_qdma +endif + include $(RTE_SDK)/mk/rte.subdir.mk diff --git a/drivers/raw/dpaa2_qdma/Makefile b/drivers/raw/dpaa2_qdma/Makefile new file mode 100644 index 0000000..f81ee08 --- /dev/null +++ b/drivers/raw/dpaa2_qdma/Makefile @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright 2018 NXP + +include $(RTE_SDK)/mk/rte.vars.mk + +# +# library name +# +LIB = librte_pmd_dpaa2_qdma.a + +CFLAGS += -DALLOW_EXPERIMENTAL_API +CFLAGS += -O3 +CFLAGS += $(WERROR_FLAGS) + +CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal +CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc +CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/qbman/include + +LDLIBS += -lrte_bus_fslmc +LDLIBS += -lrte_eal +LDLIBS += -lrte_mempool +LDLIBS += -lrte_rawdev +LDLIBS += -lrte_ring + +EXPORT_MAP := rte_pmd_dpaa2_qdma_version.map + +LIBABIVER := 1 + +# +# all source are stored in SRCS-y +# +SRCS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA) += dpaa2_qdma.c + +include $(RTE_SDK)/mk/rte.lib.mk diff --git a/drivers/raw/dpaa2_qdma/dpaa2_qdma.c b/drivers/raw/dpaa2_qdma/dpaa2_qdma.c new file mode 100644 index 0000000..9c5b0bc --- /dev/null +++ b/drivers/raw/dpaa2_qdma/dpaa2_qdma.c @@ -0,0 +1,295 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2018 NXP + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "dpaa2_qdma.h" +#include "dpaa2_qdma_logs.h" + +/* Dynamic log type identifier */ +int dpaa2_qdma_logtype; + +/* QDMA device */ +static struct qdma_device qdma_dev; + +/* QDMA H/W queues list */ +TAILQ_HEAD(qdma_hw_queue_list, qdma_hw_queue); +static struct qdma_hw_queue_list qdma_queue_list + = TAILQ_HEAD_INITIALIZER(qdma_queue_list); + +static const struct rte_rawdev_ops dpaa2_qdma_ops = { +}; + +static int +add_hw_queues_to_list(struct dpaa2_dpdmai_dev *dpdmai_dev) +{ + struct qdma_hw_queue *queue; + int i; + + DPAA2_QDMA_FUNC_TRACE(); + + for (i = 0; i < dpdmai_dev->num_queues; i++) { + queue = rte_zmalloc(NULL, sizeof(struct qdma_hw_queue), 0); + if (!queue) { + DPAA2_QDMA_ERR( + "Memory allocation failed for QDMA queue"); + return -ENOMEM; + } + + queue->dpdmai_dev = dpdmai_dev; + queue->queue_id = i; + + TAILQ_INSERT_TAIL(&qdma_queue_list, queue, next); + qdma_dev.num_hw_queues++; + } + + return 0; +} + +static void +remove_hw_queues_from_list(struct dpaa2_dpdmai_dev *dpdmai_dev) +{ + struct qdma_hw_queue *queue = NULL; + struct qdma_hw_queue *tqueue = NULL; + + DPAA2_QDMA_FUNC_TRACE(); + + TAILQ_FOREACH_SAFE(queue, &qdma_queue_list, next, tqueue) { + if (queue->dpdmai_dev == dpdmai_dev) { + TAILQ_REMOVE(&qdma_queue_list, queue, next); + rte_free(queue); + queue = NULL; + } + } +} + +static int +dpaa2_dpdmai_dev_uninit(struct rte_rawdev *rawdev) +{ + struct dpaa2_dpdmai_dev *dpdmai_dev = rawdev->dev_private; + int ret, i; + + DPAA2_QDMA_FUNC_TRACE(); + + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return 0; + + /* Remove HW queues from global list */ + remove_hw_queues_from_list(dpdmai_dev); + + ret = dpdmai_disable(&dpdmai_dev->dpdmai, CMD_PRI_LOW, + dpdmai_dev->token); + if (ret) + DPAA2_QDMA_ERR("dmdmai disable failed"); + + /* Set up the DQRR storage for Rx */ + for (i = 0; i < DPDMAI_PRIO_NUM; i++) { + struct dpaa2_queue *rxq = &(dpdmai_dev->rx_queue[i]); + + if (rxq->q_storage) { + dpaa2_free_dq_storage(rxq->q_storage); + rte_free(rxq->q_storage); + } + } + + /* Close the device at underlying layer*/ + ret = dpdmai_close(&dpdmai_dev->dpdmai, CMD_PRI_LOW, dpdmai_dev->token); + if (ret) + DPAA2_QDMA_ERR("Failure closing dpdmai device"); + + return 0; +} + +static int +dpaa2_dpdmai_dev_init(struct rte_rawdev *rawdev, int dpdmai_id) +{ + struct dpaa2_dpdmai_dev *dpdmai_dev = rawdev->dev_private; + struct dpdmai_rx_queue_cfg rx_queue_cfg; + struct dpdmai_attr attr; + struct dpdmai_rx_queue_attr rx_attr; + struct dpdmai_tx_queue_attr tx_attr; + int ret, i; + + DPAA2_QDMA_FUNC_TRACE(); + + /* For secondary processes, the primary has done all the work */ + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return 0; + + /* Open DPDMAI device */ + dpdmai_dev->dpdmai_id = dpdmai_id; + dpdmai_dev->dpdmai.regs = rte_mcp_ptr_list[MC_PORTAL_INDEX]; + ret = dpdmai_open(&dpdmai_dev->dpdmai, CMD_PRI_LOW, + dpdmai_dev->dpdmai_id, &dpdmai_dev->token); + if (ret) { + DPAA2_QDMA_ERR("dpdmai_open() failed with err: %d", ret); + return ret; + } + + /* Get DPDMAI attributes */ + ret = dpdmai_get_attributes(&dpdmai_dev->dpdmai, CMD_PRI_LOW, + dpdmai_dev->token, &attr); + if (ret) { + DPAA2_QDMA_ERR("dpdmai get attributes failed with err: %d", + ret); + goto init_err; + } + dpdmai_dev->num_queues = attr.num_of_priorities; + + /* Set up Rx Queues */ + for (i = 0; i < attr.num_of_priorities; i++) { + struct dpaa2_queue *rxq; + + memset(&rx_queue_cfg, 0, sizeof(struct dpdmai_rx_queue_cfg)); + ret = dpdmai_set_rx_queue(&dpdmai_dev->dpdmai, + CMD_PRI_LOW, + dpdmai_dev->token, + i, &rx_queue_cfg); + if (ret) { + DPAA2_QDMA_ERR("Setting Rx queue failed with err: %d", + ret); + goto init_err; + } + + /* Allocate DQ storage for the DPDMAI Rx queues */ + rxq = &(dpdmai_dev->rx_queue[i]); + rxq->q_storage = rte_malloc("dq_storage", + sizeof(struct queue_storage_info_t), + RTE_CACHE_LINE_SIZE); + if (!rxq->q_storage) { + DPAA2_QDMA_ERR("q_storage allocation failed"); + ret = -ENOMEM; + goto init_err; + } + + memset(rxq->q_storage, 0, sizeof(struct queue_storage_info_t)); + ret = dpaa2_alloc_dq_storage(rxq->q_storage); + if (ret) { + DPAA2_QDMA_ERR("dpaa2_alloc_dq_storage failed"); + goto init_err; + } + } + + /* Get Rx and Tx queues FQID's */ + for (i = 0; i < DPDMAI_PRIO_NUM; i++) { + ret = dpdmai_get_rx_queue(&dpdmai_dev->dpdmai, CMD_PRI_LOW, + dpdmai_dev->token, i, &rx_attr); + if (ret) { + DPAA2_QDMA_ERR("Reading device failed with err: %d", + ret); + goto init_err; + } + dpdmai_dev->rx_queue[i].fqid = rx_attr.fqid; + + ret = dpdmai_get_tx_queue(&dpdmai_dev->dpdmai, CMD_PRI_LOW, + dpdmai_dev->token, i, &tx_attr); + if (ret) { + DPAA2_QDMA_ERR("Reading device failed with err: %d", + ret); + goto init_err; + } + dpdmai_dev->tx_queue[i].fqid = tx_attr.fqid; + } + + /* Enable the device */ + ret = dpdmai_enable(&dpdmai_dev->dpdmai, CMD_PRI_LOW, + dpdmai_dev->token); + if (ret) { + DPAA2_QDMA_ERR("Enabling device failed with err: %d", ret); + goto init_err; + } + + /* Add the HW queue to the global list */ + ret = add_hw_queues_to_list(dpdmai_dev); + if (ret) { + DPAA2_QDMA_ERR("Adding H/W queue to list failed"); + goto init_err; + } + DPAA2_QDMA_DEBUG("Initialized dpdmai object successfully"); + + return 0; +init_err: + dpaa2_dpdmai_dev_uninit(rawdev); + return ret; +} + +static int +rte_dpaa2_qdma_probe(struct rte_dpaa2_driver *dpaa2_drv, + struct rte_dpaa2_device *dpaa2_dev) +{ + struct rte_rawdev *rawdev; + int ret; + + DPAA2_QDMA_FUNC_TRACE(); + + rawdev = rte_rawdev_pmd_allocate(dpaa2_dev->device.name, + sizeof(struct dpaa2_dpdmai_dev), + rte_socket_id()); + if (!rawdev) { + DPAA2_QDMA_ERR("Unable to allocate rawdevice"); + return -EINVAL; + } + + dpaa2_dev->rawdev = rawdev; + rawdev->dev_ops = &dpaa2_qdma_ops; + rawdev->device = &dpaa2_dev->device; + rawdev->driver_name = dpaa2_drv->driver.name; + + /* Invoke PMD device initialization function */ + ret = dpaa2_dpdmai_dev_init(rawdev, dpaa2_dev->object_id); + if (ret) { + rte_rawdev_pmd_release(rawdev); + return ret; + } + + return 0; +} + +static int +rte_dpaa2_qdma_remove(struct rte_dpaa2_device *dpaa2_dev) +{ + struct rte_rawdev *rawdev = dpaa2_dev->rawdev; + int ret; + + DPAA2_QDMA_FUNC_TRACE(); + + dpaa2_dpdmai_dev_uninit(rawdev); + + ret = rte_rawdev_pmd_release(rawdev); + if (ret) + DPAA2_QDMA_ERR("Device cleanup failed"); + + return 0; +} + +static struct rte_dpaa2_driver rte_dpaa2_qdma_pmd = { + .drv_type = DPAA2_QDMA, + .probe = rte_dpaa2_qdma_probe, + .remove = rte_dpaa2_qdma_remove, +}; + +RTE_PMD_REGISTER_DPAA2(dpaa2_qdma, rte_dpaa2_qdma_pmd); + +RTE_INIT(dpaa2_qdma_init_log); +static void +dpaa2_qdma_init_log(void) +{ + dpaa2_qdma_logtype = rte_log_register("pmd.raw.dpaa2.qdma"); + if (dpaa2_qdma_logtype >= 0) + rte_log_set_level(dpaa2_qdma_logtype, RTE_LOG_INFO); +} diff --git a/drivers/raw/dpaa2_qdma/dpaa2_qdma.h b/drivers/raw/dpaa2_qdma/dpaa2_qdma.h new file mode 100644 index 0000000..8b3b1b9 --- /dev/null +++ b/drivers/raw/dpaa2_qdma/dpaa2_qdma.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2018 NXP + */ + +#ifndef __DPAA2_QDMA_H__ +#define __DPAA2_QDMA_H__ + +/** + * Represents a QDMA device. + * A single QDMA device exists which is combination of multiple DPDMAI rawdev's. + */ +struct qdma_device { + /** total number of hw queues. */ + uint16_t num_hw_queues; + /** + * Maximum number of hw queues to be alocated per core. + * This is limited by MAX_HW_QUEUE_PER_CORE + */ + uint16_t max_hw_queues_per_core; + /** Maximum number of VQ's */ + uint16_t max_vqs; + /** mode of operation - physical(h/w) or virtual */ + uint8_t mode; + /** Device state - started or stopped */ + uint8_t state; + /** FLE pool for the device */ + struct rte_mempool *fle_pool; + /** FLE pool size */ + int fle_pool_count; + /** A lock to QDMA device whenever required */ + rte_spinlock_t lock; +}; + +/** Represents a QDMA H/W queue */ +struct qdma_hw_queue { + /** Pointer to Next instance */ + TAILQ_ENTRY(qdma_hw_queue) next; + /** DPDMAI device to communicate with HW */ + struct dpaa2_dpdmai_dev *dpdmai_dev; + /** queue ID to communicate with HW */ + uint16_t queue_id; + /** Associated lcore id */ + uint32_t lcore_id; + /** Number of users of this hw queue */ + uint32_t num_users; +}; + +/** Represents a DPDMAI raw device */ +struct dpaa2_dpdmai_dev { + /** Pointer to Next device instance */ + TAILQ_ENTRY(dpaa2_qdma_device) next; + /** handle to DPDMAI object */ + struct fsl_mc_io dpdmai; + /** HW ID for DPDMAI object */ + uint32_t dpdmai_id; + /** Tocken of this device */ + uint16_t token; + /** Number of queue in this DPDMAI device */ + uint8_t num_queues; + /** RX queues */ + struct dpaa2_queue rx_queue[DPDMAI_PRIO_NUM]; + /** TX queues */ + struct dpaa2_queue tx_queue[DPDMAI_PRIO_NUM]; +}; + +#endif /* __DPAA2_QDMA_H__ */ diff --git a/drivers/raw/dpaa2_qdma/dpaa2_qdma_logs.h b/drivers/raw/dpaa2_qdma/dpaa2_qdma_logs.h new file mode 100644 index 0000000..fafe352 --- /dev/null +++ b/drivers/raw/dpaa2_qdma/dpaa2_qdma_logs.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2018 NXP + */ + +#ifndef __DPAA2_QDMA_LOGS_H__ +#define __DPAA2_QDMA_LOGS_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +extern int dpaa2_qdma_logtype; + +#define DPAA2_QDMA_LOG(level, fmt, args...) \ + rte_log(RTE_LOG_ ## level, dpaa2_qdma_logtype, "dpaa2_qdma: " \ + fmt "\n", ## args) + +#define DPAA2_QDMA_DEBUG(fmt, args...) \ + rte_log(RTE_LOG_DEBUG, dpaa2_qdma_logtype, "dpaa2_qdma: %s(): " \ + fmt "\n", __func__, ## args) + +#define DPAA2_QDMA_FUNC_TRACE() DPAA2_QDMA_LOG(DEBUG, ">>") + +#define DPAA2_QDMA_INFO(fmt, args...) \ + DPAA2_QDMA_LOG(INFO, fmt, ## args) +#define DPAA2_QDMA_ERR(fmt, args...) \ + DPAA2_QDMA_LOG(ERR, fmt, ## args) +#define DPAA2_QDMA_WARN(fmt, args...) \ + DPAA2_QDMA_LOG(WARNING, fmt, ## args) + +/* DP Logs, toggled out at compile time if level lower than current level */ +#define DPAA2_QDMA_DP_LOG(level, fmt, args...) \ + RTE_LOG_DP(level, PMD, "dpaa2_qdma: " fmt "\n", ## args) + +#define DPAA2_QDMA_DP_DEBUG(fmt, args...) \ + DPAA2_QDMA_DP_LOG(DEBUG, fmt, ## args) +#define DPAA2_QDMA_DP_INFO(fmt, args...) \ + DPAA2_QDMA_DP_LOG(INFO, fmt, ## args) +#define DPAA2_QDMA_DP_WARN(fmt, args...) \ + DPAA2_QDMA_DP_LOG(WARNING, fmt, ## args) + +#ifdef __cplusplus +} +#endif + +#endif /* __DPAA2_QDMA_LOGS_H__ */ diff --git a/drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma_version.map b/drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma_version.map new file mode 100644 index 0000000..9b9ab1a --- /dev/null +++ b/drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma_version.map @@ -0,0 +1,4 @@ +DPDK_18.05 { + + local: *; +}; diff --git a/mk/rte.app.mk b/mk/rte.app.mk index 8bab901..888b12f 100644 --- a/mk/rte.app.mk +++ b/mk/rte.app.mk @@ -246,6 +246,9 @@ endif # CONFIG_RTE_LIBRTE_EVENTDEV ifeq ($(CONFIG_RTE_LIBRTE_RAWDEV),y) _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_SKELETON_RAWDEV) += -lrte_pmd_skeleton_rawdev +ifeq ($(CONFIG_RTE_EAL_VFIO)$(CONFIG_RTE_LIBRTE_FSLMC_BUS),yy) +_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA) += -lrte_pmd_dpaa2_qdma +endif # CONFIG_RTE_LIBRTE_FSLMC_BUS endif # CONFIG_RTE_LIBRTE_RAWDEV -- 1.9.1