From: xiangxia.m.yue@gmail.com
To: qi.z.zhang@intel.com, ferruh.yigit@intel.com,
helin.zhang@intel.com, beilei.xing@intel.com, wei.dai@intel.com
Cc: dev@dpdk.org, Tonghao Zhang <xiangxia.m.yue@gmail.com>
Subject: [dpdk-dev] [PATCH net-next v4 2/4] net/ixgbe: set the default value for EITR
Date: Fri, 27 Apr 2018 20:03:38 -0700 [thread overview]
Message-ID: <1524884620-64598-3-git-send-email-xiangxia.m.yue@gmail.com> (raw)
In-Reply-To: <1524884620-64598-1-git-send-email-xiangxia.m.yue@gmail.com>
From: Tonghao Zhang <xiangxia.m.yue@gmail.com>
The ixgbe PF and VF use the same default value
for EITR defined in header file.
Signed-off-by: Tonghao Zhang <xiangxia.m.yue@gmail.com>
---
drivers/net/ixgbe/ixgbe_ethdev.c | 5 +----
drivers/net/ixgbe/ixgbe_rxtx.c | 3 ++-
2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index bdede8b..fcc10f6 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -59,9 +59,6 @@
*/
#define IXGBE_FC_LO 0x40
-/* Default minimum inter-interrupt interval for EITR configuration */
-#define IXGBE_MIN_INTER_INTERRUPT_INTERVAL_DEFAULT 0x79E
-
/* Timer value included in XOFF frames. */
#define IXGBE_FC_PAUSE 0x680
@@ -5879,7 +5876,7 @@ static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on)
break;
}
IXGBE_WRITE_REG(hw, IXGBE_EITR(IXGBE_MISC_VEC_ID),
- IXGBE_MIN_INTER_INTERRUPT_INTERVAL_DEFAULT & 0xFFF);
+ IXGBE_EITR_INTERVAL_US(IXGBE_QUEUE_ITR_INTERVAL_DEFAULT));
/* set up to autoclear timer, and the vectors */
mask = IXGBE_EIMS_ENABLE_MASK;
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index 2892436..ce19358 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -4842,7 +4842,8 @@ void __attribute__((cold))
* at most 500us latency for a single RSC aggregation.
*/
eitr &= ~IXGBE_EITR_ITR_INT_MASK;
- eitr |= IXGBE_EITR_INTERVAL_US(500) | IXGBE_EITR_CNT_WDIS;
+ eitr |= IXGBE_EITR_INTERVAL_US(IXGBE_QUEUE_ITR_INTERVAL_DEFAULT);
+ eitr |= IXGBE_EITR_CNT_WDIS;
IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxq->reg_idx), srrctl);
IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(rxq->reg_idx), rscctl);
--
1.8.3.1
next prev parent reply other threads:[~2018-04-28 3:03 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-28 3:03 [dpdk-dev] [PATCH net-next v4 0/4] set ixgbe/ixgbevf EITR for performance xiangxia.m.yue
2018-04-28 3:03 ` [dpdk-dev] [PATCH net-next v4 1/4] net/ixgbevf: set the interrupt interval for EITR xiangxia.m.yue
2018-04-28 3:03 ` xiangxia.m.yue [this message]
2018-04-28 3:03 ` [dpdk-dev] [PATCH net-next v4 3/4] net/ixgbe: write disable to EITR counter xiangxia.m.yue
2018-04-28 3:03 ` [dpdk-dev] [PATCH net-next v4 4/4] net/ixgbevf: save IXGBE_VTEIMS to intr->mask for performance xiangxia.m.yue
2018-05-07 11:19 ` [dpdk-dev] [PATCH net-next v4 0/4] set ixgbe/ixgbevf EITR " Tonghao Zhang
2018-05-09 5:32 ` Zhang, Qi Z
2018-05-09 7:16 ` Zhang, Helin
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