From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR03-AM5-obe.outbound.protection.outlook.com (mail-eopbgr30066.outbound.protection.outlook.com [40.107.3.66]) by dpdk.org (Postfix) with ESMTP id 9C6143421 for ; Thu, 3 May 2018 18:34:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=hRLBbkkBaLLu1zkPUz8tCTkBLQwH8uGiWxRIh++f2Yg=; b=Psf1EPIriZYrx3akd7sLrSvsngJYTLhcfgwP66c+iw820tTq68iLyu2WgI4MRgVFi4+BwwYkWcp+RmECeCfC+xbHaXahaGq0A3EcySrRyRtha0lfvje6Vog2mfXhkps9ZdKLNJGkUSviUWbHFWiSWXpTvOxn9r/RVSydXa0GYRU= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=nipun.gupta@nxp.com; Received: from b27504-OptiPlex-790.ap.freescale.net (14.142.187.166) by HE1PR0401MB2425.eurprd04.prod.outlook.com (2603:10a6:3:25::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.715.18; Thu, 3 May 2018 16:34:30 +0000 From: Nipun Gupta To: thomas@monjalon.net, hemant.agrawal@nxp.com, shreyansh.jain@nxp.com Cc: dev@dpdk.org, Nipun Gupta Date: Thu, 3 May 2018 22:03:53 +0530 Message-Id: <1525365233-5956-8-git-send-email-nipun.gupta@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1525365233-5956-1-git-send-email-nipun.gupta@nxp.com> References: <1525281329-27984-1-git-send-email-nipun.gupta@nxp.com> <1525365233-5956-1-git-send-email-nipun.gupta@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; 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SPDX-License-Identifier: BSD-3-Clause + Copyright 2018 NXP + +NXP DPAA2 CMDIF Driver +====================== + +The DPAA2 CMDIF is an implementation of the rawdev API, that provides +communication between the GPP and AIOP (Firmware). This is achieved +via using the DPCI devices exposed by MC for GPP <--> AIOP interaction. + +More information can be found at `NXP Official Website +`_. + +Features +-------- + +The DPAA2 CMDIF implements following features in the rawdev API; + +- Getting the object ID of the device (DPCI) using attributes +- I/O to and from the AIOP device using DPCI + +Supported DPAA2 SoCs +-------------------- + +- LS2084A/LS2044A +- LS2088A/LS2048A +- LS1088A/LS1048A + +Prerequisites +------------- + +There are three main pre-requisities for executing DPAA2 CMDIF on a DPAA2 +compatible board: + +1. **ARM 64 Tool Chain** + + For example, the `*aarch64* Linaro Toolchain `_. + +2. **Linux Kernel** + + It can be obtained from `NXP's Github hosting `_. + +3. **Rootfile system** + + Any *aarch64* supporting filesystem can be used. For example, + Ubuntu 15.10 (Wily) or 16.04 LTS (Xenial) userland which can be obtained + from `here `_. + +As an alternative method, DPAA2 CMDIF can also be executed using images provided +as part of SDK from NXP. The SDK includes all the above prerequisites necessary +to bring up a DPAA2 board. + +The following dependencies are not part of DPDK and must be installed +separately: + +- **NXP Linux SDK** + + NXP Linux software development kit (SDK) includes support for family + of QorIQ® ARM-Architecture-based system on chip (SoC) processors + and corresponding boards. + + It includes the Linux board support packages (BSPs) for NXP SoCs, + a fully operational tool chain, kernel and board specific modules. + + SDK and related information can be obtained from: `NXP QorIQ SDK `_. + +- **DPDK Extra Scripts** + + DPAA2 based resources can be configured easily with the help of ready scripts + as provided in the DPDK Extra repository. + + `DPDK Extras Scripts `_. + +Currently supported by DPDK: + +- NXP SDK **2.0+**. +- MC Firmware version **10.0.0** and higher. +- Supported architectures: **arm64 LE**. + +- Follow the DPDK :ref:`Getting Started Guide for Linux ` to setup the basic DPDK environment. + +.. note:: + + Some part of fslmc bus code (mc flib - object library) routines are + dual licensed (BSD & GPLv2). + +Pre-Installation Configuration +------------------------------ + +Config File Options +~~~~~~~~~~~~~~~~~~~ + +The following options can be modified in the ``config`` file. + +- ``CONFIG_RTE_LIBRTE_PMD_DPAA2_CMDIF_RAWDEV`` (default ``y``) + + Toggle compilation of the ``lrte_pmd_dpaa2_cmdif`` driver. + +Enabling logs +------------- + +For enabling logs, use the following EAL parameter: + +.. code-block:: console + + ./your_cmdif_application --log-level=pmd.raw.dpaa2.cmdif, + +Using ``pmd.raw.dpaa2.cmdif`` as log matching criteria, all Event PMD logs can be +enabled which are lower than logging ``level``. + +Driver Compilation +~~~~~~~~~~~~~~~~~~ + +To compile the DPAA2 CMDIF PMD for Linux arm64 gcc target, run the +following ``make`` command: + +.. code-block:: console + + cd + make config T=arm64-dpaa2-linuxapp-gcc install + +Initialization +-------------- + +The DPAA2 CMDIF is exposed as a vdev device which consists of dpci devices. +On EAL initialization, dpci devices will be probed and then vdev device +can be created from the application code by + +* Invoking ``rte_vdev_init("dpaa2_dpci")`` from the application + +* Using ``--vdev="dpaa2_dpci"`` in the EAL options, which will call + rte_vdev_init() internally + +Example: + +.. code-block:: console + + ./your_cmdif_application --vdev="dpaa2_dpci" + +Platform Requirement +~~~~~~~~~~~~~~~~~~~~ + +DPAA2 drivers for DPDK can only work on NXP SoCs as listed in the +``Supported DPAA2 SoCs``. diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst index 29b4f6c..7769083 100644 --- a/doc/guides/rawdevs/index.rst +++ b/doc/guides/rawdevs/index.rst @@ -11,4 +11,5 @@ application through rawdev API. :maxdepth: 2 :numbered: + dpaa2_cmdif dpaa2_qdma diff --git a/doc/guides/rel_notes/release_18_05.rst b/doc/guides/rel_notes/release_18_05.rst index 22fa74d..d12ed2f 100644 --- a/doc/guides/rel_notes/release_18_05.rst +++ b/doc/guides/rel_notes/release_18_05.rst @@ -172,6 +172,17 @@ New Features See the :doc:`../rawdevs/dpaa2_qdma` guide for more details. +* **Added DPAA2 Command Interface Driver (in rawdev).** + + The DPAA2 CMDIF is an implementation of the rawdev API, that provides + communication between the GPP and NXP's QorIQ based AIOP Block (Firmware). + Advanced IO Processor i.e. AIOP is clusters of programmable RISC engines + optimised for flexible networking and I/O operations. The communication + between GPP and AIOP is achieved via using DPCI devices exposed by MC for + GPP <--> AIOP interaction. + + See the :doc:`../rawdevs/dpaa2_cmdif` guide for more details. + API Changes ----------- -- 1.9.1