From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id 86E161C0E9 for ; Fri, 11 May 2018 13:15:41 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 May 2018 04:15:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,388,1520924400"; d="scan'208";a="40443880" Received: from sivswdev01.ir.intel.com (HELO localhost.localdomain) ([10.237.217.45]) by orsmga008.jf.intel.com with ESMTP; 11 May 2018 04:15:39 -0700 From: Fiona Trahe To: dev@dpdk.org Cc: pablo.de.lara.guarch@intel.com, fiona.trahe@intel.com, tomaszx.jozwiak@intel.com Date: Fri, 11 May 2018 12:13:52 +0100 Message-Id: <1526037249-25545-15-git-send-email-fiona.trahe@intel.com> X-Mailer: git-send-email 1.7.0.7 In-Reply-To: <1523040732-3290-1-git-send-email-fiona.trahe@intel.com> References: <1523040732-3290-1-git-send-email-fiona.trahe@intel.com> Subject: [dpdk-dev] [PATCH v2 14/31] crypto/qat: move defines from sym to qp header file X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 11 May 2018 11:15:42 -0000 Move defines related to coalescing from sym header file to qp header file as these will be common for all services. Signed-off-by: Fiona Trahe --- drivers/crypto/qat/qat_qp.h | 7 +++++++ drivers/crypto/qat/qat_sym.h | 7 ------- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/crypto/qat/qat_qp.h b/drivers/crypto/qat/qat_qp.h index 7bd8fdcec..8cf072c55 100644 --- a/drivers/crypto/qat/qat_qp.h +++ b/drivers/crypto/qat/qat_qp.h @@ -7,6 +7,13 @@ #include "qat_common.h" #include "qat_device.h" +#define QAT_CSR_HEAD_WRITE_THRESH 32U +/* number of requests to accumulate before writing head CSR */ +#define QAT_CSR_TAIL_WRITE_THRESH 32U +/* number of requests to accumulate before writing tail CSR */ +#define QAT_CSR_TAIL_FORCE_WRITE_THRESH 256U +/* number of inflights below which no tail write coalescing should occur */ + typedef int (*build_request_t)(void *op, uint8_t *req, void *op_cookie, enum qat_device_gen qat_dev_gen); diff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h index 39574eeb6..b92ec72de 100644 --- a/drivers/crypto/qat/qat_sym.h +++ b/drivers/crypto/qat/qat_sym.h @@ -20,13 +20,6 @@ (((num) + (align) - 1) & ~((align) - 1)) #define QAT_64_BTYE_ALIGN_MASK (~0x3f) -#define QAT_CSR_HEAD_WRITE_THRESH 32U -/* number of requests to accumulate before writing head CSR */ -#define QAT_CSR_TAIL_WRITE_THRESH 32U -/* number of requests to accumulate before writing tail CSR */ -#define QAT_CSR_TAIL_FORCE_WRITE_THRESH 256U -/* number of inflights below which no tail write coalescing should occur */ - struct qat_sym_session; int -- 2.13.6