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From: Andrew Rybchenko <arybchenko@solarflare.com>
To: <dev@dpdk.org>
Subject: [dpdk-dev] [PATCH] net/sfc: fix minimum number of Rx descriptors in ESSB mode
Date: Wed, 16 May 2018 13:35:36 +0100	[thread overview]
Message-ID: <1526474136-10256-1-git-send-email-arybchenko@solarflare.com> (raw)

Number of descriptors in equal stride super-buffer Rx mode defines
number of packet buffers to be used. Each HW Rx descriptor has
many packet buffers and the number depends on total size of mbuf
and CONFIG_RTE_DRIVER_MEMPOOL_BUCKET_SIZE_KB value.
Typically it makes a bit less than 32 buffers per descriptor.
Since HW Rx descriptors must be pushed by 8, it makes about 256
as required minimum. Double it in advertised minimum to allow for
at least 2 refill blocks.

Fixes: 390f9b8d82c9 ("net/sfc: support equal stride super-buffer Rx mode")

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/sfc_ef10_essb_rx.c | 29 +++++++++++++++++++++++++++--
 1 file changed, 27 insertions(+), 2 deletions(-)

diff --git a/drivers/net/sfc/sfc_ef10_essb_rx.c b/drivers/net/sfc/sfc_ef10_essb_rx.c
index f051f3cba..289b61e52 100644
--- a/drivers/net/sfc/sfc_ef10_essb_rx.c
+++ b/drivers/net/sfc/sfc_ef10_essb_rx.c
@@ -42,6 +42,31 @@
  */
 #define SFC_EF10_ESSB_RX_FAKE_BUF_SIZE	32
 
+/**
+ * Minimum number of Rx buffers the datapath allows to use.
+ *
+ * Each HW Rx descriptor has many Rx buffers. The number of buffers
+ * in one HW Rx descriptor is equal to size of contiguous block
+ * provided by Rx buffers memory pool. The contiguous block size
+ * depends on CONFIG_RTE_DRIVER_MEMPOOL_BUCKET_SIZE_KB and rte_mbuf
+ * data size specified on the memory pool creation. Typical rte_mbuf
+ * data size is about 2k which makes a bit less than 32 buffers in
+ * contiguous block with default bucket size equal to 64k.
+ * Since HW Rx descriptors are pushed by 8 (see SFC_EF10_RX_WPTR_ALIGN),
+ * it makes about 256 as required minimum. Double it in advertised
+ * minimum to allow for at least 2 refill blocks.
+ */
+#define SFC_EF10_ESSB_RX_DESCS_MIN	512
+
+/**
+ * Number of Rx buffers should be aligned to.
+ *
+ * There are no extra requirements on alignment since actual number of
+ * pushed Rx buffers will be multiple by contiguous block size which
+ * is unknown beforehand.
+ */
+#define SFC_EF10_ESSB_RX_DESCS_ALIGN	1
+
 /**
  * Maximum number of descriptors/buffers in the Rx ring.
  * It should guarantee that corresponding event queue never overfill.
@@ -396,8 +421,8 @@ sfc_ef10_essb_rx_get_dev_info(struct rte_eth_dev_info *dev_info)
 	 * Number of descriptors just defines maximum number of pushed
 	 * descriptors (fill level).
 	 */
-	dev_info->rx_desc_lim.nb_min = SFC_RX_REFILL_BULK;
-	dev_info->rx_desc_lim.nb_align = SFC_RX_REFILL_BULK;
+	dev_info->rx_desc_lim.nb_min = SFC_EF10_ESSB_RX_DESCS_MIN;
+	dev_info->rx_desc_lim.nb_align = SFC_EF10_ESSB_RX_DESCS_ALIGN;
 }
 
 static sfc_dp_rx_pool_ops_supported_t sfc_ef10_essb_rx_pool_ops_supported;
-- 
2.17.0

             reply	other threads:[~2018-05-16 12:35 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-16 12:35 Andrew Rybchenko [this message]
2018-05-17 15:20 ` Ferruh Yigit

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