From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id DF9941C0B for ; Wed, 23 May 2018 09:46:06 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 May 2018 00:46:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,432,1520924400"; d="scan'208";a="231035060" Received: from unknown (HELO dpdk9.sh.intel.com) ([10.67.118.52]) by fmsmga006.fm.intel.com with ESMTP; 23 May 2018 00:46:04 -0700 From: Beilei Xing To: qi.z.zhang@intel.com Cc: dev@dpdk.org, jia.guo@intel.com Date: Wed, 23 May 2018 15:46:46 +0800 Message-Id: <1527061606-10172-1-git-send-email-beilei.xing@intel.com> X-Mailer: git-send-email 2.5.5 Subject: [dpdk-dev] [PATCH] net/i40e: fix shifts of 32-bit value X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 May 2018 07:46:07 -0000 Cppcheck reports following error, (error) Shifting 32-bit value by 36 bits is undefined behaviour According to datasheet, there's PHY type and PHY type extension in setting PHY config command, should exclude PHY type extension when setting PHY type. Fixes: 1bb8f661168d ("net/i40e: fix link down and negotiation") Signed-off-by: Beilei Xing --- drivers/net/i40e/i40e_ethdev.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 7d4f1c9..9792205 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -2065,8 +2065,8 @@ i40e_phy_conf_link(struct i40e_hw *hw, - /* To enable link, phy_type mask needs to include each type */ - for (cnt = I40E_PHY_TYPE_SGMII; cnt < I40E_PHY_TYPE_MAX; cnt++) + /* PHY type mask needs to include each type except PHY type extension */ + for (cnt = I40E_PHY_TYPE_SGMII; cnt < I40E_PHY_TYPE_25GBASE_KR; cnt++) phy_type_mask |= 1 << cnt; /* use get_phy_abilities_resp value for the rest */ -- 2.5.5