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Fri, 8 Jun 2018 16:49:40 +0000 From: Anoob Joseph To: Akhil Goyal , Pablo de Lara , Thomas Monjalon Cc: Ragothaman Jayaraman , Ankur Dwivedi , Jerin Jacob , Murthy NSSR , Narayana Prasad , Nithin Dabilpuram , Srisivasubramanian Srinivasan , dev@dpdk.org Date: Fri, 8 Jun 2018 22:15:24 +0530 Message-Id: <1528476325-15585-16-git-send-email-anoob.joseph@caviumnetworks.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528476325-15585-1-git-send-email-anoob.joseph@caviumnetworks.com> References: <1528476325-15585-1-git-send-email-anoob.joseph@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [115.113.156.2] X-ClientProxiedBy: BM1PR01CA0071.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00:1::11) To SN6PR07MB4911.namprd07.prod.outlook.com (2603:10b6:805:3c::29) X-MS-PublicTrafficType: Email X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(7020095)(4652020)(5600026)(4534165)(7168020)(4627221)(201703031133081)(201702281549075)(2017052603328)(7153060)(7193020); SRVR:SN6PR07MB4911; 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It also contains the compilation steps and how to execute an examples application. Signed-off-by: Ankur Dwivedi Signed-off-by: Murthy NSSR Signed-off-by: Nithin Dabilpuram Signed-off-by: Ragothaman Jayaraman Signed-off-by: Srisivasubramanian Srinivasan --- doc/guides/cryptodevs/cpt.rst | 112 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 112 insertions(+) create mode 100644 doc/guides/cryptodevs/cpt.rst diff --git a/doc/guides/cryptodevs/cpt.rst b/doc/guides/cryptodevs/cpt.rst new file mode 100644 index 0000000..262ce9e --- /dev/null +++ b/doc/guides/cryptodevs/cpt.rst @@ -0,0 +1,112 @@ +.. SPDX-License-Identifier: BSD-3-Clause + Copyright(c) 2017 Cavium, Inc + +***************************** +Cavium's CPT Poll Mode Driver +****************************** + +The CPT poll mode driver provides support for offloading cryptographic +operations on the Cavium's cryptographic accelerator unit(CPT) coprocessor +hardware. This coprocessor is present on the Cavium's thunder boards(CN8xxx). +The CPT poll mode driver enqueues the crypto request to this coprocessor and +dequeues the response once the operation is completed. + +Supported Algorithms +##################### + +Cipher Algorithms +****************** + +* ``RTE_CRYPTO_CIPHER_AES_CBC`` +* ``RTE_CRYPTO_CIPHER_AES_CTR`` +* ``RTE_CRYPTO_CIPHER_SNOW3G_UEA2`` +* ``RTE_CRYPTO_CIPHER_KASUMI_F8`` +* ``RTE_CRYPTO_CIPHER_ZUC_EEA3`` +* ``RTE_CRYPTO_CIPHER_3DES_CBC`` +* ``RTE_CRYPTO_CIPHER_NULL`` + +Hash Algorithms +**************** + +* ``RTE_CRYPTO_AUTH_SHA1_HMAC`` +* ``RTE_CRYPTO_AUTH_SHA224_HMAC`` +* ``RTE_CRYPTO_AUTH_SHA256_HMAC`` +* ``RTE_CRYPTO_AUTH_SHA384_HMAC`` +* ``RTE_CRYPTO_AUTH_SHA512_HMAC`` +* ``RTE_CRYPTO_AUTH_MD5_HMAC`` +* ``RTE_CRYPTO_AUTH_AES_GMAC`` +* ``RTE_CRYPTO_AUTH_SNOW3G_UIA2`` +* ``RTE_CRYPTO_AUTH_NULL`` +* ``RTE_CRYPTO_AUTH_ZUC_EIA3`` +* ``RTE_CRYPTO_AUTH_KASUMI_F9`` + +AEAD Algorithms +**************** + +* ``RTE_CRYPTO_AEAD_AES_GCM`` + +Compilation +############ + +The thunder board must be running the linux kernel based on sdk-6.2.0 patch 2. +In this the cpt pf driver is already built in. Also install the openssl package, +because the cpt driver depends on the crypto library. + +For compiling the cpt poll mode driver, the CONFIG_RTE_LIBRTE_PMD_CPT setting +should be made as `y` in config/common_base file. By default it is set to `n`. + +* ``CONFIG_RTE_LIBRTE_PMD_CPT=y`` + +The following are the steps to compile the cpt poll mode driver: + +.. code-block:: console + + cd + make config T=arm64-thunderx-linuxapp-gcc + make + +The example applications can be compiled using the following: + +.. code-block:: console + + cd + export RTE_SDK=$PWD + export RTE_TARGET=build + cd examples/ + make + +Execution +########## + +The sriov_numvfs should be assigned for the cpt pf driver using the following: + +.. code-block:: console + + echo > /sys/bus/pci/devices//sriov_numvfs + +The device number can be ascertained by running the dpdk-devbind.py scripts in +the dpdk sources. + +Then the corresponding vf should be binded to the vfio-pci driver using the +following: + +.. code-block:: console + + cd + ./usertools/dpdk-devbind.py -u + ./usertools/dpdk-devbind.py -bvfio-pci + +Appropriate huge page need to be setup in order to run the examples dpdk +application. + +.. code-block:: console + + echo 8 > /sys/kernel/mm/hugepages/hugepages-524288kB/nr_hugepages + mkdir /mnt/huge + mount -t hugetlbfs nodev /mnt/huge + +After that the example dpdk application can be executed on the hardware. + +.. code-block:: console + ./build/ipsec-secgw --log-level=8 -c 0xff -- -P -p 0x3 -u 0x2 --config + "(0,0,0),(1,0,0)" -f ep0.cfg -- 1.9.3