From: Wei Zhao <wei.zhao1@intel.com>
To: dev@dpdk.org
Cc: wenzhuo.lu@intel.com, stable@dpdk.org, Wei Zhao <wei.zhao1@intel.com>
Subject: [dpdk-dev] [PATCH v2] net/ixgbe: fix mask bits register set error for FDIR
Date: Thu, 14 Jun 2018 15:21:33 +0800 [thread overview]
Message-ID: <1528960893-18630-1-git-send-email-wei.zhao1@intel.com> (raw)
In-Reply-To: <1528877530-5133-1-git-send-email-wei.zhao1@intel.com>
MAC address bits in mask registers should be set to zero
when the is mac mask is 0xFF, otherwise if it is 0x0
these bits should be to 0x3F, it also support other mask
like 0xF and so on.
Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for X550")
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
---
v2:
-change mask bits set method to support more mac mask.
---
drivers/net/ixgbe/ixgbe_fdir.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c
index 3feb815..dea8862 100644
--- a/drivers/net/ixgbe/ixgbe_fdir.c
+++ b/drivers/net/ixgbe/ixgbe_fdir.c
@@ -394,9 +394,9 @@ fdir_set_input_mask_x550(struct rte_eth_dev *dev)
IXGBE_FDIRIP6M_TNI_VNI;
if (mode == RTE_FDIR_MODE_PERFECT_TUNNEL) {
- mac_mask = info->mask.mac_addr_byte_mask;
- fdiripv6m |= (mac_mask << IXGBE_FDIRIP6M_INNER_MAC_SHIFT)
- & IXGBE_FDIRIP6M_INNER_MAC;
+ mac_mask = info->mask.mac_addr_byte_mask & 0x3F;
+ fdiripv6m &= ~((mac_mask << IXGBE_FDIRIP6M_INNER_MAC_SHIFT) &
+ IXGBE_FDIRIP6M_INNER_MAC);
switch (info->mask.tunnel_type_mask) {
case 0:
--
2.7.5
next prev parent reply other threads:[~2018-06-14 7:42 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-13 8:12 [dpdk-dev] [PATCH] " Wei Zhao
2018-06-14 0:52 ` Lu, Wenzhuo
2018-06-14 1:52 ` Zhao1, Wei
2018-06-14 7:21 ` Wei Zhao [this message]
2018-06-15 2:30 ` [dpdk-dev] [PATCH v3] " Wei Zhao
2018-06-15 3:10 ` [dpdk-dev] [PATCH v4] " Wei Zhao
2018-06-15 6:08 ` [dpdk-dev] [PATCH v5] " Wei Zhao
2018-06-19 0:57 ` Lu, Wenzhuo
2018-06-21 14:12 ` Zhang, Qi Z
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