From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id E88001E4DE; Thu, 14 Jun 2018 09:42:18 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Jun 2018 00:42:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,222,1526367600"; d="scan'208";a="232503301" Received: from dpdk6.bj.intel.com ([172.16.182.94]) by orsmga005.jf.intel.com with ESMTP; 14 Jun 2018 00:42:15 -0700 From: Wei Zhao To: dev@dpdk.org Cc: wenzhuo.lu@intel.com, stable@dpdk.org, Wei Zhao Date: Thu, 14 Jun 2018 15:21:33 +0800 Message-Id: <1528960893-18630-1-git-send-email-wei.zhao1@intel.com> X-Mailer: git-send-email 2.7.5 In-Reply-To: <1528877530-5133-1-git-send-email-wei.zhao1@intel.com> References: <1528877530-5133-1-git-send-email-wei.zhao1@intel.com> Subject: [dpdk-dev] [PATCH v2] net/ixgbe: fix mask bits register set error for FDIR X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 14 Jun 2018 07:42:19 -0000 MAC address bits in mask registers should be set to zero when the is mac mask is 0xFF, otherwise if it is 0x0 these bits should be to 0x3F, it also support other mask like 0xF and so on. Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for X550") Signed-off-by: Wei Zhao --- v2: -change mask bits set method to support more mac mask. --- drivers/net/ixgbe/ixgbe_fdir.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c index 3feb815..dea8862 100644 --- a/drivers/net/ixgbe/ixgbe_fdir.c +++ b/drivers/net/ixgbe/ixgbe_fdir.c @@ -394,9 +394,9 @@ fdir_set_input_mask_x550(struct rte_eth_dev *dev) IXGBE_FDIRIP6M_TNI_VNI; if (mode == RTE_FDIR_MODE_PERFECT_TUNNEL) { - mac_mask = info->mask.mac_addr_byte_mask; - fdiripv6m |= (mac_mask << IXGBE_FDIRIP6M_INNER_MAC_SHIFT) - & IXGBE_FDIRIP6M_INNER_MAC; + mac_mask = info->mask.mac_addr_byte_mask & 0x3F; + fdiripv6m &= ~((mac_mask << IXGBE_FDIRIP6M_INNER_MAC_SHIFT) & + IXGBE_FDIRIP6M_INNER_MAC); switch (info->mask.tunnel_type_mask) { case 0: -- 2.7.5